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arm64: dts: rockchip: rk3399: Correct DPHY PLL clock

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clk_24m --> Gate --> clk_mipidphy_ref --> Gate --> clk_dphy_pll

Change-Id: Icb5283c0854a475a5f2fc436e7d4448393b5ac95
Signed-off-by: WeiYong Bi <bivvy.bi@rock-chips.com>
This commit is contained in:
WeiYong Bi
2017-08-03 09:56:05 +08:00
committed by Huang, Tao
parent deeacfd957
commit fdb1767c62
1 changed files with 1 additions and 1 deletions
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2
arch/arm64/boot/dts/rockchip/rk3399.dtsi
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@@ -1914,7 +1914,7 @@
compatible = "rockchip,rk3399-mipi-dsi";
reg = <0x0 0xff960000 0x0 0x8000>;
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru SCLK_MIPIDPHY_REF>, <&cru PCLK_MIPI_DSI0>,
clocks = <&cru SCLK_DPHY_PLL>, <&cru PCLK_MIPI_DSI0>,
<&cru SCLK_DPHY_TX0_CFG>;
clock-names = "ref", "pclk", "phy_cfg";
resets = <&cru SRST_P_MIPI_DSI0>;