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sdemmc/sdio: g12a revA/B compatible

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PD#163379: sdemmc: g12a revA/B compatible

Change-Id: I5edaf1e490de73d160b25d5976a71edda50038d6
Signed-off-by: Nan Li <nan.li@amlogic.com>
This commit is contained in:
Nan Li
2018-04-17 16:18:11 +08:00
parent 7808c86161
commit fec161eb1b
15 changed files with 298 additions and 77 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm64/boot/dts/amlogic/g12a_pxp.dts
View File

@@ -675,7 +675,7 @@
*/
tv_bit_mode = <1>;
};
&sd_emmc_b {
&sd_emmc_b1 {
status = "okay";
sd {
caps = "MMC_CAP_4_BIT_DATA",

33
arch/arm64/boot/dts/amlogic/g12a_s905d2_skt.dts
View File

@@ -1161,8 +1161,8 @@
};
};
&sd_emmc_b {
status = "okay";
&sd_emmc_b1 {
status = "disable";
sd {
caps = "MMC_CAP_4_BIT_DATA",
"MMC_CAP_MMC_HIGHSPEED",
@@ -1172,8 +1172,35 @@
};
};
&sd_emmc_b2 {
status = "disabled";
sd {
caps = "MMC_CAP_4_BIT_DATA",
"MMC_CAP_MMC_HIGHSPEED",
"MMC_CAP_SD_HIGHSPEED";
f_min = <400000>;
f_max = <50000000>;
};
sdio {
caps = "MMC_CAP_4_BIT_DATA",
"MMC_CAP_MMC_HIGHSPEED",
"MMC_CAP_SD_HIGHSPEED",
"MMC_CAP_NONREMOVABLE",
"MMC_CAP_UHS_SDR12",
"MMC_CAP_UHS_SDR25",
"MMC_CAP_UHS_SDR50",
"MMC_CAP_UHS_SDR104",
"MMC_PM_KEEP_POWER",
"MMC_CAP_SDIO_IRQ";
f_min = <400000>;
f_max = <200000000>;
};
};
&sd_emmc_a {
status = "okay";
status = "disabled";
sdio {
caps = "MMC_CAP_4_BIT_DATA",
"MMC_CAP_MMC_HIGHSPEED",

33
arch/arm64/boot/dts/amlogic/g12a_s905d2_skt_buildroot.dts
View File

@@ -1106,8 +1106,8 @@
};
};
&sd_emmc_b {
status = "okay";
&sd_emmc_b1 {
status = "disabled";
sd {
caps = "MMC_CAP_4_BIT_DATA",
"MMC_CAP_MMC_HIGHSPEED",
@@ -1117,8 +1117,35 @@
};
};
&sd_emmc_b2 {
status = "disabled";
sd {
caps = "MMC_CAP_4_BIT_DATA",
"MMC_CAP_MMC_HIGHSPEED",
"MMC_CAP_SD_HIGHSPEED";
f_min = <400000>;
f_max = <50000000>;
};
sdio {
caps = "MMC_CAP_4_BIT_DATA",
"MMC_CAP_MMC_HIGHSPEED",
"MMC_CAP_SD_HIGHSPEED",
"MMC_CAP_NONREMOVABLE",
"MMC_CAP_UHS_SDR12",
"MMC_CAP_UHS_SDR25",
"MMC_CAP_UHS_SDR50",
"MMC_CAP_UHS_SDR104",
"MMC_PM_KEEP_POWER",
"MMC_CAP_SDIO_IRQ";
f_min = <400000>;
f_max = <200000000>;
};
};
&sd_emmc_a {
status = "okay";
status = "disabled";
sdio {
caps = "MMC_CAP_4_BIT_DATA",
"MMC_CAP_MMC_HIGHSPEED",

15
arch/arm64/boot/dts/amlogic/g12a_s905d2_u200.dts
View File

@@ -1179,8 +1179,19 @@
};
};
&sd_emmc_b {
status = "okay";
&sd_emmc_b1 {
status = "disabled";
sd {
caps = "MMC_CAP_4_BIT_DATA",
"MMC_CAP_MMC_HIGHSPEED",
"MMC_CAP_SD_HIGHSPEED";
f_min = <400000>;
f_max = <50000000>;
};
};
&sd_emmc_b2 {
status = "disabled";
sd {
caps = "MMC_CAP_4_BIT_DATA",
"MMC_CAP_MMC_HIGHSPEED",

33
arch/arm64/boot/dts/amlogic/g12a_s905d2_u200_buildroot.dts
View File

@@ -1260,8 +1260,8 @@
};
};
&sd_emmc_b {
status = "okay";
&sd_emmc_b1 {
status = "disabled";
sd {
caps = "MMC_CAP_4_BIT_DATA",
"MMC_CAP_MMC_HIGHSPEED",
@@ -1271,8 +1271,35 @@
};
};
&sd_emmc_b2 {
status = "disabled";
sd {
caps = "MMC_CAP_4_BIT_DATA",
"MMC_CAP_MMC_HIGHSPEED",
"MMC_CAP_SD_HIGHSPEED";
f_min = <400000>;
f_max = <50000000>;
};
sdio {
caps = "MMC_CAP_4_BIT_DATA",
"MMC_CAP_MMC_HIGHSPEED",
"MMC_CAP_SD_HIGHSPEED",
"MMC_CAP_NONREMOVABLE",
"MMC_CAP_UHS_SDR12",
"MMC_CAP_UHS_SDR25",
"MMC_CAP_UHS_SDR50",
"MMC_CAP_UHS_SDR104",
"MMC_PM_KEEP_POWER",
"MMC_CAP_SDIO_IRQ";
f_min = <400000>;
f_max = <200000000>;
};
};
&sd_emmc_a {
status = "okay";
status = "disabled";
sdio {
caps = "MMC_CAP_4_BIT_DATA",
"MMC_CAP_MMC_HIGHSPEED",

35
arch/arm64/boot/dts/amlogic/g12a_s905d2_u200_drm_buildroot.dts
View File

@@ -1273,8 +1273,8 @@
};
};
&sd_emmc_b {
status = "okay";
&sd_emmc_b1 {
status = "disabled";
sd {
caps = "MMC_CAP_4_BIT_DATA",
"MMC_CAP_MMC_HIGHSPEED",
@@ -1284,8 +1284,37 @@
};
};
&sd_emmc_b2 {
status = "disabled";
sd {
caps = "MMC_CAP_4_BIT_DATA",
"MMC_CAP_MMC_HIGHSPEED",
"MMC_CAP_SD_HIGHSPEED";
f_min = <400000>;
f_max = <50000000>;
};
sdio {
caps = "MMC_CAP_4_BIT_DATA",
"MMC_CAP_MMC_HIGHSPEED",
"MMC_CAP_SD_HIGHSPEED",
"MMC_CAP_NONREMOVABLE",
"MMC_CAP_UHS_SDR12",
"MMC_CAP_UHS_SDR25",
"MMC_CAP_UHS_SDR50",
"MMC_CAP_UHS_SDR104",
"MMC_PM_KEEP_POWER",
"MMC_CAP_SDIO_IRQ";
f_min = <400000>;
f_max = <200000000>;
};
};
&sd_emmc_a {
status = "okay";
status = "disabled";
sdio {
caps = "MMC_CAP_4_BIT_DATA",
"MMC_CAP_MMC_HIGHSPEED",

30
arch/arm64/boot/dts/amlogic/g12a_s905d2_u220.dts
View File

@@ -1179,15 +1179,39 @@
};
};
&sd_emmc_b {
status = "okay";
&sd_emmc_b1 {
status = "disabled";
sd {
caps = "MMC_CAP_4_BIT_DATA",
"MMC_CAP_MMC_HIGHSPEED",
"MMC_CAP_SD_HIGHSPEED";
f_min = <400000>;
f_max = <50000000>;
};
};
&sd_emmc_b2 {
status = "disabled";
sd {
caps = "MMC_CAP_4_BIT_DATA",
"MMC_CAP_MMC_HIGHSPEED",
"MMC_CAP_SD_HIGHSPEED";
f_min = <400000>;
f_max = <50000000>;
};
sdio {
caps = "MMC_CAP_4_BIT_DATA",
"MMC_CAP_MMC_HIGHSPEED",
"MMC_CAP_SD_HIGHSPEED",
"MMC_CAP_NONREMOVABLE",
"MMC_CAP_UHS_SDR12",
"MMC_CAP_UHS_SDR25",
"MMC_CAP_UHS_SDR50";
"MMC_CAP_UHS_SDR50",
"MMC_CAP_UHS_SDR104",
"MMC_PM_KEEP_POWER",
"MMC_CAP_SDIO_IRQ";
f_min = <400000>;
f_max = <200000000>;
};

15
arch/arm64/boot/dts/amlogic/g12a_s905x2_u211.dts
View File

@@ -1166,8 +1166,19 @@
};
};
&sd_emmc_b {
status = "okay";
&sd_emmc_b1 {
status = "disabled";
sd {
caps = "MMC_CAP_4_BIT_DATA",
"MMC_CAP_MMC_HIGHSPEED",
"MMC_CAP_SD_HIGHSPEED";
f_min = <400000>;
f_max = <50000000>;
};
};
&sd_emmc_b2 {
status = "disabled";
sd {
caps = "MMC_CAP_4_BIT_DATA",
"MMC_CAP_MMC_HIGHSPEED",

33
arch/arm64/boot/dts/amlogic/g12a_s905y2_u221.dts
View File

@@ -1145,8 +1145,8 @@
};
};
&sd_emmc_b {
status = "okay";
&sd_emmc_b1 {
status = "disabled";
sd {
caps = "MMC_CAP_4_BIT_DATA",
"MMC_CAP_MMC_HIGHSPEED",
@@ -1156,8 +1156,35 @@
};
};
&sd_emmc_b2 {
status = "disabled";
sd {
caps = "MMC_CAP_4_BIT_DATA",
"MMC_CAP_MMC_HIGHSPEED",
"MMC_CAP_SD_HIGHSPEED";
f_min = <400000>;
f_max = <50000000>;
};
sdio {
caps = "MMC_CAP_4_BIT_DATA",
"MMC_CAP_MMC_HIGHSPEED",
"MMC_CAP_SD_HIGHSPEED",
"MMC_CAP_NONREMOVABLE",
"MMC_CAP_UHS_SDR12",
"MMC_CAP_UHS_SDR25",
"MMC_CAP_UHS_SDR50",
"MMC_CAP_UHS_SDR104",
"MMC_PM_KEEP_POWER",
"MMC_CAP_SDIO_IRQ";
f_min = <400000>;
f_max = <200000000>;
};
};
&sd_emmc_a {
status = "okay";
status = "disabled";
sdio {
caps = "MMC_CAP_4_BIT_DATA",
"MMC_CAP_MMC_HIGHSPEED",

40
arch/arm64/boot/dts/amlogic/mesong12a.dtsi
View File

@@ -1297,6 +1297,7 @@
ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
/*caps defined in dts*/
tx_delay = <0>;
co_phase = <3>;
max_req_size = <0x20000>; /**128KB*/
gpio_dat3 = <&gpio BOOT_3 GPIO_ACTIVE_HIGH>;
hw_reset = <&gpio BOOT_9 GPIO_ACTIVE_HIGH>;
@@ -1307,7 +1308,44 @@
};
};
sd_emmc_b:sd@ffe05000 {
sd_emmc_b1:sd1@ffe05000 {
status = "disabled";
compatible = "amlogic, meson-mmc-g12a";
reg = <0x0 0xffe05000 0x0 0x800>;
interrupts = <0 190 1>;
pinctrl-names = "sd_all_pins",
"sd_clk_cmd_pins";
pinctrl-0 = <&sd_all_pins>;
pinctrl-1 = <&sd_clk_cmd_pins>;
clocks = <&clkc CLKID_SD_EMMC_B>,
<&clkc CLKID_SD_EMMC_B_P0_COMP>,
<&clkc CLKID_FCLK_DIV2>,
<&clkc CLKID_FCLK_DIV5>,
<&xtal>;
clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
bus-width = <4>;
cap-sd-highspeed;
cap-mmc-highspeed;
max-frequency = <100000000>;
disable-wp;
sd {
pinname = "sd";
ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
max_req_size = <0x20000>; /**128KB*/
gpio_dat3 = <&gpio GPIOC_4 GPIO_ACTIVE_HIGH>;
jtag_pin = <&gpio GPIOC_0 GPIO_ACTIVE_HIGH>;
gpio_cd = <&gpio GPIOC_6 GPIO_ACTIVE_HIGH>;
card_type = <5>;
/* 3:sdio device(ie:sdio-wifi),
* 4:SD combo (IO+mem) card
*/
};
};
sd_emmc_b2:sd2@ffe05000 {
status = "disabled";
compatible = "amlogic, meson-mmc-g12a";
reg = <0x0 0xffe05000 0x0 0x800>;

60
drivers/amlogic/mmc/aml_sd_emmc.c
View File

@@ -1548,7 +1548,6 @@ static void aml_sd_emmc_kunmap_atomic(
* a linear buffer and an SG list for amlogic,
* We don't disable irq in this function
*/
#ifndef AML_MMC_TDMA
#ifdef CFG_SDEMMC_PIO
static u32 aml_sd_emmc_pre_pio(struct amlsd_host *host,
struct mmc_request *mrq, struct sd_emmc_desc_info *desc)
@@ -1621,7 +1620,6 @@ err_exit:
return ret;
}
#endif /* CFG_SDEMMC_PIO */
#endif
static unsigned int aml_sd_emmc_pre_dma(struct amlsd_host *host,
struct mmc_request *mrq, struct sd_emmc_desc_info *desc)
@@ -1869,7 +1867,8 @@ int meson_mmc_request_done(struct mmc_host *mmc, struct mmc_request *mrq)
aml_sd_emmc_check_sdio_irq(host);
mmc_request_done(host->mmc, mrq);
#ifdef AML_MMC_TDMA
if (aml_card_type_sdio(pdata) || aml_card_type_non_sdio(pdata))
if ((host->irq == 49)
&& (host->data->chip_type == MMC_CHIP_G12A))
complete(&host->drv_completion);
#endif
@@ -2208,13 +2207,15 @@ static void meson_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
pdata = mmc_priv(mmc);
host = pdata->host;
#ifdef AML_MMC_TDMA
if (aml_card_type_sdio(pdata) || aml_card_type_non_sdio(pdata))
if ((host->irq == 49)
&& (host->data->chip_type == MMC_CHIP_G12A))
wait_for_completion(&host->drv_completion);
#endif
if (aml_check_unsupport_cmd(mmc, mrq)) {
#ifdef AML_MMC_TDMA
if (aml_card_type_sdio(pdata) || aml_card_type_non_sdio(pdata))
if ((host->irq == 49)
&& (host->data->chip_type == MMC_CHIP_G12A))
complete(&host->drv_completion);
#endif
return;
@@ -2945,9 +2946,9 @@ static int meson_mmc_probe(struct platform_device *pdev)
struct amlsd_host *host;
struct amlsd_platform *pdata = NULL;
struct mmc_host *mmc;
int ret = 0, clk = 0, cfg = 0;
int ret = 0, clk = 0, cfg = 0, i = 0;
#ifdef AML_MMC_TDMA
int i = 0, k = 1;
int k = 1;
#endif
aml_mmc_ver_msg_show();
@@ -3047,7 +3048,8 @@ static int meson_mmc_probe(struct platform_device *pdev)
}
#ifdef AML_MMC_TDMA
if ((host->irq == 49) && (host->data->chip_type == MMC_CHIP_G12A)) {
if ((host->irq == 49)
&& (host->data->chip_type == MMC_CHIP_G12A)) {
init_completion(&host->drv_completion);
host->drv_completion.done = 1;
k = 2;
@@ -3068,16 +3070,12 @@ static int meson_mmc_probe(struct platform_device *pdev)
pdata = mmc_priv(mmc);
memset(pdata, 0, sizeof(struct amlsd_platform));
#ifdef AML_MMC_TDMA
ret = amlsd_get_platform_data(pdev, pdata, mmc, i);
#else
ret = amlsd_get_platform_data(pdev, pdata, mmc, 0);
#endif
if (ret)
if (amlsd_get_platform_data(pdev, pdata, mmc, i)) {
mmc_free_host(mmc);
break;
}
/* data desc buffer */
#ifndef AML_MMC_TDMA
#ifdef CFG_SDEMMC_PIO
pr_err(">>>>>>>>>>hostbase %p, dmode %s\n", host->base, pdata->dmode);
if (!strcmp(pdata->dmode, "pio")) {
@@ -3094,25 +3092,23 @@ static int meson_mmc_probe(struct platform_device *pdev)
goto free_cali;
}
} else {
#endif
#endif
host->pre_cmd_op = aml_sd_emmc_pre_dma;
host->post_cmd_op = aml_sd_emmc_post_dma;
host->desc_buf =
dma_alloc_coherent(host->dev,
SD_EMMC_MAX_DESC_MUN
* (sizeof(struct sd_emmc_desc_info)),
&host->desc_dma_addr, GFP_KERNEL);
if (host->desc_buf == NULL)
host->desc_buf =
dma_alloc_coherent(host->dev,
SD_EMMC_MAX_DESC_MUN
* (sizeof(struct sd_emmc_desc_info)),
&host->desc_dma_addr, GFP_KERNEL);
if (host->desc_buf == NULL) {
dev_err(host->dev, "Unable to map allocate DMA desc buffer.\n");
ret = -ENOMEM;
goto free_cali;
}
#ifndef AML_MMC_TDMA
#ifdef CFG_SDEMMC_PIO
}
#endif
#endif
if (aml_card_type_mmc(pdata)
@@ -3354,6 +3350,15 @@ static struct meson_mmc_data mmc_data_gxlx = {
.ds_pin_poll = 0x3c,
.ds_pin_poll_en = 0x4a,
.ds_pin_poll_bit = 15,
.sdmmc.init.core_phase = 3,
.sdmmc.init.tx_phase = 0,
.sdmmc.init.rx_phase = 0,
.sdmmc.hs.core_phase = 3,
.sdmmc.ddr.core_phase = 2,
.sdmmc.hs2.core_phase = 2,
.sdmmc.hs4.tx_delay = 0,
.sdmmc.sd_hs.core_phase = 2,
.sdmmc.sdr104.core_phase = 2,
};
static struct meson_mmc_data mmc_data_txhd = {
.chip_type = MMC_CHIP_TXHD,
@@ -3362,6 +3367,15 @@ static struct meson_mmc_data mmc_data_txhd = {
.ds_pin_poll = 0x3c,
.ds_pin_poll_en = 0x4a,
.ds_pin_poll_bit = 11,
.sdmmc.init.core_phase = 3,
.sdmmc.init.tx_phase = 0,
.sdmmc.init.rx_phase = 0,
.sdmmc.hs.core_phase = 3,
.sdmmc.ddr.core_phase = 2,
.sdmmc.hs2.core_phase = 2,
.sdmmc.hs4.tx_delay = 0,
.sdmmc.sd_hs.core_phase = 2,
.sdmmc.sdr104.core_phase = 2,
};
static struct meson_mmc_data mmc_data_g12a = {

20
drivers/amlogic/mmc/aml_sd_emmc_v3.c
View File

@@ -248,10 +248,10 @@ static void aml_sd_emmc_set_timing_v3(struct amlsd_platform *pdata,
pr_info("%s: try set sd/emmc to DDR mode\n",
mmc_hostname(host->mmc));
} else if (timing == MMC_TIMING_MMC_HS) {
if (host->data->chip_type < MMC_CHIP_G12A)
clkc->core_phase = para->hs.core_phase;
else
clkc->core_phase = 2;
clkc->core_phase = para->hs.core_phase;
/* overide co-phase by dts */
if (pdata->co_phase)
clkc->core_phase = pdata->co_phase;
} else if (timing == MMC_TIMING_MMC_HS200) {
clkc->core_phase = para->hs2.core_phase;
} else if ((timing == MMC_TIMING_SD_HS)
@@ -259,6 +259,7 @@ static void aml_sd_emmc_set_timing_v3(struct amlsd_platform *pdata,
clkc->core_phase = para->sd_hs.core_phase;
} else if (timing == MMC_TIMING_UHS_SDR104) {
clkc->core_phase = para->sdr104.core_phase;
} else
ctrl->ddr = 0;
@@ -307,12 +308,14 @@ void meson_mmc_set_ios_v3(struct mmc_host *mmc,
struct amlsd_host *host = pdata->host;
#ifdef AML_MMC_TDMA
if (aml_card_type_sdio(pdata) || aml_card_type_non_sdio(pdata))
if ((host->irq == 49)
&& (host->data->chip_type == MMC_CHIP_G12A))
wait_for_completion(&host->drv_completion);
#endif
if (!pdata->is_in) {
#ifdef AML_MMC_TDMA
if (aml_card_type_sdio(pdata) || aml_card_type_non_sdio(pdata))
if ((host->irq == 49)
&& (host->data->chip_type == MMC_CHIP_G12A))
complete(&host->drv_completion);
#endif
return;
@@ -340,8 +343,9 @@ void meson_mmc_set_ios_v3(struct mmc_host *mmc,
else if (ios->chip_select == MMC_CS_DONTCARE)
aml_cs_dont_care(mmc);
#ifdef AML_MMC_TDMA
if (aml_card_type_sdio(pdata) || aml_card_type_non_sdio(pdata))
complete(&host->drv_completion);
if ((host->irq == 49)
&& (host->data->chip_type == MMC_CHIP_G12A))
complete(&host->drv_completion);
#endif
}

20
drivers/amlogic/mmc/amlsd.c
View File

@@ -453,9 +453,6 @@ void of_amlsd_xfer_pre(struct amlsd_platform *pdata)
char *p = pinctrl;
int i, size = 0;
struct pinctrl *ppin;
#if 0
int val = 0;
#endif
size = sizeof(pinctrl);
#ifdef CONFIG_AMLOGIC_M8B_MMC
@@ -518,23 +515,6 @@ void of_amlsd_xfer_pre(struct amlsd_platform *pdata)
*/
mdelay(1);
}
#if 0
if (!strcmp(host->pinctrl_name,
"sdio_all_pins")
|| !strcmp(host->pinctrl_name,
"sdio_clk_cmd_pins")) {
val = readl(host->pinmux_base + (0x16 << 2));
val &= ~(1 << 4);
writel(val, host->pinmux_base + (0x16 << 2));
} else if (!strcmp(host->pinctrl_name,
"sd_all_pins")
|| !strcmp(host->pinctrl_name,
"sd_clk_cmd_pins")) {
val = readl(host->pinmux_base + (0x13 << 2));
val &= ~(1 << 4);
writel(val, host->pinmux_base + (0x13 << 2));
}
#endif
if (i == 100)
pr_err("CMD%d: get pinctrl %s fail.\n",
host->opcode, pinctrl);

2
drivers/amlogic/mmc/amlsd_of.c
View File

@@ -184,6 +184,8 @@ int amlsd_get_platform_data(struct platform_device *pdev,
prop, pdata->card_type);
SD_PARSE_U32_PROP_DEC(child, "tx_delay",
prop, pdata->tx_delay);
SD_PARSE_U32_PROP_DEC(child, "co_phase",
prop, pdata->co_phase);
if (aml_card_type_mmc(pdata)) {
/*tx_phase set default value first*/
SD_PARSE_U32_PROP_DEC(child, "tx_phase",

4
include/linux/amlogic/sd.h
View File

@@ -39,7 +39,7 @@
#define CALI_PATTERN_OFFSET ((SZ_1M * (36 + 3)) / 512)
/* #define AML_RESP_WR_EXT */
/* pio to transfer data */
#define CFG_SDEMMC_PIO (0)
#define CFG_SDEMMC_PIO (1)
#ifdef AML_CALIBRATION
#define MAX_CALI_RETRY 3
@@ -243,6 +243,7 @@ struct amlsd_platform {
unsigned int card_capacity;
unsigned int tx_phase;
unsigned int tx_delay;
unsigned int co_phase;
unsigned int f_min;
unsigned int f_max;
unsigned int clkc;
@@ -451,7 +452,6 @@ struct amlsd_host {
struct mmc_request *mrq2;
spinlock_t mrq_lock;
struct mutex pinmux_lock;
struct mutex pdata_lock;
struct completion drv_completion;
int cmd_is_stop;
enum aml_mmc_waitfor xfer_step;