input: touchscreen: add support for Himax hx83192

Change-Id: Ibbc9bb7cdd4dfae9d2bcbc8c0346f9446e1534af
Signed-off-by: Zitong Cai <zitong.cai@rock-chips.com>

drivers/input/touchscreen/Kconfig

@@ -1444,4 +1444,6 @@ config TOUCHSCREEN_ZINITIX
 	  To compile this driver as a module, choose M here: the
 	  module will be called zinitix.
 
+source "drivers/input/touchscreen/hxchipset/Kconfig"
+
 endif

drivers/input/touchscreen/Makefile

@@ -131,3 +131,4 @@ obj-$(CONFIG_TOUCHSCREEN_ROHM_BU21023)	+= rohm_bu21023.o
 obj-$(CONFIG_TOUCHSCREEN_RASPBERRYPI_FW)	+= raspberrypi-ts.o
 obj-$(CONFIG_TOUCHSCREEN_IQS5XX)	+= iqs5xx.o
 obj-$(CONFIG_TOUCHSCREEN_ZINITIX)	+= zinitix.o
+obj-$(CONFIG_TOUCHSCREEN_HIMAX_CHIPSET)	+= hxchipset/

drivers/input/touchscreen/hxchipset/Kconfig

@@ -0,0 +1,66 @@
+#SPDX-License-Identifier: GPL-2.0
+#
+# Himax Touchscreen driver configuration
+#
+config TOUCHSCREEN_HIMAX_CHIPSET
+        tristate "HIAMX touchscreens support"
+
+if TOUCHSCREEN_HIMAX_CHIPSET
+
+config TOUCHSCREEN_HIMAX_COMMON
+        tristate "HIMAX chipset i2c touchscreen"
+		depends on TOUCHSCREEN_HIMAX_CHIPSET
+		help
+		This enables support for HIMAX CHIPSET over I2C based touchscreens.
+
+choice
+	prompt "HIMAX touch IC types"
+	depends on TOUCHSCREEN_HIMAX_COMMON
+	default TOUCHSCREEN_HIMAX_INCELL
+
+config TOUCHSCREEN_HIMAX_INCELL
+        bool "HIMAX chipset in-cell function"
+		depends on TOUCHSCREEN_HIMAX_COMMON
+		help
+		This enables support for HIMAX CHIPSET of in-cell function.
+
+endchoice
+# ***************** In-cell Start *****************
+config TOUCHSCREEN_HIMAX_IC_HX83193
+        tristate "HIMAX chipset HX83193 function"
+		depends on TOUCHSCREEN_HIMAX_INCELL
+		help
+		This enables support for HIMAX CHIPSET of HX83193.
+
+config TOUCHSCREEN_HIMAX_IC_HX83192
+        tristate "HIMAX chipset HX83192 function"
+		depends on TOUCHSCREEN_HIMAX_INCELL
+		help
+		This enables support for HIMAX CHIPSET of HX83192.
+
+config TOUCHSCREEN_HIMAX_IC_HX83191
+        tristate "HIMAX chipset HX83191 function"
+		depends on TOUCHSCREEN_HIMAX_INCELL
+		help
+		This enables support for HIMAX CHIPSET of HX83191.
+
+# ***************** In-cell End *******************
+
+config TOUCHSCREEN_HIMAX_DEBUG
+        bool "HIMAX debug function"
+		depends on TOUCHSCREEN_HIMAX_INCELL
+		help
+		This enables support for HIMAX debug function.
+config TOUCHSCREEN_HIMAX_INSPECT
+        bool "HIMAX inspect function"
+		depends on TOUCHSCREEN_HIMAX_INCELL
+		help
+		This enables support for HIMAX debug function.
+
+config TOUCHSCREEN_HIMAX_EMBEDDED_FIRMWARE
+	bool "HIMAX embedded firmware function"
+		depends on TOUCHSCREEN_HIMAX_INCELL
+		help
+		This enables built-in FW inside kernel as binary array
+
+endif

drivers/input/touchscreen/hxchipset/Makefile

@@ -0,0 +1,98 @@
+#SPDX-License-Identifier: GPL-2.0
+#
+# Makefile for the Himax touchscreen drivers.
+#
+ifneq ($(filter y, $(CONFIG_KALLSYMS_ALL)),)
+	ccflags-y += -D__KERNEL_KALLSYMS_ALL_ENABLED__
+endif
+
+ifneq ($(filter y, $(CONFIG_FB)),)
+	ccflags-y += -DHX_CONFIG_FB
+endif
+
+ifneq ($(filter y, $(CONFIG_DRM)),)
+	#ccflags-y += -DHX_CONFIG_DRM
+endif
+
+ifneq ($(filter y m, $(CONFIG_TOUCHSCREEN_HIMAX_DEBUG)),)
+	himax_mmi-objs += himax_debug.o
+endif
+
+ifneq ($(filter y m, $(CONFIG_TOUCHSCREEN_HIMAX_INSPECT)),)
+	himax_mmi-objs += himax_inspection.o
+endif
+
+ifneq ($(filter y m, $(CONFIG_TOUCHSCREEN_HIMAX_INCELL)),)
+	himax_mmi-objs += himax_ic_incell_core.o
+endif
+
+ifneq ($(filter y m, $(CONFIG_TOUCHSCREEN_HIMAX_IC_HX83193)),)
+  ccflags-y += -D__HIMAX_HX83193_MOD__
+  ifneq ($(filter m, $(CONFIG_TOUCHSCREEN_HIMAX_COMMON)),)
+	obj-m += himax_ic_HX83193.o
+  endif
+  ifneq ($(filter y, $(CONFIG_TOUCHSCREEN_HIMAX_COMMON)),)
+	obj-y += himax_ic_HX83193.o
+  endif
+endif
+
+ifneq ($(filter y m, $(CONFIG_TOUCHSCREEN_HIMAX_IC_HX83192)),)
+  ccflags-y += -D__HIMAX_HX83192_MOD__
+  ifneq ($(filter m, $(CONFIG_TOUCHSCREEN_HIMAX_COMMON)),)
+	himax_mmi-objs += himax_ic_HX83192.o
+  endif
+  ifneq ($(filter y, $(CONFIG_TOUCHSCREEN_HIMAX_COMMON)),)
+	obj-y += himax_ic_HX83192.o
+  endif
+endif
+
+ifneq ($(filter y m, $(CONFIG_TOUCHSCREEN_HIMAX_IC_HX83191)),)
+  ccflags-y += -D__HIMAX_HX83191_MOD__
+  ifneq ($(filter m, $(CONFIG_TOUCHSCREEN_HIMAX_COMMON)),)
+	obj-m += himax_ic_HX83191.o
+  endif
+  ifneq ($(filter y, $(CONFIG_TOUCHSCREEN_HIMAX_COMMON)),)
+	obj-y += himax_ic_HX83191.o
+  endif
+endif
+
+ifneq ($(filter m, $(CONFIG_TOUCHSCREEN_HIMAX_COMMON)),)
+  ccflags-y += -D__HIMAX_MOD__
+	himax_mmi-objs += himax_common.o
+	himax_mmi-objs += himax_platform.o
+ifneq ($(filter y, $(CONFIG_TOUCHSCREEN_HIMAX_EMBEDDED_FIRMWARE)),)
+	himax_mmi-objs += Himax_firmware.o
+endif
+	obj-m += himax_mmi.o
+endif
+ifneq ($(filter y, $(CONFIG_TOUCHSCREEN_HIMAX_COMMON)),)
+	himax_mmi-objs += himax_common.o
+	himax_mmi-objs += himax_platform.o
+ifneq ($(filter y, $(CONFIG_TOUCHSCREEN_HIMAX_EMBEDDED_FIRMWARE)),)
+	himax_mmi-objs += Himax_firmware.o
+endif
+	obj-y += himax_mmi.o
+endif
+
+ifneq ($(filter y, $(CONFIG_TOUCHSCREEN_HIMAX_EMBEDDED_FIRMWARE)),)
+ccflags-y += -D__EMBEDDED_FW__
+
+ld_array_start_str = _binary_$(srctree)/$(src)_Himax_firmware_bin_start
+ld_array_start_sym = $(subst -,_,$(subst .,_,$(subst /,_,$(ld_array_start_str))))
+obj_array_start_sym = _binary___Himax_firmware_bin_start
+
+ld_array_size_str = _binary_$(srctree)/$(src)_Himax_firmware_bin_size
+ld_array_size_sym = $(subst -,_,$(subst .,_,$(subst /,_,$(ld_array_size_str))))
+obj_array_size_sym = _binary___Himax_firmware_bin_size
+
+ld_array_end_str = _binary_$(srctree)/$(src)_Himax_firmware_bin_end
+ld_array_end_sym = $(subst -,_,$(subst .,_,$(subst /,_,$(ld_array_end_str))))
+obj_array_end_sym = _binary___Himax_firmware_bin_end
+
+$(src)/Himax_firmware.o: $(src)/Himax_firmware.bin FORCE
+	$(LD) $(LDFLAGS) -r -b binary $(srctree)/$(src)/Himax_firmware.bin -o $(objtree)/$(obj)/Himax_firmware.o
+	$(OBJCOPY) --redefine-sym $(ld_array_start_sym)=$(obj_array_start_sym) $(objtree)/$(obj)/Himax_firmware.o
+	$(OBJCOPY) --redefine-sym $(ld_array_size_sym)=$(obj_array_size_sym) $(objtree)/$(obj)/Himax_firmware.o
+	$(OBJCOPY) --redefine-sym $(ld_array_end_sym)=$(obj_array_end_sym) $(objtree)/$(obj)/Himax_firmware.o
+
+endif

drivers/input/touchscreen/hxchipset/himax.h

@@ -0,0 +1,431 @@
+/* Himax Android Driver Sample Code for common functions
+ *
+ * Copyright (C) 2021 Himax Corporation.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef HIMAX_H
+#define HIMAX_H
+
+#include <linux/uaccess.h>
+#include <linux/atomic.h>
+#include <linux/extcon.h>
+#include <linux/delay.h>
+#include <linux/i2c.h>
+#include <linux/input.h>
+#include <linux/interrupt.h>
+#include <linux/module.h>
+#include <linux/async.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <linux/gpio.h>
+#include <linux/input/mt.h>
+#include <linux/firmware.h>
+#include <linux/types.h>
+#include <linux/fs.h>
+#include <linux/buffer_head.h>
+#include <linux/pm_wakeup.h>
+#include <linux/seq_file.h>
+#include <linux/proc_fs.h>
+#include <linux/kallsyms.h>
+
+#if defined(CONFIG_OF)
+#include <linux/of_gpio.h>
+#endif
+
+#define TRC_EOL "\n"
+#define TRC_EOL_LENGTH sizeof(TRC_EOL)
+#define TRC_LINE_LENGTH 68
+#define TRC_TEXT_LENGTH (TRC_LINE_LENGTH - TRC_EOL_LENGTH) /* reserve space */
+#define TRC_NUM_LINES 5000
+
+struct himax_ts_data;
+
+struct himax_ic_data {
+	int vendor_arch_ver;
+	int vendor_config_ver;
+	int vendor_touch_cfg_ver;
+	int vendor_display_cfg_ver;
+	int vendor_cid_maj_ver;
+	int vendor_cid_min_ver;
+	int vendor_panel_ver;
+	int vendor_sensor_id;
+	int ic_adc_num;
+	uint8_t vendor_config_date[12];
+	uint8_t vendor_cus_info[12];
+	uint8_t vendor_proj_info[12];
+	uint8_t vendor_ic_id[13];
+	int HX_RX_NUM;
+	int HX_TX_NUM;
+	int HX_BT_NUM;
+	int HX_X_RES;
+	int HX_Y_RES;
+	int HX_MAX_PT;
+	bool HX_XY_REVERSE;
+	bool HX_INT_IS_EDGE;
+	bool HX_IS_ID_EN;
+	int HX_RX_NUM_2;
+	int HX_TX_NUM_2;
+};
+
+struct himax_report_data {
+	int touch_all_size;
+	int raw_cnt_max;
+	int raw_cnt_rmd;
+	int touch_info_size;
+	uint8_t finger_num;
+	uint8_t finger_on;
+	uint8_t *hx_coord_buf;
+	uint8_t hx_state_info[2];
+	int rawdata_size;
+	uint8_t diag_cmd;
+	uint8_t *hx_rawdata_buf;
+	uint8_t rawdata_frame_size;
+};
+
+struct himax_core_fp {
+	void (*fp_burst_enable)(struct himax_ts_data *ts, uint8_t auto_add_4_byte);
+	void (*fp_interface_on)(struct himax_ts_data *ts);
+	void (*fp_sense_on)(struct himax_ts_data *ts, uint8_t FlashMode);
+	bool (*fp_sense_off)(struct himax_ts_data *ts, bool check_en);
+	bool (*fp_wait_wip)(struct himax_ts_data *ts, int Timing);
+	void (*fp_init_psl)(struct himax_ts_data *ts);
+	void (*fp_resume_ic_action)(struct himax_ts_data *ts);
+	void (*fp_suspend_ic_action)(struct himax_ts_data *ts);
+	void (*fp_power_on_init)(struct himax_ts_data *ts);
+	bool (*fp_dd_clk_set)(struct himax_ts_data *ts, bool enable);
+	void (*fp_dd_reg_en)(struct himax_ts_data *ts, bool enable);
+	bool (*fp_dd_reg_write)(struct himax_ts_data *ts, uint8_t addr, uint8_t pa_num, int len,
+				uint8_t *data, uint8_t bank);
+	bool (*fp_dd_reg_read)(struct himax_ts_data *ts, uint8_t addr, uint8_t pa_num, int len,
+			       uint8_t *data, uint8_t bank);
+	bool (*fp_ic_id_read)(struct himax_ts_data *ts);
+	/* CORE_FW */
+	void (*fp_parse_raw_data)(struct himax_ts_data *ts, struct himax_report_data *hx_touch_data,
+				  int mul_num, int self_num, uint8_t diag_cmd, int16_t *mutual_data,
+				  int16_t *self_data);
+	void (*fp_system_reset)(struct himax_ts_data *ts);
+	int (*fp_Calculate_CRC_with_AP)(struct himax_ts_data *ts, unsigned char *FW_content,
+					int CRC_from_FW, int len);
+	uint32_t (*fp_check_CRC)(struct himax_ts_data *ts, uint8_t *start_addr, int reload_length);
+	void (*fp_diag_register_set)(struct himax_ts_data *ts, uint8_t diag_command,
+				     uint8_t storage_type, bool is_dirly);
+	void (*fp_control_reK)(struct himax_ts_data *ts, bool enable);
+	int (*fp_chip_self_test)(struct himax_ts_data *ts, struct seq_file *s, void *v);
+	void (*fp_reload_disable)(struct himax_ts_data *ts, int disable);
+	int (*fp_read_ic_trigger_type)(struct himax_ts_data *ts);
+	void (*fp_read_FW_ver)(struct himax_ts_data *ts);
+	bool (*fp_read_event_stack)(struct himax_ts_data *ts, uint8_t *buf, uint8_t length);
+	void (*fp_return_event_stack)(struct himax_ts_data *ts);
+	bool (*fp_calculateChecksum)(struct himax_ts_data *ts, bool change_iref, uint32_t size);
+	void (*fp_read_FW_status)(struct himax_ts_data *ts);
+	void (*fp_irq_switch)(struct himax_ts_data *ts, int switch_on);
+	int (*fp_assign_sorting_mode)(struct himax_ts_data *ts, uint8_t *tmp_data);
+	int (*fp_check_sorting_mode)(struct himax_ts_data *ts, uint8_t *tmp_data);
+	int (*fp_get_max_dc)(struct himax_ts_data *ts);
+	/* CORE_FW */
+
+	/* CORE_FLASH */
+	void (*fp_chip_erase)(struct himax_ts_data *ts);
+	bool (*fp_block_erase)(struct himax_ts_data *ts, int start_addr, int length);
+	bool (*fp_sector_erase)(struct himax_ts_data *ts, int start_addr, int length);
+	void (*fp_flash_programming)(struct himax_ts_data *ts, uint8_t *FW_content, int start_addr,
+				     int FW_Size);
+	void (*fp_flash_page_write)(struct himax_ts_data *ts, uint8_t *write_addr, int length,
+				    uint8_t *write_data);
+	int (*fp_fts_ctpm_fw_upgrade_with_sys_fs_64k)(struct himax_ts_data *ts, unsigned char *fw,
+						      int len, bool change_iref);
+	int (*fp_fts_ctpm_fw_upgrade_with_sys_fs_128k)(struct himax_ts_data *ts, unsigned char *fw,
+						       int len, bool change_iref);
+	void (*fp_flash_dump_func)(struct himax_ts_data *ts, uint8_t local_flash_command,
+				   int Flash_Size, uint8_t *flash_buffer);
+	bool (*fp_flash_lastdata_check)(struct himax_ts_data *ts, uint32_t size);
+	bool (*fp_bin_desc_get)(struct himax_ts_data *ts, unsigned char *fw, uint32_t max_sz);
+	void (*fp_flash_read)(struct himax_ts_data *ts, uint8_t *r_data, int start_addr,
+			      int length);
+	/* CORE_FLASH */
+
+	/* CORE_SRAM */
+	bool (*fp_get_DSRAM_data)(struct himax_ts_data *ts, uint8_t *info_data, bool DSRAM_Flag);
+	/* CORE_SRAM */
+
+	/* CORE_DRIVER */
+	void (*fp_chip_init)(struct himax_ts_data *ts);
+	int (*fp_fw_ver_bin)(struct himax_ts_data *ts);
+	void (*fp_pin_reset)(struct himax_ts_data *ts);
+	void (*fp_touch_information)(struct himax_ts_data *ts);
+	void (*fp_reload_config)(struct himax_ts_data *ts);
+	int (*fp_get_touch_data_size)(struct himax_ts_data *ts);
+	int (*fp_cal_data_len)(struct himax_ts_data *ts, int raw_cnt_rmd, int HX_MAX_PT,
+			       int raw_cnt_max);
+	bool (*fp_diag_check_sum)(struct himax_ts_data *ts,
+				  struct himax_report_data *hx_touch_data);
+	void (*fp_diag_parse_raw_data)(struct himax_ts_data *ts,
+				       struct himax_report_data *hx_touch_data, int mul_num,
+				       int self_num, uint8_t diag_cmd, int32_t *mutual_data,
+				       int32_t *self_data);
+	void (*fp_ic_reset)(struct himax_ts_data *ts, uint8_t loadconfig, uint8_t int_off);
+};
+
+struct himax_virtual_key {
+	int index;
+	int keycode;
+	int x_range_min;
+	int x_range_max;
+	int y_range_min;
+	int y_range_max;
+};
+
+struct trc_line {
+	u8 read_offset;
+	char text[TRC_LINE_LENGTH];
+};
+
+struct trc_lines {
+	bool enabled;
+	struct mutex mutex;
+	int fill_status;
+	int read_idx;
+	int write_idx;
+	struct trc_line lines[TRC_NUM_LINES];
+};
+
+struct himax_debug_ops {
+	void (*fp_ts_dbg_func)(struct himax_ts_data *ts, int start);
+	int (*fp_set_diag_cmd)(struct himax_ts_data *ts, struct himax_ic_data *ic_data,
+			       struct himax_report_data *hx_touch_data);
+};
+
+struct himax_debug_procfs {
+	struct proc_dir_entry *proc_dir;
+	struct proc_dir_entry *self_test;
+	struct proc_dir_entry *wpbplock_node;
+	struct proc_dir_entry *fail_det;
+	struct proc_dir_entry *inspect_mode;
+
+	struct proc_dir_entry *diag_dir;
+	struct proc_dir_entry *stack;
+	struct proc_dir_entry *delta;
+	struct proc_dir_entry *dc;
+	struct proc_dir_entry *baseline;
+
+	struct proc_dir_entry *vendor;
+	struct proc_dir_entry *debug;
+	struct proc_dir_entry *flash_dump;
+};
+
+#define BUF_SIZE 1024
+
+struct himax_debug {
+	struct himax_debug_ops ops;
+	bool flash_dump_going;
+	uint8_t diag_arr_num;
+	int max_mutual;
+	int min_mutual;
+	int max_self;
+	int min_self;
+	uint8_t byte_length;
+	uint8_t reg_cmd[4];
+	struct himax_debug_procfs procfs;
+	uint8_t cfg_flag;
+	bool dsram_flag;
+	bool is_2t2r;
+	int hx_rx_num_2;
+	int hx_tx_num_2;
+	uint32_t *diag_mutual_2;
+	int32_t *diag_mutual;
+	int32_t *diag_mutual_new;
+	int32_t *diag_mutual_old;
+	uint8_t diag_max_cnt;
+	uint8_t hx_state_info[2];
+	uint8_t diag_coor[128];
+	int32_t *diag_self;
+	int32_t *diag_self_new;
+	int32_t *diag_self_old;
+	uint8_t *gma_buf;
+	bool fw_update_complete;
+	bool fw_update_going;
+	int handshaking_result;
+	unsigned char debug_level_cmd;
+	int flash_size;
+	uint8_t *flash_buffer;
+	uint8_t flash_cmd;
+	uint8_t flash_progress;
+	bool flash_dump_rst; /*Fail = 0, Pass = 1*/
+	char buf_tmp[BUF_SIZE];
+	uint8_t *reg_read_data;
+	struct timespec64 time_start;
+	struct timespec64 time_end;
+	struct timespec64 time_delta;
+	uint8_t process_type;
+	uint8_t mode_flag;
+	uint8_t h_overflow;
+};
+
+struct himax_ic_incell {
+	struct fw_operation *pfw_op;
+	struct flash_operation *pflash_op;
+};
+
+struct himax_target_report_data {
+	int *x;
+	int *y;
+	int *w;
+	int *finger_id;
+	int finger_on;
+	int finger_num;
+	int ig_count;
+};
+
+struct himax_ts_data {
+	bool initialized;
+	bool suspended;
+	atomic_t suspend_mode;
+	uint8_t x_channel;
+	uint8_t y_channel;
+	uint8_t useScreenRes;
+	uint8_t diag_cmd;
+	char chip_name[30];
+	uint8_t chip_cell_type;
+	uint8_t protocol_type;
+	uint8_t first_pressed;
+	uint8_t coord_data_size;
+	uint8_t area_data_size;
+	uint8_t coordInfoSize;
+	uint8_t raw_data_frame_size;
+	uint8_t nFinger_support;
+	uint8_t irq_enabled;
+	uint8_t diag_self[50];
+	uint16_t finger_pressed;
+	uint16_t last_slot;
+	uint16_t pre_finger_mask;
+	uint16_t old_finger;
+	int hx_point_num;
+	uint32_t debug_log_level;
+	uint32_t widthFactor;
+	uint32_t heightFactor;
+	int lcm_gpio;
+	int rst_gpio;
+	int use_irq;
+	int (*power)(int on);
+	int pre_finger_data[10][2];
+	struct device *dev;
+	struct extcon_dev *edev;
+	struct workqueue_struct *himax_wq;
+	struct work_struct work;
+	struct input_dev *input_dev;
+	struct hrtimer timer;
+	struct i2c_client *client;
+	struct himax_i2c_platform_data *pdata;
+	struct himax_virtual_key *button;
+	struct mutex rw_lock;
+	atomic_t irq_state;
+	spinlock_t irq_lock;
+	/******* SPI-start *******/
+	struct spi_device *spi;
+	int hx_irq;
+	uint8_t *xfer_buff;
+	/******* SPI-end *******/
+	int in_self_test;
+	int suspend_resume_done;
+	int bus_speed;
+	int touch_num;
+
+	struct notifier_block fb_notif;
+	struct workqueue_struct *himax_att_wq;
+	struct delayed_work work_att;
+
+	struct workqueue_struct *flash_wq;
+	struct work_struct flash_work;
+
+	struct workqueue_struct *himax_boot_upgrade_wq;
+	struct delayed_work work_boot_upgrade;
+
+	struct workqueue_struct *ts_int_workqueue;
+	struct delayed_work ts_int_work;
+
+	struct workqueue_struct *himax_diag_wq;
+	struct delayed_work himax_diag_delay_wrok;
+	struct trc_lines trc_lines;
+	struct notifier_block cable_hotplug_nb;
+	bool probe_flag;
+	struct work_struct probe_work;
+	struct work_struct connected_work;
+	struct work_struct disconnected_work;
+
+	struct himax_debug debug;
+	struct himax_ic_incell ic_incell;
+	struct himax_core_fp core_fp;
+	struct himax_core_command_operation *core_cmd_op;
+	struct sram_operation *psram_op;
+	uint8_t *internal_buffer;
+
+	/* inspection */
+	int gap_vertical_partial;
+	int *gap_vertical_part;
+	int gap_horizontal_partial;
+	int *gap_horizontal_part;
+	int dc_max;
+	int one_kind_raw_size;
+	uint32_t rslt_data_len;
+	int **inspection_criteria;
+	int *inspt_crtra_flag;
+	int *test_item_flag;
+	int do_lpwg_test;
+	int hx_criteria_item;
+	int hx_criteria_size;
+	char *rslt_data;
+	bool file_w_flag;
+	char file_path[256];
+	char rslt_log[256];
+	char start_log[512];
+
+	struct himax_ic_data *ic_data;
+	unsigned char ic_checksum;
+	unsigned long fw_ver_maj_flash_addr;
+	unsigned long fw_ver_min_flash_addr;
+	unsigned long cfg_ver_maj_flash_addr;
+	unsigned long cfg_ver_min_flash_addr;
+	unsigned long cid_ver_maj_flash_addr;
+	unsigned long cid_ver_min_flash_addr;
+	uint32_t cfg_table_flash_addr;
+	int fw_ver;
+	int cfg_ver;
+	int cid_maj; /*GUEST ID*/
+	int cid_min; /*VER for GUEST*/
+	const struct firmware *hxfw;
+	bool boot_upgrade_flag;
+	uint32_t hx_chip_inited;
+	struct himax_report_data *hx_touch_data;
+	int hx_ic_amount;
+
+	/*ts_work about start*/
+	struct himax_target_report_data *target_report_data;
+	/*ts_work about end*/
+	int hx_touch_info_point_cnt;
+	bool chip_test_r_flag;
+	u8 hx_hw_reset_activate;
+	uint8_t aa_press;
+	uint8_t en_noisefilter;
+	uint8_t last_en_noisefilter;
+	int p_point_num;
+	int ts_dbg;
+	uint8_t hx_proc_send_flag;
+	uint8_t inspect_mode_flag;
+
+	u8 *rw_buf;
+	int hx_fail_det;
+
+	const char *location;
+	struct list_head chips;
+};
+
+#endif

drivers/input/touchscreen/hxchipset/himax_common.h

@@ -0,0 +1,208 @@
+/* Himax Android Driver Sample Code for common functions
+ *
+ * Copyright (C) 2021 Himax Corporation.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef HIMAX_COMMON_H
+#define HIMAX_COMMON_H
+
+#include <linux/uaccess.h>
+#include <linux/atomic.h>
+#include <linux/extcon.h>
+#include <linux/delay.h>
+#include <linux/i2c.h>
+#include <linux/input.h>
+#include <linux/interrupt.h>
+#include <linux/module.h>
+#include <linux/async.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <linux/gpio.h>
+#include <linux/input/mt.h>
+#include <linux/firmware.h>
+#include <linux/types.h>
+#include <linux/fs.h>
+#include <linux/buffer_head.h>
+#include <linux/pm_wakeup.h>
+#include <linux/seq_file.h>
+#include <linux/proc_fs.h>
+#include <linux/kallsyms.h>
+#if defined(CONFIG_OF)
+#include <linux/of_gpio.h>
+#endif
+
+#include "himax_platform.h"
+
+#define HIMAX_DRIVER_VER "Sample_code_V61_A08.5.2"
+#define FLASH_DUMP_FILE "/sdcard/HX_Flash_Dump.bin"
+
+#if defined(CONFIG_TOUCHSCREEN_HIMAX_DEBUG)
+#define HX_TP_PROC_2T2R
+/*if enable, selftest works in driver*/
+/*#define HX_TP_SELF_TEST_DRIVER*/
+#endif
+
+/*===========Himax Option function=============*/
+#define HX_BOOT_UPGRADE
+/*#define HX_PROTOCOL_A*/
+#define HX_PROTOCOL_B_3PA
+#define HX_SYSTEM_RESET 1
+
+/*for Himax auto-motive chipset */
+#define HX_RST_PIN_FUNC
+#define HX_TP_INSPECT_MODE
+#define HX_FIX_TOUCH_INFO
+/*#define HX_ID_EN*/
+/*#define FCA_PROTOCOL_EN */
+/*=============================================*/
+
+/* Enable it if driver go into suspend/resume twice */
+/*#undef HX_CONFIG_FB*/
+/* Enable it if driver go into suspend/resume twice */
+/*#undef HX_CONFIG_DRM*/
+
+#if defined(HX_CONFIG_FB)
+#include <linux/notifier.h>
+#include <linux/fb.h>
+#elif defined(HX_CONFIG_DRM)
+#include <linux/msm_drm_notify.h>
+#endif
+
+#if defined(__HIMAX_MOD__)
+#define HX_USE_KSYM
+#if !defined(HX_USE_KSYM) || !defined(__KERNEL_KALLSYMS_ALL_ENABLED__)
+#error Modulized driver must enable HX_USE_KSYM and CONFIG_KALLSYM_ALL
+#endif
+#endif
+
+/* WP GPIO setting, decided by which pin direct to OS side, WP need pin */
+/* high either GPIO0 or GPIO4 */
+/* #define WP_GPIO0 */
+#define WP_GPIO4
+
+#if defined(HX_BOOT_UPGRADE)
+/* FW Auto upgrade case, you need to setup the fix_touch_info of module */
+#define BOOT_UPGRADE_FWNAME "Himax_firmware.bin"
+#endif
+
+#if defined(HX_CONTAINER_SPEED_UP)
+/* Resume queue delay work time after LCM RST (unit:ms) */
+#define DELAY_TIME 40
+#endif
+
+#define HX_MAX_WRITE_SZ (64 * 1024 + 4)
+#define HX_KEY_MAX_COUNT 4
+#define DEFAULT_RETRY_CNT 3
+
+#define HX_83191A_SERIES_PWON "HX83191A"
+#define HX_83192A_SERIES_PWON "HX83192A"
+#define HX_83193A_SERIES_PWON "HX83193A"
+
+#define HX_TP_BIN_CHECKSUM_SW 1
+#define HX_TP_BIN_CHECKSUM_HW 2
+#define HX_TP_BIN_CHECKSUM_CRC 3
+
+#define SHIFTBITS 5
+#define FW_SIZE_64k 65536
+#define FW_SIZE_128k 131072
+
+#define NO_ERR 0
+#define READY_TO_SERVE 1
+#define WORK_OUT 2
+
+#define I2C_FAIL -1
+#define HX_INIT_FAIL -1
+#define MEM_ALLOC_FAIL -2
+#define CHECKSUM_FAIL -3
+#define GESTURE_DETECT_FAIL -4
+#define INPUT_REGISTER_FAIL -5
+#define FW_NOT_READY -6
+#define LENGTH_FAIL -7
+#define OPEN_FILE_FAIL -8
+#define PROBE_FAIL -9
+#define ERR_WORK_OUT -10
+#define ERR_STS_WRONG -11
+#define ERR_TEST_FAIL -12
+
+#define HW_CRC_FAIL 1
+#define HX_FINGER_ON 1
+#define HX_FINGER_LEAVE 2
+
+#if defined(__EMBEDDED_FW__)
+extern const uint8_t _binary___Himax_firmware_bin_start[];
+extern const uint8_t _binary___Himax_firmware_bin_end[];
+extern struct firmware g_embedded_fw;
+#endif
+
+enum HX_TS_PATH {
+	HX_REPORT_COORD = 1,
+	HX_REPORT_COORD_RAWDATA,
+};
+
+enum HX_TS_STATUS {
+	HX_TS_GET_DATA_FAIL = -4,
+	HX_CHKSUM_FAIL,
+	HX_PATH_FAIL,
+	HX_TS_NORMAL_END = 0,
+	HX_READY_SERVE,
+	HX_REPORT_DATA,
+	HX_EXCP_WARNING,
+	HX_RST_OK,
+};
+
+enum cell_type { CHIP_IS_ON_CELL, CHIP_IS_IN_CELL };
+
+#if defined(HX_FIX_TOUCH_INFO)
+enum fix_touch_info {
+	FIX_HX_RX_NUM = 60,
+	FIX_HX_TX_NUM = 32,
+	FIX_HX_BT_NUM = 0,
+	FIX_HX_MAX_PT = 10,
+
+	FIX_HX_XY_REVERSE = false,
+	FIX_HX_INT_IS_EDGE = true,
+
+#if defined(HX_TP_PROC_2T2R)
+	FIX_HX_RX_NUM_2 = 0,
+	FIX_HX_TX_NUM_2 = 0,
+#endif
+};
+#endif
+
+enum input_protocol_type {
+	PROTOCOL_TYPE_A = 0x00,
+	PROTOCOL_TYPE_B = 0x01,
+};
+
+/*void himax_HW_reset(uint8_t loadconfig,uint8_t int_off);*/
+int himax_chip_common_suspend(struct himax_ts_data *ts);
+int himax_chip_common_resume(struct himax_ts_data *ts);
+
+struct himax_core_fp;
+extern struct device *g_device;
+
+#if defined(CONFIG_TOUCHSCREEN_HIMAX_DEBUG)
+int himax_debug_init(struct himax_ts_data *ts);
+int himax_debug_remove(struct himax_ts_data *ts);
+#endif
+
+int himax_parse_dt(struct himax_ts_data *ts, struct himax_i2c_platform_data *pdata);
+int himax_report_data(struct himax_ts_data *ts, int ts_path, int ts_status);
+int himax_report_data_init(struct himax_ts_data *ts);
+int himax_dev_set(struct himax_ts_data *ts);
+int himax_input_register_device(struct input_dev *input_dev);
+int himax_input_register(struct himax_ts_data *ts);
+
+#if defined(CONFIG_TOUCHSCREEN_HIMAX_INCELL)
+extern void himax_mcu_in_cmd_struct_free(struct himax_ts_data *ts);
+#endif
+#endif

drivers/input/touchscreen/hxchipset/himax_debug.h

@@ -0,0 +1,68 @@
+/* Himax Android Driver Sample Code for debug nodes
+ *
+ * Copyright (C) 2021 Himax Corporation.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef H_HIMAX_DEBUG
+#define H_HIMAX_DEBUG
+
+#include "himax_platform.h"
+#include "himax_common.h"
+
+int himax_touch_proc_init(struct himax_ts_data *ts);
+void himax_touch_proc_deinit(struct himax_ts_data *ts);
+
+#define HIMAX_PROC_VENDOR_FILE "vendor"
+#define HIMAX_PROC_PEN_POS_FILE "pen_pos"
+#define HIMAX_PROC_DIAG_FOLDER "diag"
+#define HIMAX_PROC_STACK_FILE "stack"
+#define HIMAX_PROC_DELTA_FILE "delta_s"
+#define HIMAX_PROC_DC_FILE "dc_s"
+#define HIMAX_PROC_BASELINE_FILE "baseline_s"
+#define HIMAX_PROC_DEBUG_FILE "debug"
+#define HIMAX_PROC_FLASH_DUMP_FILE "flash_dump"
+
+enum flash_dump_prog {
+	START,
+	ONGOING,
+	FINISHED,
+};
+
+extern uint8_t X_NUM4;
+
+#if defined(HX_RST_PIN_FUNC)
+extern void himax_ic_reset(uint8_t loadconfig, uint8_t int_off);
+#endif
+
+/* Moved from debug.c end */
+#define CMD_NUM 16
+static const char *dbg_cmd_str[] = {
+	"crc_test",
+	"fw_debug",
+	"attn",
+	"layout",
+	"senseonoff",
+	"debug_level",
+	"int_en",
+	"register",
+	"reset",
+	"diag_arr",
+	"diag",
+	"GMA",
+	NULL
+};
+
+static int dbg_cmd_flag;
+static char *dbg_cmd_par;
+static ssize_t (*dbg_func_ptr_r[CMD_NUM])(struct himax_ts_data *ts, char *buf, size_t len);
+static ssize_t (*dbg_func_ptr_w[CMD_NUM])(struct himax_ts_data *ts, char *buf, size_t len);
+#endif

drivers/input/touchscreen/hxchipset/himax_ic_HX83192.c

@@ -0,0 +1,578 @@
+/* Himax Android Driver Sample Code for HX83192 chipset
+ *
+ * Copyright (C) 2021 Himax Corporation.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#define hx83192_data_adc_num 120
+
+#include "himax.h"
+#include "himax_ic_core.h"
+
+static void hx83192_chip_init(struct himax_ts_data *ts)
+{
+	ts->chip_cell_type = CHIP_IS_IN_CELL;
+	I("%s:IC cell type = %d\n", __func__, ts->chip_cell_type);
+	ts->ic_checksum = HX_TP_BIN_CHECKSUM_CRC;
+	/*Himax: Set FW and CFG Flash Address*/
+	ts->fw_ver_maj_flash_addr = 49157; /*0x00C005*/
+	ts->fw_ver_min_flash_addr = 49158; /*0x00C006*/
+	ts->cfg_ver_maj_flash_addr = 49408; /*0x00C100*/
+	ts->cfg_ver_min_flash_addr = 49409; /*0x00C101*/
+	ts->cid_ver_maj_flash_addr = 49154; /*0x00C002*/
+	ts->cid_ver_min_flash_addr = 49155; /*0x00C003*/
+	ts->cfg_table_flash_addr = 0x10000;
+}
+
+static bool himax_get_ic_Amount(struct himax_ts_data *ts)
+{
+	bool result = false;
+	uint8_t tmp_addr[DATA_LEN_4] = { 0 };
+	uint8_t tmp_data[DATA_LEN_4] = { 0 };
+	int cascadeenb;
+
+	tmp_addr[3] = 0x90;
+	tmp_addr[2] = 0x00;
+	tmp_addr[1] = 0x00;
+	tmp_addr[0] = 0xEC;
+	himax_mcu_register_read(ts, tmp_addr, DATA_LEN_4, tmp_data, false);
+	if (result) {
+		cascadeenb = (tmp_data[1] >> 2);
+		switch (cascadeenb) {
+		case 0:
+			ts->hx_ic_amount = 3;
+			break;
+		case 2:
+			ts->hx_ic_amount = 2;
+			break;
+		case 3:
+			ts->hx_ic_amount = 1;
+			break;
+		default:
+			result = false;
+			break;
+		}
+	}
+	I("hx_ic_Amount : %d\n", ts->hx_ic_amount);
+
+	return result;
+}
+
+static void hx83192_sense_on(struct himax_ts_data *ts, uint8_t FlashMode)
+{
+	uint8_t tmp_addr[DATA_LEN_4];
+	uint8_t tmp_data[DATA_LEN_4];
+	int retry = 0;
+	int ret = 0;
+
+	I("Enter %s\n", __func__);
+	ts->core_fp.fp_interface_on(ts);
+
+	if (!FlashMode) {
+#if defined(HX_RST_PIN_FUNC)
+		if (HX_SYSTEM_RESET == 0)
+			ts->core_fp.fp_ic_reset(ts, false, false);
+		else
+			ts->core_fp.fp_system_reset(ts);
+#endif
+	} else {
+		do {
+			himax_parse_assign_cmd(addr_ctrl_fw, tmp_addr, sizeof(tmp_addr));
+			himax_parse_assign_cmd(data_clear, tmp_data, sizeof(tmp_data));
+			himax_mcu_register_write(ts, tmp_addr, DATA_LEN_4, tmp_data, 0);
+
+			msleep(20);
+
+			himax_mcu_register_read(ts, tmp_addr, DATA_LEN_4, tmp_data, 0);
+
+			I("%s:Read status from IC = %X,%X\n", __func__, tmp_data[0], tmp_data[1]);
+		} while (tmp_data[0] != 0x00 && retry++ < 5);
+
+		if (retry >= 5) {
+			E("%s: Fail:\n", __func__);
+#if defined(HX_RST_PIN_FUNC)
+			if (HX_SYSTEM_RESET == 0)
+				ts->core_fp.fp_ic_reset(ts, false, false);
+			else
+				ts->core_fp.fp_system_reset(ts);
+#endif
+		} else {
+			I("%s:OK and Read status from IC = %X,%X\n", __func__, tmp_data[0],
+			  tmp_data[1]);
+			/* reset code*/
+			tmp_data[0] = 0x00;
+			tmp_data[1] = 0x00;
+
+			ret = himax_bus_write(ts, addr_sense_on_off_0, tmp_data, 2,
+					      HIMAX_I2C_RETRY_TIMES);
+			if (ret < 0)
+				E("%s: i2c access fail!\n", __func__);
+
+			/*ret = himax_bus_write(ts, ts->ic_incell.pfw_op
+				->adr_i2c_psw_ub[0],
+				tmp_data, 1, HIMAX_I2C_RETRY_TIMES);
+			if (ret < 0)
+				E("%s: i2c access fail!\n", __func__);*/
+		}
+		msleep(280);
+
+#if defined(HIMAX_I2C_PLATFORM)
+		ret = himax_bus_read(ts, addr_AHB_rdata_byte_0, tmp_data, DATA_LEN_4,
+				     HIMAX_I2C_RETRY_TIMES);
+		if (ret < 0) {
+			E("%s: i2c access fail!\n", __func__);
+		}
+#endif
+	}
+}
+
+static bool hx83192_sense_off(struct himax_ts_data *ts, bool check_en)
+{
+	bool result = true;
+	uint8_t cnt = 0;
+	uint8_t tmp_addr[DATA_LEN_4] = { 0 };
+	uint8_t tmp_data[DATA_LEN_4] = { 0 };
+	uint8_t cMax = 7;
+	uint8_t check = 0x87;
+	int ret = 0;
+
+	msleep(280);
+
+	himax_parse_assign_cmd(addr_cs_central_state, tmp_addr, sizeof(tmp_addr));
+	himax_mcu_register_read(ts, tmp_addr, DATA_LEN_4, tmp_data, false);
+
+	if (tmp_data[0] != 0x0C) {
+		tmp_addr[3] = 0x90;
+		tmp_addr[2] = 0x00;
+		tmp_addr[1] = 0x00;
+		tmp_addr[0] = 0x5C;
+		cnt = 0;
+		do {
+			tmp_data[3] = 0x00;
+			tmp_data[2] = 0x00;
+			tmp_data[1] = 0x00;
+			tmp_data[0] = 0xA5;
+			himax_mcu_register_write(ts, tmp_addr, DATA_LEN_4, tmp_data, 0);
+			msleep(20);
+			himax_mcu_register_read(ts, tmp_addr, DATA_LEN_4, tmp_data, 0);
+			I("%s: Check 9000005C data[0]=%X\n", __func__, tmp_data[0]);
+			if (cnt++ >= cMax)
+				break;
+		} while (tmp_data[0] != check);
+	}
+
+	do {
+		tmp_data[0] = para_sense_off_0;
+
+		ret = himax_bus_write(ts, addr_sense_on_off_0, tmp_data, 1, HIMAX_I2C_RETRY_TIMES);
+		if (ret < 0) {
+			E("%s: i2c access fail!\n", __func__);
+			return false;
+		}
+
+		tmp_data[0] = para_sense_off_1;
+
+		ret = himax_bus_write(ts, addr_sense_on_off_1, tmp_data, 1, HIMAX_I2C_RETRY_TIMES);
+		if (ret < 0) {
+			E("%s: i2c access fail!\n", __func__);
+			return false;
+		}
+
+		himax_parse_assign_cmd(addr_cs_central_state, tmp_addr, sizeof(tmp_addr));
+		himax_mcu_register_read(ts, tmp_addr, DATA_LEN_4, tmp_data, false);
+		I("%s: Check enter_save_mode data[0]=%X\n", __func__, tmp_data[0]);
+
+		if (tmp_data[0] == 0x0C) {
+			return true;
+		} else if (cnt == 6) {
+			usleep_range(10000, 11000);
+#if defined(HX_RST_PIN_FUNC)
+			if (HX_SYSTEM_RESET == 0)
+				ts->core_fp.fp_ic_reset(ts, false, false);
+			else
+				ts->core_fp.fp_system_reset(ts);
+#endif
+		}
+
+	} while (cnt++ < 15);
+
+	return result;
+}
+
+static int hx83192_mcu_register_read(struct himax_ts_data *ts, uint8_t *read_addr,
+				     uint32_t read_length, uint8_t *read_data, uint8_t cfg_flag)
+{
+	uint8_t tmp_data[DATA_LEN_4];
+	int i = 0;
+	int address = 0;
+	int ret = 0;
+
+	if (cfg_flag == false) {
+		if (read_length > FLASH_RW_MAX_LEN) {
+			E("%s: read len over %d!\n", __func__, FLASH_RW_MAX_LEN);
+			return LENGTH_FAIL;
+		}
+
+		address = (read_addr[3] << 24) + (read_addr[2] << 16) + (read_addr[1] << 8) +
+			  read_addr[0];
+		i = address;
+		tmp_data[0] = (uint8_t)i;
+		tmp_data[1] = (uint8_t)(i >> 8);
+		tmp_data[2] = (uint8_t)(i >> 16);
+		tmp_data[3] = (uint8_t)(i >> 24);
+
+		ret = himax_bus_write(ts, addr_AHB_address_byte_0, tmp_data, DATA_LEN_4,
+				      HIMAX_I2C_RETRY_TIMES);
+		if (ret < 0) {
+			E("%s: i2c access fail!\n", __func__);
+			return I2C_FAIL;
+		}
+
+		tmp_data[0] = para_AHB_access_direction_read;
+
+		ret = himax_bus_write(ts, addr_AHB_access_direction, tmp_data, 1,
+				      HIMAX_I2C_RETRY_TIMES);
+		if (ret < 0) {
+			E("%s: i2c access fail!\n", __func__);
+			return I2C_FAIL;
+		}
+
+		ret = himax_bus_read(ts, addr_AHB_rdata_byte_0, read_data, read_length,
+				     HIMAX_I2C_RETRY_TIMES);
+		if (ret < 0) {
+			E("%s: i2c access fail!\n", __func__);
+			return I2C_FAIL;
+		}
+
+	} else {
+		ret = himax_bus_read(ts, read_addr[0], read_data, read_length,
+				     HIMAX_I2C_RETRY_TIMES);
+		if (ret < 0) {
+			E("%s: i2c access fail!\n", __func__);
+			return I2C_FAIL;
+		}
+	}
+	return NO_ERR;
+}
+
+static void hx83192_mcu_flash_dump_func(struct himax_ts_data *ts, uint8_t local_flash_command,
+					int Flash_Size, uint8_t *flash_buffer)
+{
+	uint8_t tmp_addr[DATA_LEN_4];
+	uint8_t tmp_data[DATA_LEN_4];
+	int page_prog_start = 0, retry_cnt = 0;
+
+	I("%s,Entering\n", __func__);
+
+	ts->core_fp.fp_sense_off(ts, true);
+	ts->core_fp.fp_burst_enable(ts, 0);
+
+	/* ===SPI RX-FIFO Reset===*/
+	himax_mcu_register_write(ts, ts->ic_incell.pflash_op->addr_spi200_fifo_rst, DATA_LEN_4,
+				 ts->ic_incell.pflash_op->data_spi200_rxfifo_rst, 0);
+
+	do {
+		himax_mcu_register_read(ts, ts->ic_incell.pflash_op->addr_spi200_fifo_rst,
+					DATA_LEN_4, tmp_data, 0);
+
+		if (retry_cnt > 50) {
+			E("%s: Polling SPI Status FAIL", __func__);
+			return;
+		}
+		retry_cnt++;
+	} while ((tmp_data[0] & 0x02) != 0);
+
+	/* ===SPI Transfer Control===*/
+	himax_mcu_register_write(ts, ts->ic_incell.pflash_op->addr_spi200_trans_ctrl, DATA_LEN_4,
+				 ts->ic_incell.pflash_op->data_spi200_trans_ctrl_7, 0);
+
+	for (page_prog_start = 0; page_prog_start < Flash_Size; page_prog_start += 16) {
+		tmp_addr[0] = page_prog_start % 0x100;
+		tmp_addr[1] = (page_prog_start >> 8) % 0x100;
+		tmp_addr[2] = (page_prog_start >> 16) % 0x100;
+		tmp_addr[3] = page_prog_start / 0x1000000;
+
+		/* ===Set SPI Address ===*/
+		himax_mcu_register_write(ts, ts->ic_incell.pflash_op->addr_spi200_addr, DATA_LEN_4,
+					 tmp_addr, 0);
+		/* ===SPI Transfer Control===*/
+		himax_mcu_register_write(ts, ts->ic_incell.pflash_op->addr_spi200_cmd, DATA_LEN_4,
+					 ts->ic_incell.pflash_op->data_spi200_cmd_7, 0);
+		retry_cnt = 0;
+		do {
+			himax_mcu_register_read(ts, ts->ic_incell.pflash_op->addr_spi200_rst_status,
+						DATA_LEN_4, tmp_data, 0);
+
+			if (retry_cnt > 50) {
+				E("%s: Polling SPI Status FAIL", __func__);
+				return;
+			}
+			retry_cnt++;
+		} while ((tmp_data[1] & 0x80) == 0);
+
+		hx83192_mcu_register_read(ts, ts->ic_incell.pflash_op->addr_spi200_data, 16,
+					  &flash_buffer[page_prog_start], false);
+	}
+
+	ts->core_fp.fp_sense_on(ts, 0x01);
+}
+
+static void hx83192_mcu_flash_programming(struct himax_ts_data *ts, uint8_t *FW_content,
+					  int start_addr, int length)
+{
+	int page_prog_start = 0, i = 0, j = 0, k = 0, retry_cnt = 0;
+	uint8_t tmp_data[DATA_LEN_4];
+	uint8_t buring_data[FLASH_RW_MAX_LEN]; /* Read for flash data, 128K*/
+
+	I("%s", __func__);
+	/* 4 bytes for padding*/
+	ts->core_fp.fp_interface_on(ts);
+
+	himax_mcu_register_write(ts, ts->ic_incell.pflash_op->addr_spi200_flash_speed, DATA_LEN_4,
+				 ts->ic_incell.pflash_op->data_spi200_cmd_8, 0);
+
+	/* ===SPI TX-FIFO Reset===*/
+	himax_mcu_register_write(ts, ts->ic_incell.pflash_op->addr_spi200_fifo_rst, DATA_LEN_4,
+				 ts->ic_incell.pflash_op->data_spi200_txfifo_rst, 0);
+
+	/* ===Polling Reset Status ===*/
+	retry_cnt = 0;
+
+	do {
+		himax_mcu_register_read(ts, ts->ic_incell.pflash_op->addr_spi200_fifo_rst,
+					DATA_LEN_4, tmp_data, 0);
+
+		if (retry_cnt > 50) {
+			E("%s: Polling SPI Status Active FAIL", __func__);
+			return;
+		}
+		retry_cnt++;
+	} while (((tmp_data[0] & 0x04) >> 2) == 1);
+
+	/* ===SPI Transfer Format===*/
+	himax_mcu_register_write(ts, ts->ic_incell.pflash_op->addr_spi200_trans_fmt, DATA_LEN_4,
+				 ts->ic_incell.pflash_op->data_spi200_trans_fmt, 0);
+
+	for (page_prog_start = start_addr; page_prog_start < start_addr + length;
+	     page_prog_start += FLASH_RW_MAX_LEN) {
+		himax_mcu_register_write(ts, ts->ic_incell.pflash_op->addr_spi200_trans_ctrl,
+					 DATA_LEN_4,
+					 ts->ic_incell.pflash_op->data_spi200_trans_ctrl_2, 0);
+		himax_mcu_register_write(ts, ts->ic_incell.pflash_op->addr_spi200_cmd, DATA_LEN_4,
+					 ts->ic_incell.pflash_op->data_spi200_cmd_2, 0);
+
+		/* ===Polling SPI Status Active ===*/
+		retry_cnt = 0;
+		do {
+			himax_mcu_register_read(ts, ts->ic_incell.pflash_op->addr_spi200_rst_status,
+						4, tmp_data, 0);
+
+			if (retry_cnt > 50) {
+				E("%s: Polling FAIL", __func__);
+				return;
+			}
+			retry_cnt++;
+		} while ((tmp_data[0] & 0x01) == 1);
+
+		/* ===WEL Write Enable ===*/
+		himax_mcu_register_write(ts, ts->ic_incell.pflash_op->addr_spi200_trans_ctrl,
+					 DATA_LEN_4,
+					 ts->ic_incell.pflash_op->data_spi200_trans_ctrl_6, 0);
+
+		himax_mcu_register_write(ts, ts->ic_incell.pflash_op->addr_spi200_cmd, DATA_LEN_4,
+					 ts->ic_incell.pflash_op->data_spi200_cmd_1, 0);
+
+		/* ===Polling SPI Status Active ===*/
+		retry_cnt = 0;
+		do {
+			himax_mcu_register_read(ts, ts->ic_incell.pflash_op->addr_spi200_rst_status,
+						DATA_LEN_4, tmp_data, 0);
+			if (retry_cnt > 50) {
+				E("%s: Polling FAIL", __func__);
+				return;
+			}
+			retry_cnt++;
+		} while ((tmp_data[0] & 0x01) == 1);
+
+		himax_mcu_register_read(ts, ts->ic_incell.pflash_op->addr_spi200_data, DATA_LEN_4,
+					tmp_data, 0);
+		//WEL Fail
+		if (((tmp_data[0] & 0x02) >> 1) == 0) {
+			I("%s:SPI 0x8000002c = %d\n", __func__, tmp_data[0]);
+			break;
+		}
+
+		/*Programmable size = 256 bytes, word_number = 256/4 = 64*/
+		himax_mcu_register_write(ts, ts->ic_incell.pflash_op->addr_spi200_trans_ctrl,
+					 DATA_LEN_4,
+					 ts->ic_incell.pflash_op->data_spi200_trans_ctrl_4, 0);
+
+		/* Flash start address 1st : 0x0000_0000*/
+		if (page_prog_start < 0x100) {
+			tmp_data[3] = 0x00;
+			tmp_data[2] = 0x00;
+			tmp_data[1] = 0x00;
+			tmp_data[0] = (uint8_t)page_prog_start;
+		} else if (page_prog_start >= 0x100 && page_prog_start < 0x10000) {
+			tmp_data[3] = 0x00;
+			tmp_data[2] = 0x00;
+			tmp_data[1] = (uint8_t)(page_prog_start >> 8);
+			tmp_data[0] = (uint8_t)page_prog_start;
+		} else if (page_prog_start >= 0x10000 && page_prog_start < 0x1000000) {
+			tmp_data[3] = 0x00;
+			tmp_data[2] = (uint8_t)(page_prog_start >> 16);
+			tmp_data[1] = (uint8_t)(page_prog_start >> 8);
+			tmp_data[0] = (uint8_t)page_prog_start;
+		}
+		himax_mcu_register_write(ts, ts->ic_incell.pflash_op->addr_spi200_addr, DATA_LEN_4,
+					 tmp_data, 0);
+
+		for (i = 0; i < ADDR_LEN_4; i++)
+			buring_data[i] = ts->ic_incell.pflash_op->addr_spi200_data[i];
+
+		himax_mcu_register_write(ts, ts->ic_incell.pflash_op->addr_spi200_cmd, DATA_LEN_4,
+					 ts->ic_incell.pflash_op->data_spi200_cmd_6, 0);
+
+		for (j = 0; j < 16; j++) {
+			for (i = (page_prog_start + (j * 16)), k = 0;
+			     i < (page_prog_start + (j * 16)) + 16; i++, k++)
+
+				buring_data[k + ADDR_LEN_4] = FW_content[i - start_addr];
+			/*I("FW_content[%d] = 0x%02X", i - start_addr, FW_content[i - start_addr]);*/
+
+			if (himax_bus_write(ts, addr_AHB_address_byte_0, buring_data,
+					    ADDR_LEN_4 + 16, HIMAX_I2C_RETRY_TIMES) < 0) {
+				E("%s: i2c access fail!\n", __func__);
+				return;
+			}
+
+			/* ===Polling SPI Status Active ===*/
+			retry_cnt = 0;
+			do {
+				himax_mcu_register_read(
+					ts, ts->ic_incell.pflash_op->addr_spi200_rst_status,
+					DATA_LEN_4, tmp_data, 0);
+
+				if (retry_cnt > 50) {
+					E("%s: Polling FAIL", __func__);
+					return;
+				}
+				retry_cnt++;
+			} while ((tmp_data[2] & 0x40) == 0);
+		}
+
+		if (!ts->core_fp.fp_wait_wip(ts, 1))
+			E("%s:Flash_Programming Fail\n", __func__);
+	}
+}
+
+static bool hx83192_mcu_ic_id_read(struct himax_ts_data *ts)
+{
+	I("%s: [HX83192-A]", __func__);
+	return true;
+}
+
+static bool hx83192_mcu_dd_clk_set(struct himax_ts_data *ts, bool enable)
+{
+	uint8_t data[4] = { 0 };
+
+	data[0] = (enable) ? 0xDD : 0x00;
+	return (himax_mcu_register_write(ts, ts->ic_incell.pfw_op->addr_osc_en,
+					 sizeof(ts->ic_incell.pfw_op->addr_osc_en), data,
+					 0) == NO_ERR);
+}
+
+static void hx83192_mcu_dd_reg_en(struct himax_ts_data *ts, bool enable)
+{
+	uint8_t data[4] = { 0 };
+
+	data[0] = 0xA5;
+	data[1] = 0x00;
+	data[2] = 0x00;
+	data[3] = 0x00;
+	himax_mcu_register_write(ts, ts->ic_incell.pfw_op->addr_osc_pw,
+				 sizeof(ts->ic_incell.pfw_op->addr_osc_pw), data, 0);
+	data[0] = 0x00;
+	data[1] = 0x55;
+	data[2] = 0x66;
+	data[3] = 0xCC;
+
+	ts->core_fp.fp_dd_reg_write(ts, 0xEB, 0, 4, data, 0);
+	data[0] = 0x00;
+	data[1] = 0x83;
+	data[2] = 0x19;
+	data[3] = 0x2A;
+	ts->core_fp.fp_dd_reg_write(ts, 0xB9, 0, 4, data, 0);
+}
+
+static void hx83192_func_re_init(struct himax_ts_data *ts)
+{
+	ts->core_fp.fp_sense_on = hx83192_sense_on;
+	ts->core_fp.fp_sense_off = hx83192_sense_off;
+	ts->core_fp.fp_chip_init = hx83192_chip_init;
+	ts->core_fp.fp_ic_id_read = hx83192_mcu_ic_id_read;
+	ts->core_fp.fp_dd_clk_set = hx83192_mcu_dd_clk_set;
+	ts->core_fp.fp_dd_reg_en = hx83192_mcu_dd_reg_en;
+
+	ts->core_fp.fp_flash_dump_func = hx83192_mcu_flash_dump_func;
+	ts->core_fp.fp_flash_programming = hx83192_mcu_flash_programming;
+}
+
+bool hx83192_chip_detect(struct himax_ts_data *ts)
+{
+	uint8_t tmp_data[DATA_LEN_4] = { 0 };
+	uint8_t tmp_addr[DATA_LEN_4] = { 0 };
+	bool ret_data = false;
+	int ret = 0;
+	int i = 0;
+
+	ret = himax_mcu_in_cmd_struct_init(ts);
+	if (ret < 0) {
+		ret_data = false;
+		E("%s:cmd_struct_init Fail:\n", __func__);
+		return ret_data;
+	}
+
+	himax_mcu_in_cmd_init(ts);
+
+	hx83192_func_re_init(ts);
+
+	ts->core_fp.fp_sense_off(ts, true);
+
+	for (i = 0; i < 5; i++) {
+		himax_parse_assign_cmd(addr_icid_addr, tmp_addr, sizeof(tmp_addr));
+		himax_mcu_register_read(ts, tmp_addr, DATA_LEN_4, tmp_data, false);
+		I("%s:Read driver IC ID = %X,%X,%X\n", __func__, tmp_data[3], tmp_data[2],
+		  tmp_data[1]);
+
+		if ((tmp_data[3] == 0x83) && (tmp_data[2] == 0x19) && (tmp_data[1] == 0x2a)) {
+			strlcpy(ts->chip_name, HX_83192A_SERIES_PWON, 30);
+			I("%s:IC name = %s\n", __func__, ts->chip_name);
+			I("Himax IC package %x%x%x in\n", tmp_data[3], tmp_data[2], tmp_data[1]);
+
+			ret_data = true;
+			ts->ic_data->ic_adc_num = hx83192_data_adc_num;
+			himax_get_ic_Amount(ts);
+			return ret_data;
+		}
+	}
+	ret_data = false;
+	E("%s:Read driver ID register Fail:\n", __func__);
+	E("Could NOT find Himax Chipset\n");
+	E("Please check 1.VCCD,VCCA,VSP,VSN\n");
+	E("2.LCM_RST,TP_RST\n");
+	E("3.Power On Sequence\n");
+
+	return ret_data;
+}
+EXPORT_SYMBOL(hx83192_chip_detect);
+
+MODULE_LICENSE("GPL");

drivers/input/touchscreen/hxchipset/himax_ic_core.h

@@ -0,0 +1,267 @@
+/* Himax Android Driver Sample Code for ic core functions
+ *
+ * Copyright (C) 2021 Himax Corporation.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed,  and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __HIMAX_IC_CORE_H__
+#define __HIMAX_IC_CORE_H__
+
+#include "himax_platform.h"
+#include "himax_common.h"
+#include <linux/slab.h>
+
+#define DATA_LEN_8			8
+#define DATA_LEN_4			4
+#define ADDR_LEN_4			4
+#define FLASH_RW_MAX_LEN		256
+#define FLASH_WRITE_BURST_SZ		8
+#define MAX_I2C_TRANS_SZ		128
+#define HIMAX_TOUCH_DATA_SIZE		128
+
+#define FW_SECTOR_PER_BLOCK		8
+#define FW_PAGE_PER_SECTOR		64
+#define FW_PAGE_SZ			128
+#define HX1K				0x400
+#define HX64K				0x10000
+
+#define HX_RW_REG_FAIL (-1)
+#define HX_DRIVER_MAX_IC_NUM 5
+
+#if defined(__HIMAX_HX83191_MOD__)
+#define HX_MOD_KSYM_HX83191 HX_MOD_KSYM_HX83191
+#endif
+
+#if defined(__HIMAX_HX83192_MOD__)
+#define HX_MOD_KSYM_HX83192 HX_MOD_KSYM_HX83192
+#endif
+
+#if defined(__HIMAX_HX83193_MOD__)
+#define HX_MOD_KSYM_HX83193 HX_MOD_KSYM_HX83193
+#endif
+
+/* CORE_INIT */
+/* CORE_FW */
+/* CORE_FLASH */
+/* CORE_SRAM */
+
+#if defined(CONFIG_TOUCHSCREEN_HIMAX_INCELL)
+void himax_mcu_in_cmd_struct_free(struct himax_ts_data *ts);
+#endif
+
+#if defined(HX_RST_PIN_FUNC)
+void himax_gpio_set(int pinnum, uint8_t value);
+#endif
+
+int himax_report_data_init(struct himax_ts_data *ts);
+
+/* CORE_INIT */
+int himax_mcu_in_cmd_struct_init(struct himax_ts_data *ts);
+void himax_mcu_in_cmd_init(struct himax_ts_data *ts);
+void himax_parse_assign_cmd(uint32_t addr, uint8_t *cmd, int len);
+int himax_mcu_WP_BP_disable(struct himax_ts_data *ts);
+int himax_mcu_WP_BP_enable(struct himax_ts_data *ts);
+int himax_mcu_WP_BP_status(struct himax_ts_data *ts);
+int himax_mcu_flash_id_check(struct himax_ts_data *ts);
+int himax_mcu_register_write(struct himax_ts_data *ts, uint8_t *write_addr, uint32_t write_length,
+			     uint8_t *write_data, uint8_t cfg_flag);
+int himax_mcu_register_read(struct himax_ts_data *ts, uint8_t *read_addr, uint32_t read_length,
+			    uint8_t *read_data, uint8_t cfg_flag);
+void himax_mcu_tp_lcm_pin_reset(struct himax_ts_data *ts);
+/* CORE_INIT */
+
+enum AHB_Interface_Command_Table {
+	addr_AHB_address_byte_0 = 0x00,
+	addr_AHB_rdata_byte_0 = 0x08,
+	addr_AHB_access_direction = 0x0C,
+	addr_AHB_continous = 0x13,
+	addr_AHB_INC4 = 0x0D,
+	addr_sense_on_off_0 = 0x31,
+	addr_sense_on_off_1 = 0x32,
+	addr_read_event_stack = 0x30,
+	para_AHB_access_direction_read = 0x00,
+	para_AHB_continous = 0x31,
+	para_AHB_INC4 = 0x10,
+	para_sense_off_0 = 0x27,
+	para_sense_off_1 = 0x95,
+};
+
+/* CORE_FW */
+#define addr_fw_state				0x800204DC
+#define addr_psl				0x900000A0
+#define addr_cs_central_state			0x900000A8
+#define addr_flag_reset_event			0x900000E4
+#define addr_chk_dd_status			0x900000E8
+#define fw_addr_osc_en				0x9000009C
+#define fw_addr_osc_pw				0x90000280
+#define addr_system_reset			0x90000018
+#define addr_ctrl_fw				0x9000005C
+#define addr_icid_addr				0x900000D0
+#define fw_addr_program_reload_from		0x00000000
+#define fw_addr_reload_status			0x80050000
+#define fw_addr_reload_crc32_result		0x80050018
+#define fw_addr_reload_addr_from		0x80050020
+#define fw_addr_reload_addr_cmd_beat		0x80050028
+#define data_system_reset			0x00000055
+#define data_clear				0x00000000
+#define addr_raw_out_sel			0x100072EC
+#define addr_set_frame_addr			0x10007294
+#define addr_sorting_mode_en			0x10007F04
+#define addr_fw_mode_status			0x10007088
+#define addr_fw_architecture_version		0x10007004
+#define addr_fw_config_date			0x10007038
+#define addr_fw_config_version			0x10007084
+#define addr_fw_CID				0x10007000
+#define addr_fw_customer			0x10007008
+#define addr_fw_project_name			0x10007014
+#define addr_fw_dbg_msg_addr			0x10007F40
+#define addr_HX_ID_EN				0x10007134
+#define addr_mkey				0x100070E8
+#define addr_fw_define_flash_reload		0x10007f00
+#define addr_fw_define_2nd_flash_reload		0x100072c0
+#define data_fw_define_flash_reload_dis		0x0000a55a
+#define data_fw_define_flash_reload_en		0x00000000
+#define addr_fw_define_int_is_edge		0x10007088
+#define addr_fw_define_rxnum_txnum_maxpt	0x100070f4
+#define addr_fw_define_xy_res_enable		0x100070f8
+
+#define fw_data_rawdata_ready_hb 0xa3
+#define fw_data_rawdata_ready_lb 0x3a
+/* CORE_FW */
+
+/* CORE_FLASH */
+#define flash_addr_ctrl_base		0x80000000
+#define flash_addr_spi200_trans_fmt	(flash_addr_ctrl_base + 0x10)
+#define flash_addr_spi200_trans_ctrl	(flash_addr_ctrl_base + 0x20)
+#define flash_addr_spi200_cmd		(flash_addr_ctrl_base + 0x24)
+#define flash_addr_spi200_addr		(flash_addr_ctrl_base + 0x28)
+#define flash_addr_spi200_data		(flash_addr_ctrl_base + 0x2c)
+#define flash_addr_spi200_fifo_rst	(flash_addr_ctrl_base + 0x30)
+#define flash_addr_spi200_rst_status	(flash_addr_ctrl_base + 0x34)
+#define flash_addr_spi200_flash_speed	(flash_addr_ctrl_base + 0x40)
+#define flash_addr_spi200_bt_num	(flash_addr_ctrl_base + 0xe8)
+#define flash_data_spi200_txfifo_rst	0x00000004
+#define flash_data_spi200_rxfifo_rst	0x00000002
+#define flash_data_spi200_trans_fmt	0x00020780
+#define flash_data_spi200_trans_ctrl_1	0x42000003
+#define flash_data_spi200_trans_ctrl_2	0x47000000
+#define flash_data_spi200_trans_ctrl_3	0x67000000
+#define flash_data_spi200_trans_ctrl_4	0x610ff000
+#define flash_data_spi200_trans_ctrl_6	0x42000000
+#define flash_data_spi200_trans_ctrl_7	0x6940020f
+#define flash_data_spi200_cmd_1		0x00000005
+#define flash_data_spi200_cmd_2		0x00000006
+#define flash_data_spi200_cmd_3		0x000000C7
+#define flash_data_spi200_cmd_4		0x000000D8
+#define flash_data_spi200_cmd_6		0x00000002
+#define flash_data_spi200_cmd_7		0x0000003b
+#define flash_data_spi200_cmd_8		0x00000003
+/* CORE_FLASH */
+
+/* CORE_SRAM */
+#define sram_adr_rawdata_addr 0x10000000
+#define sram_adr_rawdata_end 0x00000000
+#define sram_passwrd_start 0x5AA5
+#define sram_passwrd_end 0xA55A
+/* CORE_SRAM */
+
+enum bin_desc_map_table {
+	TP_CONFIG_TABLE = 0x0000000A,
+	FW_CID = 0x10000000,
+	FW_VER = 0x10000100,
+	CFG_VER = 0x30000000, //0x10000005,
+};
+
+extern uint32_t himax_dbg_reg_ary[4];
+
+struct fw_operation {
+	uint8_t addr_osc_en[4];
+	uint8_t addr_osc_pw[4];
+	uint8_t flash_lock_type[1];
+	uint8_t addr_program_reload_from[4];
+	uint8_t addr_reload_status[4];
+	uint8_t addr_reload_crc32_result[4];
+	uint8_t addr_reload_addr_from[4];
+	uint8_t addr_reload_addr_cmd_beat[4];
+	uint8_t data_rawdata_ready_hb[1];
+	uint8_t data_rawdata_ready_lb[1];
+};
+
+struct flash_operation {
+	uint8_t addr_spi200_trans_fmt[4];
+	uint8_t addr_spi200_trans_ctrl[4];
+	uint8_t addr_spi200_fifo_rst[4];
+	uint8_t addr_spi200_rst_status[4];
+	uint8_t addr_spi200_flash_speed[4];
+	uint8_t addr_spi200_cmd[4];
+	uint8_t addr_spi200_addr[4];
+	uint8_t addr_spi200_data[4];
+	uint8_t addr_spi200_bt_num[4];
+	uint8_t data_spi200_txfifo_rst[4];
+	uint8_t data_spi200_rxfifo_rst[4];
+	uint8_t data_spi200_trans_fmt[4];
+	uint8_t data_spi200_trans_ctrl_1[4];
+	uint8_t data_spi200_trans_ctrl_2[4];
+	uint8_t data_spi200_trans_ctrl_3[4];
+	uint8_t data_spi200_trans_ctrl_4[4];
+	uint8_t data_spi200_trans_ctrl_5[4];
+	uint8_t data_spi200_trans_ctrl_6[4];
+	uint8_t data_spi200_trans_ctrl_7[4];
+	uint8_t data_spi200_cmd_1[4];
+	uint8_t data_spi200_cmd_2[4];
+	uint8_t data_spi200_cmd_3[4];
+	uint8_t data_spi200_cmd_4[4];
+	uint8_t data_spi200_cmd_5[4];
+	uint8_t data_spi200_cmd_6[4];
+	uint8_t data_spi200_cmd_7[4];
+	uint8_t data_spi200_cmd_8[4];
+};
+
+struct sram_operation {
+	uint8_t addr_rawdata_addr[4];
+	uint8_t addr_rawdata_end[4];
+	uint8_t passwrd_start[2];
+	uint8_t passwrd_end[2];
+};
+
+struct himax_core_command_operation {
+	struct fw_operation *fw_op;
+	struct flash_operation *flash_op;
+	struct sram_operation *sram_op;
+};
+
+struct himax_chip_ops {
+	bool (*detect)(struct himax_ts_data *ts);
+};
+
+struct himax_chip_entry {
+	struct himax_chip_ops ops;
+	struct list_head list;
+};
+
+#define DECLARE_HIMAX_CHIP(_name, _detect)                                                         \
+	struct himax_chip_entry _name = { \
+		.ops = { \
+			.detect = _detect, \
+		}, \
+		.list = LIST_HEAD_INIT((_name).list), \
+	}
+
+#endif
+
+#define Flash_list                                                                                 \
+	{                                                                                          \
+		{ 0xEF, 0x30, 0x12 }, { 0xEF, 0x60, 0x12 }, { 0xC8, 0x60, 0x13 },                  \
+		{ 0xC8, 0x60, 0x12 }, { 0xC2, 0x28, 0x11 }, { 0xC2, 0x28, 0x12 },                  \
+		{ 0xC2, 0x25, 0x32 }, { 0x85, 0x60, 0x13 }, { 0x85, 0x60, 0x12 },                  \
+		{ 0x85, 0x40, 0x12 }, { 0x7F, 0x11, 0x52 }, { 0x5E, 0x60, 0x13 },                  \
+		{ 0x1C, 0x38, 0x13 }, { 0x1C, 0x38, 0x12 }, { 0x9D, 0x40, 0x12 }                   \
+	}

drivers/input/touchscreen/hxchipset/himax_inspection.h

@@ -0,0 +1,278 @@
+/* Himax Android Driver Sample Code for inspection functions
+ *
+ * Copyright (C) 2021 Himax Corporation.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include "himax_platform.h"
+#include "himax_common.h"
+#include "himax_ic_core.h"
+
+/*#define HX_GAP_TEST*/
+/*#define HX_INSP_LP_TEST*/
+/*#define HX_ACT_IDLE_TEST*/
+
+#define HX_RSLT_OUT_PATH "/sdcard/"
+#define HX_RSLT_OUT_FILE "hx_test_result.txt"
+#define PI(x...) pr_cont(x)
+#define HX_SZ_ICID 60
+
+#define BS_RAWDATA 8
+#define BS_NOISE 8
+#define BS_OPENSHORT 1
+#define BS_LPWUG 1
+#define BS_LP_dile 1
+#define BS_ACT_IDLE 1
+
+/* skip notch & dummy */
+#define SKIP_NOTCH_START 5
+#define SKIP_NOTCH_END 10
+/* TX+SKIP_NOTCH_START */
+#define SKIP_DUMMY_START 23
+/* TX+SKIP_NOTCH_END*/
+#define SKIP_DUMMY_END 28
+
+#define NOISEFRAME 200
+#define NORMAL_IDLE_RAWDATA_NOISEFRAME 10
+#define LP_RAWDATAFRAME 1
+#define LP_NOISEFRAME 1
+#define LP_IDLE_RAWDATAFRAME 1
+#define LP_IDLE_NOISEFRAME 1
+#define OTHERSFRAME 1
+#define UNIFMAX 500
+
+/*Himax MP Password*/
+#define PWD_OPEN_START		0x77
+#define PWD_OPEN_END		0x88
+#define PWD_MICRO_OPEN_START	0x6B
+#define PWD_MICRO_OPEN_END	0x70
+#define PWD_SHORT_START		0x11
+#define PWD_SHORT_END		0x33
+#define PWD_RAWDATA_START	0x00
+#define PWD_RAWDATA_END		0x99
+#define PWD_NOISE_START		0x00
+#define PWD_NOISE_END		0x99
+#define PWD_SORTING_START	0xAA
+#define PWD_SORTING_END		0xCC
+
+#define PWD_ACT_IDLE_START	0x22
+#define PWD_ACT_IDLE_END	0x44
+
+#define PWD_LP_START		0x55
+#define PWD_LP_END		0x66
+
+#define PWD_LP_IDLE_START	0x50
+#define PWD_LP_IDLE_END		0x60
+
+#define PWD_TURN_ON_MPAP_OVL 0x107380
+
+/*Himax DataType*/
+#define DATA_SORTING		0x0A
+#define DATA_OPEN		0x0B
+#define DATA_MICRO_OPEN		0x0A
+#define DATA_SHORT		0x0A
+#define DATA_RAWDATA		0x0A
+#define DATA_NOISE		0x0F
+#define DATA_BACK_NORMAL	0x00
+#define DATA_LP_RAWDATA		0x0C
+#define DATA_LP_NOISE		0x0F
+#define DATA_ACT_IDLE_RAWDATA	0x0A
+#define DATA_ACT_IDLE_NOISE	0x0F
+#define DATA_LP_IDLE_RAWDATA	0x0A
+#define DATA_LP_IDLE_NOISE	0x0F
+
+/*Himax Data Ready Password*/
+#define Data_PWD0 0xA5
+#define Data_PWD1 0x5A
+
+/* ASCII format */
+#define ASCII_LF (0x0A)
+#define ASCII_CR (0x0D)
+#define ASCII_COMMA (0x2C)
+#define ASCII_ZERO (0x30)
+#define CHAR_EL '\0'
+#define CHAR_NL '\n'
+#define ACSII_SPACE (0x20)
+/* INSOECTION Setting */
+
+void himax_inspection_init(struct himax_ts_data *ts);
+
+/*Inspection register*/
+#define addr_normal_noise_thx	0x1000708C
+#define addr_lpwug_noise_thx	0x10007090
+#define addr_noise_scale	0x10007094
+#define addr_recal_thx		0x10007090
+#define addr_palm_num		0x100070A8
+#define addr_weight_sup		0x100072C8
+#define addr_normal_weight_a	0x1000709C
+#define addr_lpwug_weight_a	0x100070A0
+#define addr_weight_b		0x10007094
+#define addr_max_dc		0x10007FC8
+#define addr_skip_frame		0x100070F4
+#define addr_neg_noise_sup	0x10007FD8
+#define data_neg_noise		0x7F0C0000
+#define addr_ctrl_mpap_ovl	0x100073EC
+
+/*Need to map *g_himax_inspection_mode[]*/
+enum THP_INSPECTION_ENUM {
+	HX_OPEN,
+	HX_MICRO_OPEN,
+	HX_SHORT,
+	HX_RAWDATA,
+	HX_BPN_RAWDATA,
+	HX_SC,
+	HX_WT_NOISE,
+	HX_ABS_NOISE,
+	HX_SORTING,
+
+	HX_GAPTEST_RAW,
+	/*HX_GAPTEST_RAW_X,*/
+	/*HX_GAPTEST_RAW_Y,*/
+
+	HX_ACT_IDLE_RAWDATA,
+	HX_ACT_IDLE_BPN_RAWDATA,
+	HX_ACT_IDLE_NOISE,
+	/*LPWUG test must put after Normal test*/
+	HX_LP_RAWDATA,
+	HX_LP_BPN_RAWDATA,
+	HX_LP_WT_NOISE,
+	HX_LP_ABS_NOISE,
+	HX_LP_IDLE_RAWDATA,
+	HX_LP_IDLE_BPN_RAWDATA,
+	HX_LP_IDLE_NOISE,
+
+	HX_BACK_NORMAL, /*Must put in the end*/
+};
+
+enum HX_CRITERIA_ENUM {
+	IDX_RAWMIN = 0,
+	IDX_RAWMAX,
+	IDX_BPN_RAWMIN,
+	IDX_BPN_RAWMAX,
+	IDX_SCMIN,
+	IDX_SCMAX,
+	IDX_SC_GOLDEN,
+	IDX_SHORTMIN,
+	IDX_SHORTMAX,
+	IDX_OPENMIN,
+	IDX_OPENMAX,
+	IDX_M_OPENMIN,
+	IDX_M_OPENMAX,
+	IDX_WT_NOISEMIN,
+	IDX_WT_NOISEMAX,
+	IDX_ABS_NOISEMIN,
+	IDX_ABS_NOISEMAX,
+	IDX_SORTMIN,
+	IDX_SORTMAX,
+
+	IDX_GAP_HOR_RAWMAX,
+	IDX_GAP_HOR_RAWMIN,
+	IDX_GAP_VER_RAWMAX,
+	IDX_GAP_VER_RAWMIN,
+
+	IDX_ACT_IDLE_NOISE_MIN,
+	IDX_ACT_IDLE_NOISE_MAX,
+	IDX_ACT_IDLE_RAWDATA_MIN,
+	IDX_ACT_IDLE_RAWDATA_MAX,
+	IDX_ACT_IDLE_RAW_BPN_MIN,
+	IDX_ACT_IDLE_RAW_BPN_MAX,
+
+	IDX_LP_WT_NOISEMIN,
+	IDX_LP_WT_NOISEMAX,
+	IDX_LP_NOISE_ABS_MIN,
+	IDX_LP_NOISE_ABS_MAX,
+	IDX_LP_RAWDATA_MIN,
+	IDX_LP_RAWDATA_MAX,
+	IDX_LP_RAW_BPN_MIN,
+	IDX_LP_RAW_BPN_MAX,
+
+	IDX_LP_IDLE_NOISE_MIN,
+	IDX_LP_IDLE_NOISE_MAX,
+	IDX_LP_IDLE_RAWDATA_MIN,
+	IDX_LP_IDLE_RAWDATA_MAX,
+	IDX_LP_IDLE_RAW_BPN_MIN,
+	IDX_LP_IDLE_RAW_BPN_MAX,
+};
+
+#define ERR_SFT 4
+/* Error code of Inspection */
+enum HX_INSP_ERR_ENUM {
+	/* OK */
+	HX_INSP_OK = 0,
+
+	/* Criteria file error*/
+	HX_INSP_EFILE = 1,
+
+	/* Get raw data errors */
+	HX_INSP_EGETRAW = 1 << 1,
+
+	/* Memory allocate errors */
+	HX_INSP_MEMALLCTFAIL = 1 << 2,
+
+	/* Switch mode error*/
+	HX_INSP_ESWITCHMODE = 1 << 3,
+
+	/* Sensor open error */
+	HX_EOPEN = 1 << (HX_OPEN + ERR_SFT),
+
+	/* Sensor micro open error */
+	HX_EMOPEN = 1 << (HX_MICRO_OPEN + ERR_SFT),
+
+	/* Sensor short error */
+	HX_ESHORT = 1 << (HX_SHORT + ERR_SFT),
+
+	/* Raw data error */
+	HX_ERAW = 1 << (HX_RAWDATA + ERR_SFT),
+
+	/* Raw data BPN error */
+	HX_EBPNRAW = 1 << (HX_BPN_RAWDATA + ERR_SFT),
+
+	/* Get SC errors */
+	HX_ESC = 1 << (HX_SC + ERR_SFT),
+
+	/* Noise error */
+	HX_WT_ENOISE = 1 << (HX_WT_NOISE + ERR_SFT),
+
+	/* Noise error */
+	HX_ABS_ENOISE = 1 << (HX_ABS_NOISE + ERR_SFT),
+
+	/* Sorting error*/
+	HX_ESORT = 1 << (HX_SORTING + ERR_SFT),
+
+	/* Raw Data GAP  */
+	HX_EGAP_RAW = 1 << (HX_GAPTEST_RAW + ERR_SFT),
+
+	/* ACT_IDLE RAW ERROR */
+	HX_EACT_IDLE_RAW = 1 << (HX_ACT_IDLE_RAWDATA + ERR_SFT),
+
+	/* ACT_IDLE NOISE ERROR */
+	HX_EACT_IDLE_NOISE = 1 << (HX_ACT_IDLE_NOISE + ERR_SFT),
+
+	/* LPWUG RAW ERROR */
+	HX_ELP_RAW = 1 << (HX_LP_RAWDATA + ERR_SFT),
+
+	/* LPWUG NOISE ERROR */
+	HX_ELP_WT_NOISE = 1 << (HX_LP_WT_NOISE + ERR_SFT),
+
+	/* LPWUG NOISE ERROR */
+	HX_ELP_ABS_NOISE = 1 << (HX_LP_ABS_NOISE + ERR_SFT),
+
+	/* LPWUG IDLE RAW ERROR */
+	HX_ELP_IDLE_RAW = 1 << (HX_LP_IDLE_RAWDATA + ERR_SFT),
+
+	/* LPWUG IDLE NOISE ERROR */
+	HX_ELP_IDLE_NOISE = 1 << (HX_LP_IDLE_NOISE + ERR_SFT),
+	HX_EACT_IDLE_BPNRAW = 1 << (HX_ACT_IDLE_BPN_RAWDATA + ERR_SFT),
+	HX_ELP_BPNRAW = 1 << (HX_LP_BPN_RAWDATA + ERR_SFT),
+	HX_ELP_IDLE_BPNRAW = 1 << (HX_LP_IDLE_BPN_RAWDATA + ERR_SFT),
+};
+
+extern void himax_inspect_data_clear(struct himax_ts_data *ts);

drivers/input/touchscreen/hxchipset/himax_platform.h

@@ -0,0 +1,116 @@
+/* Himax Android Driver Sample Code for QCT platform
+ *
+ * Copyright (C) 2021 Himax Corporation.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef HIMAX_PLATFORM_H
+#define HIMAX_PLATFORM_H
+
+#include <linux/delay.h>
+#include <linux/fs.h>
+#include <linux/gpio.h>
+#include <linux/types.h>
+#include <linux/i2c.h>
+#include <linux/interrupt.h>
+
+#define HIMAX_I2C_PLATFORM
+#define HIMAX_I2C_RETRY_TIMES 3
+#define BUS_RW_MAX_LEN 256
+
+#if defined(CONFIG_TOUCHSCREEN_HIMAX_DEBUG)
+#define D(x...) pr_debug("[HXTP] " x)
+#define I(x...) pr_info("[HXTP] " x)
+#define W(x...) pr_warn("[HXTP][WARNING] " x)
+#define E(x...) pr_err("[HXTP][ERROR] " x)
+#define DIF(x...)                                                                                  \
+	do {                                                                                       \
+		if (debug_flag)                                                                    \
+			pr_debug("[HXTP][DEBUG] " x)                                               \
+	} while (0)
+#else
+
+#define D(x...)
+#define I(x...)
+#define W(x...)
+#define E(x...)
+#define DIF(x...)
+#endif
+
+#define HIMAX_common_NAME "himax_tp"
+#define HIMAX_I2C_ADDR 0x48
+#define INPUT_DEV_NAME "himax-touchscreen"
+
+struct himax_i2c_platform_data {
+	int abs_x_min;
+	int abs_x_max;
+	int abs_x_fuzz;
+	int abs_y_min;
+	int abs_y_max;
+	int abs_y_fuzz;
+	int abs_pressure_min;
+	int abs_pressure_max;
+	int abs_pressure_fuzz;
+	int abs_width_min;
+	int abs_width_max;
+	int screenWidth;
+	int screenHeight;
+	uint8_t fw_version;
+	uint8_t tw_id;
+	uint8_t powerOff3V3;
+	uint8_t cable_config[2];
+	uint8_t protocol_type;
+	int gpio_irq;
+	int fail_det;
+	int gpio_reset;
+	int gpio_3v3_en;
+	int gpio_pon;
+	int lcm_rst;
+	int (*power)(int on);
+	void (*reset)(void);
+	struct himax_virtual_key *virtual_key;
+	int hx_config_size;
+	const char *fw_name;
+	const char *criteria_file_name;
+};
+
+extern int himax_bus_read(struct himax_ts_data *ts, uint8_t command, uint8_t *data, uint32_t length,
+			  uint8_t toRetry);
+extern int himax_bus_write(struct himax_ts_data *ts, uint8_t command, uint8_t *data,
+			   uint32_t length, uint8_t toRetry);
+extern void himax_int_enable(struct himax_ts_data *ts, int enable);
+extern int himax_ts_register_interrupt(struct himax_ts_data *ts);
+extern int himax_fail_det_register_interrupt(struct himax_ts_data *ts);
+int himax_ts_unregister_interrupt(struct himax_ts_data *ts);
+extern uint8_t himax_int_gpio_read(int pinnum);
+extern int himax_gpio_power_config(struct himax_ts_data *ts, struct himax_i2c_platform_data *pdata);
+void himax_gpio_power_deconfig(struct himax_i2c_platform_data *pdata);
+
+#if defined(HX_CONFIG_FB)
+extern int himax_fb_notifier_callback(struct notifier_block *self, unsigned long event, void *data);
+#elif defined(HX_CONFIG_DRM)
+extern int himax_drm_notifier_callback(struct notifier_block *self, unsigned long event, void *data);
+#endif
+extern int himax_hotplug_notifier(struct notifier_block *self, unsigned long event, void *data);
+
+extern void himax_ts_work(struct himax_ts_data *ts);
+extern void himax_fail_det_work(struct himax_ts_data *ts);
+extern enum hrtimer_restart himax_ts_timer_func(struct hrtimer *timer);
+extern int himax_chip_common_init(struct himax_ts_data *ts);
+extern void himax_chip_common_deinit(struct himax_ts_data *ts);
+extern int himax_sysfs_init(struct himax_ts_data *ts);
+extern void himax_sysfs_deinit(struct himax_ts_data *ts);
+int himax_int_en_set(struct himax_ts_data *ts);
+int tp_diag_himax(void);
+#if IS_ENABLED(CONFIG_TOUCHSCREEN_HIMAX_IC_HX83192)
+bool hx83192_chip_detect(struct himax_ts_data *ts);
+#endif
+#endif