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clk: rockchip: remove spin_lock in the rockchip_ddrclk_sip_set_rate

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Change-Id: Ia3d04aef8fbf8093c2a3a89a845f948f69c8611f
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
This commit is contained in:
YouMin Chen
2017-08-28 10:10:42 +08:00
committed by Tao Huang
parent d2b92a90ea
commit ff3405ff4c
3 changed files with 3 additions and 11 deletions
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9
drivers/clk/rockchip/clk-ddr.c
View File

@@ -28,7 +28,6 @@ struct rockchip_ddrclk {
int div_shift;
int div_width;
int ddr_flag;
spinlock_t *lock;
};
#define to_rockchip_ddrclk_hw(hw) container_of(hw, struct rockchip_ddrclk, hw)
@@ -60,15 +59,11 @@ EXPORT_SYMBOL(rockchip_set_ddrclk_dmcfreq_wait_complete);
static int rockchip_ddrclk_sip_set_rate(struct clk_hw *hw, unsigned long drate,
unsigned long prate)
{
struct rockchip_ddrclk *ddrclk = to_rockchip_ddrclk_hw(hw);
unsigned long flags;
struct arm_smccc_res res;
spin_lock_irqsave(ddrclk->lock, flags);
arm_smccc_smc(ROCKCHIP_SIP_DRAM_FREQ, drate, 0,
ROCKCHIP_SIP_CONFIG_DRAM_SET_RATE,
0, 0, 0, 0, &res);
spin_unlock_irqrestore(ddrclk->lock, flags);
return res.a0;
}
@@ -235,8 +230,7 @@ struct clk *rockchip_clk_register_ddrclk(const char *name, int flags,
u8 num_parents, int mux_offset,
int mux_shift, int mux_width,
int div_shift, int div_width,
int ddr_flag, void __iomem *reg_base,
spinlock_t *lock)
int ddr_flag, void __iomem *reg_base)
{
struct rockchip_ddrclk *ddrclk;
struct clk_init_data init;
@@ -270,7 +264,6 @@ struct clk *rockchip_clk_register_ddrclk(const char *name, int flags,
}
ddrclk->reg_base = reg_base;
ddrclk->lock = lock;
ddrclk->hw.init = &init;
ddrclk->mux_offset = mux_offset;
ddrclk->mux_shift = mux_shift;

2
drivers/clk/rockchip/clk.c
View File

@@ -675,7 +675,7 @@ void rockchip_clk_register_branches(struct rockchip_clk_provider *ctx,
list->muxdiv_offset, list->mux_shift,
list->mux_width, list->div_shift,
list->div_width, list->div_flags,
ctx->reg_base, &ctx->lock);
ctx->reg_base);
break;
case branch_dclk_divider:
clk = rockchip_clk_register_dclk_branch(list->name,

3
drivers/clk/rockchip/clk.h
View File

@@ -481,8 +481,7 @@ struct clk *rockchip_clk_register_ddrclk(const char *name, int flags,
u8 num_parents, int mux_offset,
int mux_shift, int mux_width,
int div_shift, int div_width,
int ddr_flags, void __iomem *reg_base,
spinlock_t *lock);
int ddr_flags, void __iomem *reg_base);
#define ROCKCHIP_INVERTER_HIWORD_MASK BIT(0)