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media: rockchip: isp: support iq part of isp21
Signed-off-by: Hu Kejun <william.hu@rock-chips.com> Change-Id: I2c2354c9e8ae590c907d5357803cd702c90e9577
This commit is contained in:
Hu Kejun
@@ -9,9 +9,11 @@ video_rkisp-objs += rkisp.o \
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isp_stats.o \
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isp_stats_v1x.o \
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isp_stats_v2x.o \
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isp_stats_v21.o \
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isp_params.o \
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isp_params_v1x.o \
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isp_params_v2x.o \
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isp_params_v21.o \
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capture.o \
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capture_v1x.o \
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capture_v20.o \
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@@ -11,6 +11,7 @@
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#include "isp_params.h"
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#include "isp_params_v1x.h"
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#include "isp_params_v2x.h"
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#include "isp_params_v21.h"
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#define PARAMS_NAME DRIVER_NAME "-input-params"
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#define RKISP_ISP_PARAMS_REQ_BUFS_MIN 2
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@@ -277,6 +278,8 @@ static int rkisp_init_params_vdev(struct rkisp_isp_params_vdev *params_vdev)
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if (params_vdev->dev->isp_ver <= ISP_V13)
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return rkisp_init_params_vdev_v1x(params_vdev);
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else if (params_vdev->dev->isp_ver == ISP_V21)
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return rkisp_init_params_vdev_v21(params_vdev);
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else
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return rkisp_init_params_vdev_v2x(params_vdev);
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}
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@@ -285,6 +288,8 @@ static void rkisp_uninit_params_vdev(struct rkisp_isp_params_vdev *params_vdev)
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{
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if (params_vdev->dev->isp_ver <= ISP_V13)
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rkisp_uninit_params_vdev_v1x(params_vdev);
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else if (params_vdev->dev->isp_ver == ISP_V21)
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rkisp_uninit_params_vdev_v21(params_vdev);
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else
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rkisp_uninit_params_vdev_v2x(params_vdev);
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}
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@@ -46,6 +46,7 @@ struct rkisp_isp_params_vdev {
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union {
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struct rkisp1_isp_params_cfg *isp1x_params;
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struct isp2x_isp_params_cfg *isp2x_params;
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struct isp21_isp_params_cfg *isp21_params;
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};
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struct v4l2_format vdev_fmt;
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bool streamon;
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4205
drivers/media/platform/rockchip/isp/isp_params_v21.c
Normal file
4205
drivers/media/platform/rockchip/isp/isp_params_v21.c
Normal file
File diff suppressed because it is too large
Load Diff
336
drivers/media/platform/rockchip/isp/isp_params_v21.h
Normal file
336
drivers/media/platform/rockchip/isp/isp_params_v21.h
Normal file
@@ -0,0 +1,336 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright (c) 2020 Rockchip Electronics Co., Ltd. */
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#ifndef _RKISP_ISP_PARAM_V21_H
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#define _RKISP_ISP_PARAM_V21_H
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#include <linux/rkisp1-config.h>
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#include <linux/rk-preisp.h>
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#include "common.h"
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#include "isp_params.h"
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#define ISP2X_YUVAE_ENA BIT(0)
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#define ISP2X_YUVAE_WNDNUM_SET BIT(1)
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#define ISP2X_YUVAE_SUBWIN1_EN BIT(4)
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#define ISP2X_YUVAE_SUBWIN2_EN BIT(5)
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#define ISP2X_YUVAE_SUBWIN3_EN BIT(6)
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#define ISP2X_YUVAE_SUBWIN4_EN BIT(7)
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#define ISP2X_YUVAE_YSEL BIT(16)
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#define ISP2X_YUVAE_H_OFFSET_SET(x) ((x) & 0x1FFF)
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#define ISP2X_YUVAE_V_OFFSET_SET(x) (((x) & 0x1FFF) << 16)
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#define ISP2X_YUVAE_H_SIZE_SET(x) ((x) & 0x7FF)
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#define ISP2X_YUVAE_V_SIZE_SET(x) (((x) & 0x7FF) << 16)
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#define ISP2X_YUVAE_SUBWIN_H_OFFSET_SET(x) ((x) & 0x1FFF)
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#define ISP2X_YUVAE_SUBWIN_V_OFFSET_SET(x) (((x) & 0x1FFF) << 16)
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#define ISP2X_YUVAE_SUBWIN_H_SIZE_SET(x) ((x) & 0x1FFF)
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#define ISP2X_YUVAE_SUBWIN_V_SIZE_SET(x) (((x) & 0x1FFF) << 16)
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#define ISP2X_RAWAE_LITE_ENA BIT(0)
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#define ISP2X_RAWAE_LITE_WNDNUM_SET(x) (((x) & 0x1) << 1)
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#define ISP2X_RAWAE_LITE_H_OFFSET_SET(x) ((x) & 0x1FFF)
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#define ISP2X_RAWAE_LITE_V_OFFSET_SET(x) (((x) & 0x1FFF) << 16)
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#define ISP2X_RAWAE_LITE_H_SIZE_SET(x) ((x) & 0x1FFF)
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#define ISP2X_RAWAE_LITE_V_SIZE_SET(x) (((x) & 0x1FFF) << 16)
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#define ISP2X_RAWAEBIG_ENA BIT(0)
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#define ISP2X_RAWAEBIG_WNDNUM_SET(x) (((x) & 0x3) << 1)
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#define ISP2X_RAWAEBIG_SUBWIN1_EN BIT(4)
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#define ISP2X_RAWAEBIG_SUBWIN2_EN BIT(5)
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#define ISP2X_RAWAEBIG_SUBWIN3_EN BIT(6)
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#define ISP2X_RAWAEBIG_SUBWIN4_EN BIT(7)
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#define ISP2X_RAWAEBIG_H_OFFSET_SET(x) ((x) & 0x1FFF)
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#define ISP2X_RAWAEBIG_V_OFFSET_SET(x) (((x) & 0x1FFF) << 16)
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#define ISP2X_RAWAEBIG_H_SIZE_SET(x) ((x) & 0x7FF)
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#define ISP2X_RAWAEBIG_V_SIZE_SET(x) (((x) & 0x7FF) << 16)
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#define ISP2X_RAWAEBIG_SUBWIN_H_OFFSET_SET(x) ((x) & 0x1FFF)
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#define ISP2X_RAWAEBIG_SUBWIN_V_OFFSET_SET(x) (((x) & 0x1FFF) << 16)
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#define ISP2X_RAWAEBIG_SUBWIN_H_SIZE_SET(x) ((x) & 0x1FFF)
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#define ISP2X_RAWAEBIG_SUBWIN_V_SIZE_SET(x) (((x) & 0x1FFF) << 16)
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#define ISP2X_SIAWB_YMAX_CMP_EN BIT(2)
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#define ISP2X_SIAWB_RGB_MODE_EN BIT(31)
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#define ISP2X_SIAWB_SET_FRAMES(x) (((x) & 0x07) << 28)
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#define ISP2X_SIAWB_MODE_SET(x) ((x) << 0)
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#define ISP2X_SIAF_ENA BIT(0)
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#define ISP2X_SIAF_WIN_X(x) (((x) & 0x1FFF) << 16)
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#define ISP2X_SIAF_WIN_Y(x) ((x) & 0x1FFF)
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#define ISP2X_SIAF_SET_SHIFT_A(x, y) (((x) & 0x7) << 16 | ((y) & 0x7) << 0)
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#define ISP2X_SIAF_SET_SHIFT_B(x, y) (((x) & 0x7) << 20 | ((y) & 0x7) << 4)
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#define ISP2X_SIAF_SET_SHIFT_C(x, y) (((x) & 0x7) << 24 | ((y) & 0x7) << 8)
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#define ISP2X_SIAF_GET_LUM_SHIFT_A(x) (((x) & 0x70000) >> 16)
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#define ISP2X_SIAF_GET_AFM_SHIFT_A(x) ((x) & 0x7)
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#define ISP2X_RAWAF_ENA BIT(0)
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#define ISP2X_RAWAF_GAMMA_ENA BIT(1)
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#define ISP2X_RAWAF_GAUS_ENA BIT(2)
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#define ISP2X_RAWAF_INT_LINE0_EN BIT(27)
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#define ISP2X_RAWAF_INT_LINE1_EN BIT(28)
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#define ISP2X_RAWAF_INT_LINE2_EN BIT(29)
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#define ISP2X_RAWAF_INT_LINE3_EN BIT(30)
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#define ISP2X_RAWAF_INT_LINE4_EN BIT(31)
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#define ISP2X_RAWAF_INT_LINE0_NUM(x) (((x) & 0xF) << 0)
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#define ISP2X_RAWAF_INT_LINE1_NUM(x) (((x) & 0xF) << 4)
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#define ISP2X_RAWAF_INT_LINE2_NUM(x) (((x) & 0xF) << 8)
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#define ISP2X_RAWAF_INT_LINE3_NUM(x) (((x) & 0xF) << 12)
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#define ISP2X_RAWAF_INT_LINE4_NUM(x) (((x) & 0xF) << 16)
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#define ISP2X_RAWAF_THRES(x) ((x) & 0xFFFF)
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#define ISP2X_RAWAF_WIN_X(x) (((x) & 0x1FFF) << 16)
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#define ISP2X_RAWAF_WIN_Y(x) ((x) & 0x1FFF)
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#define ISP2X_RAWAF_SET_SHIFT_A(x, y) (((x) & 0x7) << 16 | ((y) & 0x7) << 0)
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#define ISP2X_RAWAF_SET_SHIFT_B(x, y) (((x) & 0x7) << 20 | ((y) & 0x7) << 4)
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#define ISP2X_SIHST_CTRL_EN_SET(x) (((x) & 0x01) << 0)
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#define ISP2X_SIHST_CTRL_EN_MASK ISP2X_SIHST_CTRL_EN_SET(0x01)
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#define ISP2X_SIHST_CTRL_STEPSIZE_SET(x) (((x) & 0x7F) << 1)
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#define ISP2X_SIHST_CTRL_MODE_SET(x) (((x) & 0x07) << 8)
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#define ISP2X_SIHST_CTRL_MODE_MASK ISP2X_SIHST_CTRL_MODE_SET(0x07)
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#define ISP2X_SIHST_CTRL_AUTOSTOP_SET(x) (((x) & 0x01) << 11)
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#define ISP2X_SIHST_CTRL_WATERLINE_SET(x) (((x) & 0xFFF) << 12)
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#define ISP2X_SIHST_CTRL_DATASEL_SET(x) (((x) & 0x07) << 24)
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#define ISP2X_SIHST_CTRL_INTRSEL_SET(x) (((x) & 0x01) << 27)
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#define ISP2X_SIHST_CTRL_INTRSEL_MASK ISP2X_SIHST_CTRL_INTRSEL_SET(0x01)
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#define ISP2X_SIHST_CTRL_WNDNUM_SET(x) (((x) & 0x03) << 28)
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#define ISP2X_SIHST_CTRL_WNDNUM_MASK ISP2X_SIHST_CTRL_WNDNUM_SET(0x03)
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#define ISP2X_SIHST_ROW_NUM 15
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#define ISP2X_SIHST_COLUMN_NUM 15
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#define ISP2X_SIHST_WEIGHT_REG_SIZE \
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(ISP2X_SIHST_ROW_NUM * ISP2X_SIHST_COLUMN_NUM)
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#define ISP2X_SIHST_WEIGHT_SET(v0, v1, v2, v3) \
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(((v0) & 0x3F) | (((v1) & 0x3F) << 8) |\
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(((v2) & 0x3F) << 16) |\
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(((v3) & 0x3F) << 24))
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#define ISP2X_SIHST_OFFS_SET(v0, v1) \
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(((v0) & 0x1FFF) | (((v1) & 0x1FFF) << 16))
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#define ISP2X_SIHST_SIZE_SET(v0, v1) \
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(((v0) & 0x1FFF) | (((v1) & 0x1FFF) << 16))
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#define ISP2X_RAWHSTBIG_CTRL_EN_SET(x) (((x) & 0x01) << 0)
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#define ISP2X_RAWHSTBIG_CTRL_EN_MASK ISP2X_RAWHSTBIG_CTRL_EN_SET(0x01)
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#define ISP2X_RAWHSTBIG_CTRL_STEPSIZE_SET(x) (((x) & 0x07) << 1)
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#define ISP2X_RAWHSTBIG_CTRL_MODE_SET(x) (((x) & 0x07) << 8)
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#define ISP2X_RAWHSTBIG_CTRL_MODE_MASK ISP2X_RAWHSTBIG_CTRL_MODE_SET(0x07)
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#define ISP2X_RAWHSTBIG_CTRL_WATERLINE_SET(x) (((x) & 0xFFF) << 12)
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#define ISP2X_RAWHSTBIG_CTRL_DATASEL_SET(x) (((x) & 0x07) << 24)
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#define ISP2X_RAWHSTBIG_CTRL_WNDNUM_SET(x) (((x) & 0x03) << 28)
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#define ISP2X_RAWHSTBIG_CTRL_WNDNUM_MASK ISP2X_RAWHSTBIG_CTRL_WNDNUM_SET(0x03)
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#define ISP2X_RAWHSTBIG_WRAM_EN BIT(31)
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#define ISP2X_RAWHSTBIG_ROW_NUM 15
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#define ISP2X_RAWHSTBIG_COLUMN_NUM 15
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#define ISP2X_RAWHSTBIG_WEIGHT_REG_SIZE \
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(ISP2X_RAWHSTBIG_ROW_NUM * ISP2X_RAWHSTBIG_COLUMN_NUM)
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#define ISP2X_RAWHSTBIG_WEIGHT_SET(v0, v1, v2, v3, v4) \
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(((v0) & 0x3F) | (((v1) & 0x3F) << 6) |\
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(((v2) & 0x3F) << 12) |\
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(((v3) & 0x3F) << 18) |\
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(((v4) & 0x3F) << 24))
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#define ISP2X_RAWHSTBIG_OFFS_SET(v0, v1) \
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(((v0) & 0x1FFF) | (((v1) & 0x1FFF) << 16))
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#define ISP2X_RAWHSTBIG_SIZE_SET(v0, v1) \
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(((v0) & 0x7FF) | (((v1) & 0x7FF) << 16))
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#define ISP2X_RAWHSTLITE_CTRL_EN_SET(x) (((x) & 0x01) << 0)
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#define ISP2X_RAWHSTLITE_CTRL_EN_MASK ISP2X_RAWHSTBIG_CTRL_EN_SET(0x01)
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#define ISP2X_RAWHSTLITE_CTRL_STEPSIZE_SET(x) (((x) & 0x07) << 1)
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#define ISP2X_RAWHSTLITE_CTRL_MODE_SET(x) (((x) & 0x07) << 8)
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#define ISP2X_RAWHSTLITE_CTRL_MODE_MASK ISP2X_RAWHSTBIG_CTRL_MODE_SET(0x07)
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#define ISP2X_RAWHSTLITE_CTRL_WATERLINE_SET(x) (((x) & 0xFFF) << 12)
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#define ISP2X_RAWHSTLITE_CTRL_DATASEL_SET(x) (((x) & 0x07) << 24)
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#define ISP2X_RAWHSTLITE_ROW_NUM 5
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#define ISP2X_RAWHSTLITE_COLUMN_NUM 5
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#define ISP2X_RAWHSTLITE_WEIGHT_REG_SIZE \
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(ISP2X_RAWHSTLITE_ROW_NUM * ISP2X_RAWHSTLITE_COLUMN_NUM)
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#define ISP2X_RAWHSTLITE_WEIGHT_SET(v0, v1, v2, v3) \
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(((v0) & 0x3F) | (((v1) & 0x3F) << 8) |\
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(((v2) & 0x3F) << 16) |\
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(((v3) & 0x3F) << 24))
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#define ISP2X_RAWHSTLITE_OFFS_SET(v0, v1) \
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(((v0) & 0x1FFF) | (((v1) & 0x1FFF) << 16))
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#define ISP2X_RAWHSTLITE_SIZE_SET(v0, v1) \
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(((v0) & 0x7FF) | (((v1) & 0x7FF) << 16))
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#define ISP2X_RAWAWB_ENA BIT(0)
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#define ISP2X_RAWAWB_WPTH2_SET(x) (((x) & 0x1FF) << 9)
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#define ISP2X_ISPPATH_RAWAE_SEL_SET(x) (((x) & 0x03) << 16)
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#define ISP2X_ISPPATH_RAWAF_SEL_SET(x) (((x) & 0x03) << 18)
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#define ISP2X_ISPPATH_RAWAWB_SEL_SET(x) (((x) & 0x03) << 20)
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#define ISP2X_ISPPATH_RAWAE_SWAP_SET(x) (((x) & 0x03) << 22)
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#define RKISP_PARAM_3DLUT_BUF_NUM 2
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#define RKISP_PARAM_3DLUT_BUF_SIZE (9 * 9 * 9 * 4)
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#define RKISP_PARAM_LSC_LUT_BUF_NUM 2
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#define RKISP_PARAM_LSC_LUT_TBL_SIZE (9 * 17 * 4)
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#define RKISP_PARAM_LSC_LUT_BUF_SIZE (RKISP_PARAM_LSC_LUT_TBL_SIZE * 4)
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struct rkisp_isp_params_vdev;
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struct rkisp_isp_params_v21_ops {
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void (*dpcc_config)(struct rkisp_isp_params_vdev *params_vdev,
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const struct isp2x_dpcc_cfg *arg);
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void (*dpcc_enable)(struct rkisp_isp_params_vdev *params_vdev,
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bool en);
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void (*bls_config)(struct rkisp_isp_params_vdev *params_vdev,
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const struct isp21_bls_cfg *arg);
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void (*bls_enable)(struct rkisp_isp_params_vdev *params_vdev,
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bool en);
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void (*sdg_config)(struct rkisp_isp_params_vdev *params_vdev,
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const struct isp2x_sdg_cfg *arg);
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void (*sdg_enable)(struct rkisp_isp_params_vdev *params_vdev,
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bool en);
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void (*lsc_config)(struct rkisp_isp_params_vdev *params_vdev,
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const struct isp2x_lsc_cfg *arg);
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void (*lsc_enable)(struct rkisp_isp_params_vdev *params_vdev,
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bool en);
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void (*awbgain_config)(struct rkisp_isp_params_vdev *params_vdev,
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const struct isp21_awb_gain_cfg *arg);
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void (*awbgain_enable)(struct rkisp_isp_params_vdev *params_vdev,
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bool en);
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void (*debayer_config)(struct rkisp_isp_params_vdev *params_vdev,
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const struct isp2x_debayer_cfg *arg);
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void (*debayer_enable)(struct rkisp_isp_params_vdev *params_vdev,
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bool en);
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void (*ccm_config)(struct rkisp_isp_params_vdev *params_vdev,
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const struct isp21_ccm_cfg *arg);
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void (*ccm_enable)(struct rkisp_isp_params_vdev *params_vdev,
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bool en);
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void (*goc_config)(struct rkisp_isp_params_vdev *params_vdev,
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const struct isp2x_gammaout_cfg *arg);
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void (*goc_enable)(struct rkisp_isp_params_vdev *params_vdev,
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bool en);
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void (*cproc_config)(struct rkisp_isp_params_vdev *params_vdev,
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const struct isp2x_cproc_cfg *arg);
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void (*cproc_enable)(struct rkisp_isp_params_vdev *params_vdev,
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bool en);
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void (*ie_config)(struct rkisp_isp_params_vdev *params_vdev,
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const struct isp2x_ie_cfg *arg);
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void (*ie_enable)(struct rkisp_isp_params_vdev *params_vdev,
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bool en);
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void (*rawaf_config)(struct rkisp_isp_params_vdev *params_vdev,
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const struct isp2x_rawaf_meas_cfg *arg);
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void (*rawaf_enable)(struct rkisp_isp_params_vdev *params_vdev,
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bool en);
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void (*rawae0_config)(struct rkisp_isp_params_vdev *params_vdev,
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const struct isp2x_rawaelite_meas_cfg *arg);
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void (*rawae0_enable)(struct rkisp_isp_params_vdev *params_vdev,
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bool en);
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void (*rawae1_config)(struct rkisp_isp_params_vdev *params_vdev,
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const struct isp2x_rawaebig_meas_cfg *arg);
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void (*rawae1_enable)(struct rkisp_isp_params_vdev *params_vdev,
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bool en);
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void (*rawae2_config)(struct rkisp_isp_params_vdev *params_vdev,
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const struct isp2x_rawaebig_meas_cfg *arg);
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void (*rawae2_enable)(struct rkisp_isp_params_vdev *params_vdev,
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bool en);
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void (*rawae3_config)(struct rkisp_isp_params_vdev *params_vdev,
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const struct isp2x_rawaebig_meas_cfg *arg);
|
||||
void (*rawae3_enable)(struct rkisp_isp_params_vdev *params_vdev,
|
||||
bool en);
|
||||
void (*rawawb_config)(struct rkisp_isp_params_vdev *params_vdev,
|
||||
const struct isp21_rawawb_meas_cfg *arg);
|
||||
void (*rawawb_enable)(struct rkisp_isp_params_vdev *params_vdev,
|
||||
bool en);
|
||||
void (*rawhst0_config)(struct rkisp_isp_params_vdev *params_vdev,
|
||||
const struct isp2x_rawhistlite_cfg *arg);
|
||||
void (*rawhst0_enable)(struct rkisp_isp_params_vdev *params_vdev,
|
||||
bool en);
|
||||
void (*rawhst1_config)(struct rkisp_isp_params_vdev *params_vdev,
|
||||
const struct isp2x_rawhistbig_cfg *arg);
|
||||
void (*rawhst1_enable)(struct rkisp_isp_params_vdev *params_vdev,
|
||||
bool en);
|
||||
void (*rawhst2_config)(struct rkisp_isp_params_vdev *params_vdev,
|
||||
const struct isp2x_rawhistbig_cfg *arg);
|
||||
void (*rawhst2_enable)(struct rkisp_isp_params_vdev *params_vdev,
|
||||
bool en);
|
||||
void (*rawhst3_config)(struct rkisp_isp_params_vdev *params_vdev,
|
||||
const struct isp2x_rawhistbig_cfg *arg);
|
||||
void (*rawhst3_enable)(struct rkisp_isp_params_vdev *params_vdev,
|
||||
bool en);
|
||||
void (*hdrdrc_config)(struct rkisp_isp_params_vdev *params_vdev,
|
||||
const struct isp21_drc_cfg *arg, enum rkisp_params_type type);
|
||||
void (*hdrdrc_enable)(struct rkisp_isp_params_vdev *params_vdev,
|
||||
bool en);
|
||||
void (*hdrmge_config)(struct rkisp_isp_params_vdev *params_vdev,
|
||||
const struct isp2x_hdrmge_cfg *arg, enum rkisp_params_type type);
|
||||
void (*hdrmge_enable)(struct rkisp_isp_params_vdev *params_vdev,
|
||||
bool en);
|
||||
void (*hdrtmo_config)(struct rkisp_isp_params_vdev *params_vdev,
|
||||
const struct isp2x_hdrtmo_cfg *arg, enum rkisp_params_type type);
|
||||
void (*hdrtmo_enable)(struct rkisp_isp_params_vdev *params_vdev,
|
||||
bool en);
|
||||
void (*gic_config)(struct rkisp_isp_params_vdev *params_vdev,
|
||||
const struct isp21_gic_cfg *arg);
|
||||
void (*gic_enable)(struct rkisp_isp_params_vdev *params_vdev,
|
||||
bool en);
|
||||
void (*dhaz_config)(struct rkisp_isp_params_vdev *params_vdev,
|
||||
const struct isp21_dhaz_cfg *arg);
|
||||
void (*dhaz_enable)(struct rkisp_isp_params_vdev *params_vdev,
|
||||
bool en);
|
||||
void (*isp3dlut_config)(struct rkisp_isp_params_vdev *params_vdev,
|
||||
const struct isp2x_3dlut_cfg *arg);
|
||||
void (*isp3dlut_enable)(struct rkisp_isp_params_vdev *params_vdev,
|
||||
bool en);
|
||||
void (*ldch_config)(struct rkisp_isp_params_vdev *params_vdev,
|
||||
const struct isp2x_ldch_cfg *arg);
|
||||
void (*ldch_enable)(struct rkisp_isp_params_vdev *params_vdev,
|
||||
bool en);
|
||||
void (*ynr_config)(struct rkisp_isp_params_vdev *params_vdev,
|
||||
const struct isp21_ynr_cfg *arg);
|
||||
void (*ynr_enable)(struct rkisp_isp_params_vdev *params_vdev,
|
||||
bool en, const struct isp21_ynr_cfg *arg);
|
||||
void (*cnr_config)(struct rkisp_isp_params_vdev *params_vdev,
|
||||
const struct isp21_cnr_cfg *arg);
|
||||
void (*cnr_enable)(struct rkisp_isp_params_vdev *params_vdev,
|
||||
bool en, const struct isp21_cnr_cfg *arg);
|
||||
void (*sharp_config)(struct rkisp_isp_params_vdev *params_vdev,
|
||||
const struct isp21_sharp_cfg *arg);
|
||||
void (*sharp_enable)(struct rkisp_isp_params_vdev *params_vdev,
|
||||
bool en);
|
||||
void (*baynr_config)(struct rkisp_isp_params_vdev *params_vdev,
|
||||
const struct isp21_baynr_cfg *arg);
|
||||
void (*baynr_enable)(struct rkisp_isp_params_vdev *params_vdev,
|
||||
bool en);
|
||||
void (*bay3d_config)(struct rkisp_isp_params_vdev *params_vdev,
|
||||
const struct isp21_bay3d_cfg *arg);
|
||||
void (*bay3d_enable)(struct rkisp_isp_params_vdev *params_vdev,
|
||||
bool en);
|
||||
void (*csm_config)(struct rkisp_isp_params_vdev *params_vdev,
|
||||
bool full_range);
|
||||
};
|
||||
|
||||
struct rkisp_isp_params_val_v21 {
|
||||
struct rkisp_dummy_buffer buf_3dlut[RKISP_PARAM_3DLUT_BUF_NUM];
|
||||
u32 buf_3dlut_idx;
|
||||
|
||||
struct rkisp_dummy_buffer buf_ldch[ISP2X_LDCH_BUF_NUM];
|
||||
u32 buf_ldch_idx;
|
||||
|
||||
struct rkisp_dummy_buffer buf_lsclut[RKISP_PARAM_LSC_LUT_BUF_NUM];
|
||||
u32 buf_lsclut_idx;
|
||||
|
||||
struct rkisp_dummy_buffer buf_3dnr;
|
||||
|
||||
u8 dhaz_en;
|
||||
u8 wdr_en;
|
||||
u8 tmo_en;
|
||||
u8 lsc_en;
|
||||
u8 mge_en;
|
||||
};
|
||||
|
||||
int rkisp_init_params_vdev_v21(struct rkisp_isp_params_vdev *params_vdev);
|
||||
void rkisp_uninit_params_vdev_v21(struct rkisp_isp_params_vdev *params_vdev);
|
||||
|
||||
#endif /* _RKISP_ISP_PARAM_V21_H */
|
||||
@@ -10,6 +10,7 @@
|
||||
#include "isp_stats.h"
|
||||
#include "isp_stats_v1x.h"
|
||||
#include "isp_stats_v2x.h"
|
||||
#include "isp_stats_v21.h"
|
||||
|
||||
#define STATS_NAME DRIVER_NAME "-statistics"
|
||||
#define RKISP_ISP_STATS_REQ_BUFS_MIN 2
|
||||
@@ -132,6 +133,8 @@ static int rkisp_stats_vb2_queue_setup(struct vb2_queue *vq,
|
||||
|
||||
if (stats_vdev->dev->isp_ver <= ISP_V13)
|
||||
sizes[0] = sizeof(struct rkisp1_stat_buffer);
|
||||
else if (stats_vdev->dev->isp_ver == ISP_V21)
|
||||
sizes[0] = sizeof(struct isp21_stat);
|
||||
else
|
||||
sizes[0] = sizeof(struct isp2x_stat);
|
||||
|
||||
@@ -251,6 +254,8 @@ static void rkisp_init_stats_vdev(struct rkisp_isp_stats_vdev *stats_vdev)
|
||||
|
||||
if (stats_vdev->dev->isp_ver <= ISP_V13)
|
||||
rkisp_init_stats_vdev_v1x(stats_vdev);
|
||||
else if (stats_vdev->dev->isp_ver == ISP_V21)
|
||||
rkisp_init_stats_vdev_v21(stats_vdev);
|
||||
else
|
||||
rkisp_init_stats_vdev_v2x(stats_vdev);
|
||||
}
|
||||
@@ -259,6 +264,8 @@ static void rkisp_uninit_stats_vdev(struct rkisp_isp_stats_vdev *stats_vdev)
|
||||
{
|
||||
if (stats_vdev->dev->isp_ver <= ISP_V13)
|
||||
rkisp_uninit_stats_vdev_v1x(stats_vdev);
|
||||
else if (stats_vdev->dev->isp_ver == ISP_V21)
|
||||
rkisp_uninit_stats_vdev_v21(stats_vdev);
|
||||
else
|
||||
rkisp_uninit_stats_vdev_v2x(stats_vdev);
|
||||
}
|
||||
@@ -270,8 +277,10 @@ void rkisp_stats_rdbk_enable(struct rkisp_isp_stats_vdev *stats_vdev, bool en)
|
||||
|
||||
void rkisp_stats_first_ddr_config(struct rkisp_isp_stats_vdev *stats_vdev)
|
||||
{
|
||||
if (stats_vdev->dev->isp_ver >= ISP_V20)
|
||||
if (stats_vdev->dev->isp_ver == ISP_V20)
|
||||
rkisp_stats_first_ddr_config_v2x(stats_vdev);
|
||||
else if (stats_vdev->dev->isp_ver == ISP_V21)
|
||||
rkisp_stats_first_ddr_config_v21(stats_vdev);
|
||||
}
|
||||
|
||||
void rkisp_stats_isr(struct rkisp_isp_stats_vdev *stats_vdev,
|
||||
|
||||
1026
drivers/media/platform/rockchip/isp/isp_stats_v21.c
Normal file
1026
drivers/media/platform/rockchip/isp/isp_stats_v21.c
Normal file
File diff suppressed because it is too large
Load Diff
47
drivers/media/platform/rockchip/isp/isp_stats_v21.h
Normal file
47
drivers/media/platform/rockchip/isp/isp_stats_v21.h
Normal file
@@ -0,0 +1,47 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
/* Copyright (c) 2020 Rockchip Electronics Co., Ltd. */
|
||||
|
||||
#ifndef _RKISP_ISP_STATS_V21_H
|
||||
#define _RKISP_ISP_STATS_V21_H
|
||||
|
||||
#include <linux/rkisp1-config.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/kfifo.h>
|
||||
#include "common.h"
|
||||
|
||||
//#define RKISP_RD_STATS_FROM_DDR
|
||||
#define RKISP_RD_STATS_BUF_SIZE 0x35000
|
||||
|
||||
struct rkisp_isp_stats_vdev;
|
||||
struct rkisp_stats_v21_ops {
|
||||
void (*get_rawawb_meas)(struct rkisp_isp_stats_vdev *stats_vdev,
|
||||
struct rkisp_isp21_stat_buffer *pbuf);
|
||||
void (*get_rawaf_meas)(struct rkisp_isp_stats_vdev *stats_vdev,
|
||||
struct rkisp_isp21_stat_buffer *pbuf);
|
||||
void (*get_rawae0_meas)(struct rkisp_isp_stats_vdev *stats_vdev,
|
||||
struct rkisp_isp21_stat_buffer *pbuf);
|
||||
void (*get_rawhst0_meas)(struct rkisp_isp_stats_vdev *stats_vdev,
|
||||
struct rkisp_isp21_stat_buffer *pbuf);
|
||||
void (*get_rawae1_meas)(struct rkisp_isp_stats_vdev *stats_vdev,
|
||||
struct rkisp_isp21_stat_buffer *pbuf);
|
||||
void (*get_rawhst1_meas)(struct rkisp_isp_stats_vdev *stats_vdev,
|
||||
struct rkisp_isp21_stat_buffer *pbuf);
|
||||
void (*get_rawae2_meas)(struct rkisp_isp_stats_vdev *stats_vdev,
|
||||
struct rkisp_isp21_stat_buffer *pbuf);
|
||||
void (*get_rawhst2_meas)(struct rkisp_isp_stats_vdev *stats_vdev,
|
||||
struct rkisp_isp21_stat_buffer *pbuf);
|
||||
void (*get_rawae3_meas)(struct rkisp_isp_stats_vdev *stats_vdev,
|
||||
struct rkisp_isp21_stat_buffer *pbuf);
|
||||
void (*get_rawhst3_meas)(struct rkisp_isp_stats_vdev *stats_vdev,
|
||||
struct rkisp_isp21_stat_buffer *pbuf);
|
||||
void (*get_bls_stats)(struct rkisp_isp_stats_vdev *stats_vdev,
|
||||
struct rkisp_isp21_stat_buffer *pbuf);
|
||||
void (*get_dhaz_stats)(struct rkisp_isp_stats_vdev *stats_vdev,
|
||||
struct rkisp_isp21_stat_buffer *pbuf);
|
||||
};
|
||||
|
||||
void rkisp_stats_first_ddr_config_v21(struct rkisp_isp_stats_vdev *stats_vdev);
|
||||
void rkisp_init_stats_vdev_v21(struct rkisp_isp_stats_vdev *stats_vdev);
|
||||
void rkisp_uninit_stats_vdev_v21(struct rkisp_isp_stats_vdev *stats_vdev);
|
||||
|
||||
#endif /* _RKISP_ISP_STATS_V21_H */
|
||||
@@ -84,6 +84,7 @@
|
||||
#define ISP_BASE 0x00000400
|
||||
#define ISP_CTRL (ISP_BASE + 0x00000)
|
||||
#define ISP_ACQ_PROP (ISP_BASE + 0x00004)
|
||||
#define ISP_CTRL1 (ISP_BASE + 0x00004)
|
||||
#define ISP_ACQ_H_OFFS (ISP_BASE + 0x00008)
|
||||
#define ISP_ACQ_V_OFFS (ISP_BASE + 0x0000c)
|
||||
#define ISP_ACQ_H_SIZE (ISP_BASE + 0x00010)
|
||||
@@ -161,6 +162,13 @@
|
||||
#define ISP_WP_CNT_REGION2 (ISP_BASE + 0x00168)
|
||||
#define ISP_WP_CNT_REGION3 (ISP_BASE + 0x0016c)
|
||||
|
||||
#define ISP21_AWB_GAIN0_G (ISP_BASE + 0x00138)
|
||||
#define ISP21_AWB_GAIN0_RB (ISP_BASE + 0x0013c)
|
||||
#define ISP21_AWB_GAIN1_G (ISP_BASE + 0x00140)
|
||||
#define ISP21_AWB_GAIN1_RB (ISP_BASE + 0x00144)
|
||||
#define ISP21_AWB_GAIN2_G (ISP_BASE + 0x00148)
|
||||
#define ISP21_AWB_GAIN2_RB (ISP_BASE + 0x0014c)
|
||||
|
||||
#define ISP_CC_COEFF_0 (ISP_BASE + 0x00170)
|
||||
#define ISP_CC_COEFF_1 (ISP_BASE + 0x00174)
|
||||
#define ISP_CC_COEFF_2 (ISP_BASE + 0x00178)
|
||||
@@ -597,6 +605,87 @@
|
||||
#define ISP_DEBAYER_G_FILTER (ISP_DEBAYER_BASE + 0x00010)
|
||||
#define ISP_DEBAYER_C_FILTER (ISP_DEBAYER_BASE + 0x00014)
|
||||
|
||||
#define ISP21_YNR_BASE 0x00002700
|
||||
#define ISP21_YNR_GLOBAL_CTRL (ISP21_YNR_BASE + 0x00000)
|
||||
#define ISP21_YNR_RNR_MAX_R (ISP21_YNR_BASE + 0x00004)
|
||||
#define ISP21_YNR_LOWNR_CTRL0 (ISP21_YNR_BASE + 0x00010)
|
||||
#define ISP21_YNR_LOWNR_CTRL1 (ISP21_YNR_BASE + 0x00014)
|
||||
#define ISP21_YNR_LOWNR_CTRL2 (ISP21_YNR_BASE + 0x00018)
|
||||
#define ISP21_YNR_LOWNR_CTRL3 (ISP21_YNR_BASE + 0x0001c)
|
||||
#define ISP21_YNR_HIGHNR_CTRL0 (ISP21_YNR_BASE + 0x00020)
|
||||
#define ISP21_YNR_HIGHNR_CTRL1 (ISP21_YNR_BASE + 0x00024)
|
||||
#define ISP21_YNR_HIGHNR_BASE_FILTER_WEIGHT (ISP21_YNR_BASE + 0x00028)
|
||||
#define ISP21_YNR_GAUSS1_COEFF (ISP21_YNR_BASE + 0x00030)
|
||||
#define ISP21_YNR_GAUSS2_COEFF (ISP21_YNR_BASE + 0x00034)
|
||||
#define ISP21_YNR_DIRECTION_W_0_3 (ISP21_YNR_BASE + 0x00038)
|
||||
#define ISP21_YNR_DIRECTION_W_4_7 (ISP21_YNR_BASE + 0x0003c)
|
||||
#define ISP21_YNR_SGM_DX_0_1 (ISP21_YNR_BASE + 0x00040)
|
||||
#define ISP21_YNR_SGM_DX_2_3 (ISP21_YNR_BASE + 0x00044)
|
||||
#define ISP21_YNR_SGM_DX_4_5 (ISP21_YNR_BASE + 0x00048)
|
||||
#define ISP21_YNR_SGM_DX_6_7 (ISP21_YNR_BASE + 0x0004c)
|
||||
#define ISP21_YNR_SGM_DX_8_9 (ISP21_YNR_BASE + 0x00050)
|
||||
#define ISP21_YNR_SGM_DX_10_11 (ISP21_YNR_BASE + 0x00055)
|
||||
#define ISP21_YNR_SGM_DX_12_13 (ISP21_YNR_BASE + 0x00058)
|
||||
#define ISP21_YNR_SGM_DX_14_15 (ISP21_YNR_BASE + 0x0005c)
|
||||
#define ISP21_YNR_SGM_DX_16 (ISP21_YNR_BASE + 0x00060)
|
||||
#define ISP21_YNR_LSGM_Y_0_1 (ISP21_YNR_BASE + 0x00070)
|
||||
#define ISP21_YNR_LSGM_Y_2_3 (ISP21_YNR_BASE + 0x00074)
|
||||
#define ISP21_YNR_LSGM_Y_4_5 (ISP21_YNR_BASE + 0x00078)
|
||||
#define ISP21_YNR_LSGM_Y_6_7 (ISP21_YNR_BASE + 0x0007c)
|
||||
#define ISP21_YNR_LSGM_Y_8_9 (ISP21_YNR_BASE + 0x00080)
|
||||
#define ISP21_YNR_LSGM_Y_10_11 (ISP21_YNR_BASE + 0x00084)
|
||||
#define ISP21_YNR_LSGM_Y_12_13 (ISP21_YNR_BASE + 0x00088)
|
||||
#define ISP21_YNR_LSGM_Y_14_15 (ISP21_YNR_BASE + 0x0008c)
|
||||
#define ISP21_YNR_LSGM_Y_16 (ISP21_YNR_BASE + 0x00090)
|
||||
#define ISP21_YNR_HSGM_Y_0_1 (ISP21_YNR_BASE + 0x000a0)
|
||||
#define ISP21_YNR_HSGM_Y_2_3 (ISP21_YNR_BASE + 0x000a4)
|
||||
#define ISP21_YNR_HSGM_Y_4_5 (ISP21_YNR_BASE + 0x000a8)
|
||||
#define ISP21_YNR_HSGM_Y_6_7 (ISP21_YNR_BASE + 0x000ac)
|
||||
#define ISP21_YNR_HSGM_Y_8_9 (ISP21_YNR_BASE + 0x000b0)
|
||||
#define ISP21_YNR_HSGM_Y_10_11 (ISP21_YNR_BASE + 0x000b4)
|
||||
#define ISP21_YNR_HSGM_Y_12_13 (ISP21_YNR_BASE + 0x000b8)
|
||||
#define ISP21_YNR_HSGM_Y_14_15 (ISP21_YNR_BASE + 0x000bc)
|
||||
#define ISP21_YNR_HSGM_Y_16 (ISP21_YNR_BASE + 0x000c0)
|
||||
#define ISP21_YNR_RNR_STRENGTH03 (ISP21_YNR_BASE + 0x000d0)
|
||||
#define ISP21_YNR_RNR_STRENGTH47 (ISP21_YNR_BASE + 0x000d4)
|
||||
#define ISP21_YNR_RNR_STRENGTH8B (ISP21_YNR_BASE + 0x000d8)
|
||||
#define ISP21_YNR_RNR_STRENGTHCF (ISP21_YNR_BASE + 0x000dc)
|
||||
#define ISP21_YNR_RNR_STRENGTH16 (ISP21_YNR_BASE + 0x000e0)
|
||||
|
||||
#define ISP21_CNR_BASE 0x00002800
|
||||
#define ISP21_CNR_CTRL (ISP21_CNR_BASE + 0x00000)
|
||||
#define ISP21_CNR_EXGAIN (ISP21_CNR_BASE + 0x00004)
|
||||
#define ISP21_CNR_GAIN_PARA (ISP21_CNR_BASE + 0x00008)
|
||||
#define ISP21_CNR_GAIN_UV_PARA (ISP21_CNR_BASE + 0x0000c)
|
||||
#define ISP21_CNR_LMED3 (ISP21_CNR_BASE + 0x00010)
|
||||
#define ISP21_CNR_LBF5_GAIN (ISP21_CNR_BASE + 0x00014)
|
||||
#define ISP21_CNR_LBF5_WEITD0_3 (ISP21_CNR_BASE + 0x00018)
|
||||
#define ISP21_CNR_LBF5_WEITD4 (ISP21_CNR_BASE + 0x0001c)
|
||||
#define ISP21_CNR_HMED3 (ISP21_CNR_BASE + 0x00020)
|
||||
#define ISP21_CNR_HBF5 (ISP21_CNR_BASE + 0x00024)
|
||||
#define ISP21_CNR_LBF3 (ISP21_CNR_BASE + 0x00028)
|
||||
|
||||
#define ISP21_SHARP_BASE 0x00002900
|
||||
#define ISP21_SHARP_SHARP_EN (ISP21_SHARP_BASE + 0x00000)
|
||||
#define ISP21_SHARP_SHARP_RATIO (ISP21_SHARP_BASE + 0x00004)
|
||||
#define ISP21_SHARP_SHARP_LUMA_DX (ISP21_SHARP_BASE + 0x00008)
|
||||
#define ISP21_SHARP_SHARP_PBF_SIGMA_INV_0 (ISP21_SHARP_BASE + 0x0000c)
|
||||
#define ISP21_SHARP_SHARP_PBF_SIGMA_INV_1 (ISP21_SHARP_BASE + 0x00010)
|
||||
#define ISP21_SHARP_SHARP_PBF_SIGMA_INV_2 (ISP21_SHARP_BASE + 0x00014)
|
||||
#define ISP21_SHARP_SHARP_BF_SIGMA_INV_0 (ISP21_SHARP_BASE + 0x00018)
|
||||
#define ISP21_SHARP_SHARP_BF_SIGMA_INV_1 (ISP21_SHARP_BASE + 0x0001c)
|
||||
#define ISP21_SHARP_SHARP_BF_SIGMA_INV_2 (ISP21_SHARP_BASE + 0x00020)
|
||||
#define ISP21_SHARP_SHARP_SIGMA_SHIFT (ISP21_SHARP_BASE + 0x00024)
|
||||
#define ISP21_SHARP_SHARP_EHF_TH_0 (ISP21_SHARP_BASE + 0x00028)
|
||||
#define ISP21_SHARP_SHARP_EHF_TH_1 (ISP21_SHARP_BASE + 0x0002c)
|
||||
#define ISP21_SHARP_SHARP_EHF_TH_2 (ISP21_SHARP_BASE + 0x00030)
|
||||
#define ISP21_SHARP_SHARP_CLIP_HF_0 (ISP21_SHARP_BASE + 0x00034)
|
||||
#define ISP21_SHARP_SHARP_CLIP_HF_1 (ISP21_SHARP_BASE + 0x00038)
|
||||
#define ISP21_SHARP_SHARP_CLIP_HF_2 (ISP21_SHARP_BASE + 0x0003c)
|
||||
#define ISP21_SHARP_SHARP_PBF_COEF (ISP21_SHARP_BASE + 0x00040)
|
||||
#define ISP21_SHARP_SHARP_BF_COEF (ISP21_SHARP_BASE + 0x00044)
|
||||
#define ISP21_SHARP_SHARP_GAUS_COEF (ISP21_SHARP_BASE + 0x00048)
|
||||
|
||||
#define ISP_WDR_BASE 0x00002A00
|
||||
#define ISP_WDR_CTRL (ISP_WDR_BASE + 0x00000)
|
||||
#define ISP_WDR_WDR_TONECURVE_DYN1 (ISP_WDR_BASE + 0x00004)
|
||||
@@ -706,6 +795,10 @@
|
||||
#define ISP_BLS_B_MEASURED (ISP_BLS_BASE + 0x0003c)
|
||||
#define ISP_BLS_C_MEASURED (ISP_BLS_BASE + 0x00040)
|
||||
#define ISP_BLS_D_MEASURED (ISP_BLS_BASE + 0x00044)
|
||||
#define ISP_BLS1_A_FIXED (ISP_BLS_BASE + 0x00048)
|
||||
#define ISP_BLS1_B_FIXED (ISP_BLS_BASE + 0x0004c)
|
||||
#define ISP_BLS1_C_FIXED (ISP_BLS_BASE + 0x00050)
|
||||
#define ISP_BLS1_D_FIXED (ISP_BLS_BASE + 0x00054)
|
||||
|
||||
#define ISP_DPCC0_BASE 0x00003400
|
||||
#define ISP_DPCC1_BASE 0x00003500
|
||||
@@ -934,6 +1027,44 @@
|
||||
#define ISP_HDRTMO_HIST_RO30 (ISP_HDRTMO_BASE + 0x000d8)
|
||||
#define ISP_HDRTMO_HIST_RO31 (ISP_HDRTMO_BASE + 0x000dc)
|
||||
|
||||
#define ISP21_DRC_BASE 0x00003900
|
||||
#define ISP21_DRC_CTRL0 (ISP21_DRC_BASE + 0x00000)
|
||||
#define ISP21_DRC_CTRL1 (ISP21_DRC_BASE + 0x00004)
|
||||
#define ISP21_DRC_LPRATIO (ISP21_DRC_BASE + 0x00008)
|
||||
#define ISP21_DRC_EXPLRATIO (ISP21_DRC_BASE + 0x0000c)
|
||||
#define ISP21_DRC_SIGMA (ISP21_DRC_BASE + 0x00010)
|
||||
#define ISP21_DRC_SPACESGM (ISP21_DRC_BASE + 0x00014)
|
||||
#define ISP21_DRC_RANESGM (ISP21_DRC_BASE + 0x00018)
|
||||
#define ISP21_DRC_BILAT (ISP21_DRC_BASE + 0x0001c)
|
||||
#define ISP21_DRC_GAIN_Y0 (ISP21_DRC_BASE + 0x00020)
|
||||
#define ISP21_DRC_GAIN_Y1 (ISP21_DRC_BASE + 0x00024)
|
||||
#define ISP21_DRC_GAIN_Y2 (ISP21_DRC_BASE + 0x00028)
|
||||
#define ISP21_DRC_GAIN_Y3 (ISP21_DRC_BASE + 0x0002c)
|
||||
#define ISP21_DRC_GAIN_Y4 (ISP21_DRC_BASE + 0x00030)
|
||||
#define ISP21_DRC_GAIN_Y5 (ISP21_DRC_BASE + 0x00034)
|
||||
#define ISP21_DRC_GAIN_Y6 (ISP21_DRC_BASE + 0x00038)
|
||||
#define ISP21_DRC_GAIN_Y7 (ISP21_DRC_BASE + 0x0003c)
|
||||
#define ISP21_DRC_GAIN_Y8 (ISP21_DRC_BASE + 0x00040)
|
||||
#define ISP21_DRC_COMPRES_Y0 (ISP21_DRC_BASE + 0x00044)
|
||||
#define ISP21_DRC_COMPRES_Y1 (ISP21_DRC_BASE + 0x00048)
|
||||
#define ISP21_DRC_COMPRES_Y2 (ISP21_DRC_BASE + 0x0004c)
|
||||
#define ISP21_DRC_COMPRES_Y3 (ISP21_DRC_BASE + 0x00050)
|
||||
#define ISP21_DRC_COMPRES_Y4 (ISP21_DRC_BASE + 0x00054)
|
||||
#define ISP21_DRC_COMPRES_Y5 (ISP21_DRC_BASE + 0x00058)
|
||||
#define ISP21_DRC_COMPRES_Y6 (ISP21_DRC_BASE + 0x0005c)
|
||||
#define ISP21_DRC_COMPRES_Y7 (ISP21_DRC_BASE + 0x00060)
|
||||
#define ISP21_DRC_COMPRES_Y8 (ISP21_DRC_BASE + 0x00064)
|
||||
#define ISP21_DRC_SCALE_Y0 (ISP21_DRC_BASE + 0x00068)
|
||||
#define ISP21_DRC_SCALE_Y1 (ISP21_DRC_BASE + 0x0006c)
|
||||
#define ISP21_DRC_SCALE_Y2 (ISP21_DRC_BASE + 0x00070)
|
||||
#define ISP21_DRC_SCALE_Y3 (ISP21_DRC_BASE + 0x00074)
|
||||
#define ISP21_DRC_SCALE_Y4 (ISP21_DRC_BASE + 0x00078)
|
||||
#define ISP21_DRC_SCALE_Y5 (ISP21_DRC_BASE + 0x0007c)
|
||||
#define ISP21_DRC_SCALE_Y6 (ISP21_DRC_BASE + 0x00080)
|
||||
#define ISP21_DRC_SCALE_Y7 (ISP21_DRC_BASE + 0x00084)
|
||||
#define ISP21_DRC_SCALE_Y8 (ISP21_DRC_BASE + 0x00088)
|
||||
#define ISP21_DRC_IIRWG_GAIN (ISP21_DRC_BASE + 0x0008c)
|
||||
|
||||
#define ISP_RAWNR_BASE 0x00003A00
|
||||
#define ISP_RAWNR_CTRL (ISP_RAWNR_BASE + 0x00000)
|
||||
#define ISP_RAWNR_FILTPAR0 (ISP_RAWNR_BASE + 0x00008)
|
||||
@@ -963,6 +1094,53 @@
|
||||
#define ISP_RAWNR_WLAMDA2 (ISP_RAWNR_BASE + 0x00068)
|
||||
#define ISP_RAWNR_RGBAIN_FLIP (ISP_RAWNR_BASE + 0x0006c)
|
||||
|
||||
#define ISP21_BAYNR_CTRL (ISP_RAWNR_BASE + 0x00000)
|
||||
#define ISP21_BAYNR_DGAIN0 (ISP_RAWNR_BASE + 0x00004)
|
||||
#define ISP21_BAYNR_DGAIN1 (ISP_RAWNR_BASE + 0x00008)
|
||||
#define ISP21_BAYNR_PIXDIFF (ISP_RAWNR_BASE + 0x0000c)
|
||||
#define ISP21_BAYNR_THLD (ISP_RAWNR_BASE + 0x00010)
|
||||
#define ISP21_BAYNR_W1_STRENG (ISP_RAWNR_BASE + 0x00014)
|
||||
#define ISP21_BAYNR_SIGMAX01 (ISP_RAWNR_BASE + 0x00018)
|
||||
#define ISP21_BAYNR_SIGMAX23 (ISP_RAWNR_BASE + 0x0001c)
|
||||
#define ISP21_BAYNR_SIGMAX45 (ISP_RAWNR_BASE + 0x00020)
|
||||
#define ISP21_BAYNR_SIGMAX67 (ISP_RAWNR_BASE + 0x00024)
|
||||
#define ISP21_BAYNR_SIGMAX89 (ISP_RAWNR_BASE + 0x00028)
|
||||
#define ISP21_BAYNR_SIGMAX1011 (ISP_RAWNR_BASE + 0x0002c)
|
||||
#define ISP21_BAYNR_SIGMAX1213 (ISP_RAWNR_BASE + 0x00030)
|
||||
#define ISP21_BAYNR_SIGMAX1415 (ISP_RAWNR_BASE + 0x00034)
|
||||
#define ISP21_BAYNR_SIGMAY01 (ISP_RAWNR_BASE + 0x00038)
|
||||
#define ISP21_BAYNR_SIGMAY23 (ISP_RAWNR_BASE + 0x0003c)
|
||||
#define ISP21_BAYNR_SIGMAY45 (ISP_RAWNR_BASE + 0x00040)
|
||||
#define ISP21_BAYNR_SIGMAY67 (ISP_RAWNR_BASE + 0x00044)
|
||||
#define ISP21_BAYNR_SIGMAY89 (ISP_RAWNR_BASE + 0x00048)
|
||||
#define ISP21_BAYNR_SIGMAY1011 (ISP_RAWNR_BASE + 0x0004c)
|
||||
#define ISP21_BAYNR_SIGMAY1213 (ISP_RAWNR_BASE + 0x00050)
|
||||
#define ISP21_BAYNR_SIGMAY1415 (ISP_RAWNR_BASE + 0x00054)
|
||||
#define ISP21_BAYNR_WRIT_D (ISP_RAWNR_BASE + 0x00058)
|
||||
|
||||
#define ISP21_BAY3D_BASE 0x00003A00
|
||||
#define ISP21_BAY3D_CTRL (ISP21_BAY3D_BASE + 0x00080)
|
||||
#define ISP21_BAY3D_KALRATIO (ISP21_BAY3D_BASE + 0x00084)
|
||||
#define ISP21_BAY3D_GLBPK2 (ISP21_BAY3D_BASE + 0x00088)
|
||||
#define ISP21_BAY3D_KALSTR (ISP21_BAY3D_BASE + 0x0008c)
|
||||
#define ISP21_BAY3D_WGTLMT (ISP21_BAY3D_BASE + 0x00090)
|
||||
#define ISP21_BAY3D_SIG_X0 (ISP21_BAY3D_BASE + 0x00094)
|
||||
#define ISP21_BAY3D_SIG_X1 (ISP21_BAY3D_BASE + 0x00098)
|
||||
#define ISP21_BAY3D_SIG_X2 (ISP21_BAY3D_BASE + 0x0009c)
|
||||
#define ISP21_BAY3D_SIG_X3 (ISP21_BAY3D_BASE + 0x000a0)
|
||||
#define ISP21_BAY3D_SIG_X4 (ISP21_BAY3D_BASE + 0x000a4)
|
||||
#define ISP21_BAY3D_SIG_X5 (ISP21_BAY3D_BASE + 0x000a8)
|
||||
#define ISP21_BAY3D_SIG_X6 (ISP21_BAY3D_BASE + 0x000ac)
|
||||
#define ISP21_BAY3D_SIG_X7 (ISP21_BAY3D_BASE + 0x000b0)
|
||||
#define ISP21_BAY3D_SIG_Y0 (ISP21_BAY3D_BASE + 0x000b4)
|
||||
#define ISP21_BAY3D_SIG_Y1 (ISP21_BAY3D_BASE + 0x000b8)
|
||||
#define ISP21_BAY3D_SIG_Y2 (ISP21_BAY3D_BASE + 0x000bc)
|
||||
#define ISP21_BAY3D_SIG_Y3 (ISP21_BAY3D_BASE + 0x000c0)
|
||||
#define ISP21_BAY3D_SIG_Y4 (ISP21_BAY3D_BASE + 0x000c4)
|
||||
#define ISP21_BAY3D_SIG_Y5 (ISP21_BAY3D_BASE + 0x000c8)
|
||||
#define ISP21_BAY3D_SIG_Y6 (ISP21_BAY3D_BASE + 0x000cc)
|
||||
#define ISP21_BAY3D_SIG_Y7 (ISP21_BAY3D_BASE + 0x000d0)
|
||||
|
||||
#define ISP_LDCH_BASE 0x00003B00
|
||||
#define ISP_LDCH_STS (ISP_LDCH_BASE + 0x00000)
|
||||
|
||||
@@ -1088,6 +1266,66 @@
|
||||
#define ISP_DHAZ_HIST_REG94 (ISP_DHAZ_BASE + 0x001e8)
|
||||
#define ISP_DHAZ_HIST_REG95 (ISP_DHAZ_BASE + 0x001ec)
|
||||
|
||||
#define ISP21_DHAZ_CTRL (ISP_DHAZ_BASE + 0x00000)
|
||||
#define ISP21_DHAZ_ADP0 (ISP_DHAZ_BASE + 0x00004)
|
||||
#define ISP21_DHAZ_ADP1 (ISP_DHAZ_BASE + 0x00008)
|
||||
#define ISP21_DHAZ_ADP2 (ISP_DHAZ_BASE + 0x0000c)
|
||||
#define ISP21_DHAZ_ADP_TMAX (ISP_DHAZ_BASE + 0x00010)
|
||||
#define ISP21_DHAZ_ADP_HIST0 (ISP_DHAZ_BASE + 0x00014)
|
||||
#define ISP21_DHAZ_ADP_HIST1 (ISP_DHAZ_BASE + 0x00018)
|
||||
#define ISP21_DHAZ_ENHANCE (ISP_DHAZ_BASE + 0x0001c)
|
||||
#define ISP21_DHAZ_IIR0 (ISP_DHAZ_BASE + 0x00020)
|
||||
#define ISP21_DHAZ_IIR1 (ISP_DHAZ_BASE + 0x00024)
|
||||
#define ISP21_DHAZ_SOFT_CFG0 (ISP_DHAZ_BASE + 0x00028)
|
||||
#define ISP21_DHAZ_SOFT_CFG1 (ISP_DHAZ_BASE + 0x0002c)
|
||||
#define ISP21_DHAZ_BF_SIGMA (ISP_DHAZ_BASE + 0x00030)
|
||||
#define ISP21_DHAZ_BF_WET (ISP_DHAZ_BASE + 0x00034)
|
||||
#define ISP21_DHAZ_ENH_CURVE0 (ISP_DHAZ_BASE + 0x00038)
|
||||
#define ISP21_DHAZ_ENH_CURVE1 (ISP_DHAZ_BASE + 0x0003c)
|
||||
#define ISP21_DHAZ_ENH_CURVE2 (ISP_DHAZ_BASE + 0x00040)
|
||||
#define ISP21_DHAZ_ENH_CURVE3 (ISP_DHAZ_BASE + 0x00044)
|
||||
#define ISP21_DHAZ_ENH_CURVE4 (ISP_DHAZ_BASE + 0x00048)
|
||||
#define ISP21_DHAZ_ENH_CURVE5 (ISP_DHAZ_BASE + 0x0004c)
|
||||
#define ISP21_DHAZ_ENH_CURVE6 (ISP_DHAZ_BASE + 0x00050)
|
||||
#define ISP21_DHAZ_ENH_CURVE7 (ISP_DHAZ_BASE + 0x00054)
|
||||
#define ISP21_DHAZ_ENH_CURVE8 (ISP_DHAZ_BASE + 0x00058)
|
||||
#define ISP21_DHAZ_GAUS (ISP_DHAZ_BASE + 0x0005c)
|
||||
#define ISP21_DHAZ_CTRL_SHD (ISP_DHAZ_BASE + 0x00060)
|
||||
#define ISP21_DHAZ_ADP_RD0 (ISP_DHAZ_BASE + 0x00064)
|
||||
#define ISP21_DHAZ_ADP_RD1 (ISP_DHAZ_BASE + 0x00068)
|
||||
#define ISP21_DHAZ_HIST_REG0 (ISP_DHAZ_BASE + 0x00070)
|
||||
#define ISP21_DHAZ_HIST_REG1 (ISP_DHAZ_BASE + 0x00074)
|
||||
#define ISP21_DHAZ_HIST_REG2 (ISP_DHAZ_BASE + 0x00078)
|
||||
#define ISP21_DHAZ_HIST_REG3 (ISP_DHAZ_BASE + 0x0007c)
|
||||
#define ISP21_DHAZ_HIST_REG4 (ISP_DHAZ_BASE + 0x00080)
|
||||
#define ISP21_DHAZ_HIST_REG5 (ISP_DHAZ_BASE + 0x00084)
|
||||
#define ISP21_DHAZ_HIST_REG6 (ISP_DHAZ_BASE + 0x00088)
|
||||
#define ISP21_DHAZ_HIST_REG7 (ISP_DHAZ_BASE + 0x0008c)
|
||||
#define ISP21_DHAZ_HIST_REG8 (ISP_DHAZ_BASE + 0x00090)
|
||||
#define ISP21_DHAZ_HIST_REG9 (ISP_DHAZ_BASE + 0x00094)
|
||||
#define ISP21_DHAZ_HIST_REG10 (ISP_DHAZ_BASE + 0x00098)
|
||||
#define ISP21_DHAZ_HIST_REG11 (ISP_DHAZ_BASE + 0x0009c)
|
||||
#define ISP21_DHAZ_HIST_REG12 (ISP_DHAZ_BASE + 0x000a0)
|
||||
#define ISP21_DHAZ_HIST_REG13 (ISP_DHAZ_BASE + 0x000a4)
|
||||
#define ISP21_DHAZ_HIST_REG14 (ISP_DHAZ_BASE + 0x000a8)
|
||||
#define ISP21_DHAZ_HIST_REG15 (ISP_DHAZ_BASE + 0x000ac)
|
||||
#define ISP21_DHAZ_HIST_REG16 (ISP_DHAZ_BASE + 0x000b0)
|
||||
#define ISP21_DHAZ_HIST_REG17 (ISP_DHAZ_BASE + 0x000b4)
|
||||
#define ISP21_DHAZ_HIST_REG18 (ISP_DHAZ_BASE + 0x000b8)
|
||||
#define ISP21_DHAZ_HIST_REG19 (ISP_DHAZ_BASE + 0x000bc)
|
||||
#define ISP21_DHAZ_HIST_REG20 (ISP_DHAZ_BASE + 0x000c0)
|
||||
#define ISP21_DHAZ_HIST_REG21 (ISP_DHAZ_BASE + 0x000c4)
|
||||
#define ISP21_DHAZ_HIST_REG22 (ISP_DHAZ_BASE + 0x000c8)
|
||||
#define ISP21_DHAZ_HIST_REG23 (ISP_DHAZ_BASE + 0x000cc)
|
||||
#define ISP21_DHAZ_HIST_REG24 (ISP_DHAZ_BASE + 0x000d0)
|
||||
#define ISP21_DHAZ_HIST_REG25 (ISP_DHAZ_BASE + 0x000d4)
|
||||
#define ISP21_DHAZ_HIST_REG26 (ISP_DHAZ_BASE + 0x000d8)
|
||||
#define ISP21_DHAZ_HIST_REG27 (ISP_DHAZ_BASE + 0x000dc)
|
||||
#define ISP21_DHAZ_HIST_REG28 (ISP_DHAZ_BASE + 0x000e0)
|
||||
#define ISP21_DHAZ_HIST_REG29 (ISP_DHAZ_BASE + 0x000e4)
|
||||
#define ISP21_DHAZ_HIST_REG30 (ISP_DHAZ_BASE + 0x000e8)
|
||||
#define ISP21_DHAZ_HIST_REG31 (ISP_DHAZ_BASE + 0x000ec)
|
||||
|
||||
#define ISP_3DLUT_BASE 0x00003E00
|
||||
#define ISP_3DLUT_CTRL (ISP_3DLUT_BASE + 0x00000)
|
||||
#define ISP_3DLUT_UPDATE (ISP_3DLUT_BASE + 0x00004)
|
||||
@@ -1661,6 +1899,217 @@
|
||||
#define ISP_RAWAWB_RAM_CTRL (ISP_RAWAWB_BASE + 0x00650)
|
||||
#define ISP_RAWAWB_RAM_DATA (ISP_RAWAWB_BASE + 0x00660)
|
||||
|
||||
#define ISP21_RAWAWB_BASE 0x00005000
|
||||
#define ISP21_RAWAWB_CTRL (ISP21_RAWAWB_BASE + 0x0000)
|
||||
#define ISP21_RAWAWB_BLK_CTRL (ISP21_RAWAWB_BASE + 0x0004)
|
||||
#define ISP21_RAWAWB_WIN_OFFS (ISP21_RAWAWB_BASE + 0x0008)
|
||||
#define ISP21_RAWAWB_WIN_SIZE (ISP21_RAWAWB_BASE + 0x000c)
|
||||
#define ISP21_RAWAWB_LIMIT_RG_MAX (ISP21_RAWAWB_BASE + 0x0010)
|
||||
#define ISP21_RAWAWB_LIMIT_BY_MAX (ISP21_RAWAWB_BASE + 0x0014)
|
||||
#define ISP21_RAWAWB_LIMIT_RG_MIN (ISP21_RAWAWB_BASE + 0x0018)
|
||||
#define ISP21_RAWAWB_LIMIT_BY_MIN (ISP21_RAWAWB_BASE + 0x001c)
|
||||
#define ISP21_RAWAWB_WEIGHT_CURVE_CTRL (ISP21_RAWAWB_BASE + 0x0020)
|
||||
#define ISP21_RAWAWB_YWEIGHT_CURVE_XCOOR03 (ISP21_RAWAWB_BASE + 0x0024)
|
||||
#define ISP21_RAWAWB_YWEIGHT_CURVE_XCOOR47 (ISP21_RAWAWB_BASE + 0x0028)
|
||||
#define ISP21_RAWAWB_YWEIGHT_CURVE_XCOOR8 (ISP21_RAWAWB_BASE + 0x002c)
|
||||
#define ISP21_RAWAWB_YWEIGHT_CURVE_YCOOR03 (ISP21_RAWAWB_BASE + 0x0030)
|
||||
#define ISP21_RAWAWB_YWEIGHT_CURVE_YCOOR47 (ISP21_RAWAWB_BASE + 0x0034)
|
||||
#define ISP21_RAWAWB_YWEIGHT_CURVE_YCOOR8 (ISP21_RAWAWB_BASE + 0x0038)
|
||||
#define ISP21_RAWAWB_PRE_WBGAIN_INV (ISP21_RAWAWB_BASE + 0x003c)
|
||||
#define ISP21_RAWAWB_UV_DETC_VERTEX0_0 (ISP21_RAWAWB_BASE + 0x0040)
|
||||
#define ISP21_RAWAWB_UV_DETC_VERTEX1_0 (ISP21_RAWAWB_BASE + 0x0044)
|
||||
#define ISP21_RAWAWB_UV_DETC_VERTEX2_0 (ISP21_RAWAWB_BASE + 0x0048)
|
||||
#define ISP21_RAWAWB_UV_DETC_VERTEX3_0 (ISP21_RAWAWB_BASE + 0x004c)
|
||||
#define ISP21_RAWAWB_UV_DETC_ISLOPE01_0 (ISP21_RAWAWB_BASE + 0x0050)
|
||||
#define ISP21_RAWAWB_UV_DETC_ISLOPE12_0 (ISP21_RAWAWB_BASE + 0x0054)
|
||||
#define ISP21_RAWAWB_UV_DETC_ISLOPE23_0 (ISP21_RAWAWB_BASE + 0x0058)
|
||||
#define ISP21_RAWAWB_UV_DETC_ISLOPE30_0 (ISP21_RAWAWB_BASE + 0x005c)
|
||||
#define ISP21_RAWAWB_UV_DETC_VERTEX0_1 (ISP21_RAWAWB_BASE + 0x0060)
|
||||
#define ISP21_RAWAWB_UV_DETC_VERTEX1_1 (ISP21_RAWAWB_BASE + 0x0064)
|
||||
#define ISP21_RAWAWB_UV_DETC_VERTEX2_1 (ISP21_RAWAWB_BASE + 0x0068)
|
||||
#define ISP21_RAWAWB_UV_DETC_VERTEX3_1 (ISP21_RAWAWB_BASE + 0x006c)
|
||||
#define ISP21_RAWAWB_UV_DETC_ISLOPE01_1 (ISP21_RAWAWB_BASE + 0x0070)
|
||||
#define ISP21_RAWAWB_UV_DETC_ISLOPE12_1 (ISP21_RAWAWB_BASE + 0x0074)
|
||||
#define ISP21_RAWAWB_UV_DETC_ISLOPE23_1 (ISP21_RAWAWB_BASE + 0x0078)
|
||||
#define ISP21_RAWAWB_UV_DETC_ISLOPE30_1 (ISP21_RAWAWB_BASE + 0x007c)
|
||||
#define ISP21_RAWAWB_UV_DETC_VERTEX0_2 (ISP21_RAWAWB_BASE + 0x0080)
|
||||
#define ISP21_RAWAWB_UV_DETC_VERTEX1_2 (ISP21_RAWAWB_BASE + 0x0084)
|
||||
#define ISP21_RAWAWB_UV_DETC_VERTEX2_2 (ISP21_RAWAWB_BASE + 0x0088)
|
||||
#define ISP21_RAWAWB_UV_DETC_VERTEX3_2 (ISP21_RAWAWB_BASE + 0x008c)
|
||||
#define ISP21_RAWAWB_UV_DETC_ISLOPE01_2 (ISP21_RAWAWB_BASE + 0x0090)
|
||||
#define ISP21_RAWAWB_UV_DETC_ISLOPE12_2 (ISP21_RAWAWB_BASE + 0x0094)
|
||||
#define ISP21_RAWAWB_UV_DETC_ISLOPE23_2 (ISP21_RAWAWB_BASE + 0x0098)
|
||||
#define ISP21_RAWAWB_UV_DETC_ISLOPE30_2 (ISP21_RAWAWB_BASE + 0x009c)
|
||||
#define ISP21_RAWAWB_UV_DETC_VERTEX0_3 (ISP21_RAWAWB_BASE + 0x00a0)
|
||||
#define ISP21_RAWAWB_UV_DETC_VERTEX1_3 (ISP21_RAWAWB_BASE + 0x00a4)
|
||||
#define ISP21_RAWAWB_UV_DETC_VERTEX2_3 (ISP21_RAWAWB_BASE + 0x00a8)
|
||||
#define ISP21_RAWAWB_UV_DETC_VERTEX3_3 (ISP21_RAWAWB_BASE + 0x00ac)
|
||||
#define ISP21_RAWAWB_UV_DETC_ISLOPE01_3 (ISP21_RAWAWB_BASE + 0x00b0)
|
||||
#define ISP21_RAWAWB_UV_DETC_ISLOPE12_3 (ISP21_RAWAWB_BASE + 0x00b4)
|
||||
#define ISP21_RAWAWB_UV_DETC_ISLOPE23_3 (ISP21_RAWAWB_BASE + 0x00b8)
|
||||
#define ISP21_RAWAWB_UV_DETC_ISLOPE30_3 (ISP21_RAWAWB_BASE + 0x00bc)
|
||||
#define ISP21_RAWAWB_UV_DETC_VERTEX0_4 (ISP21_RAWAWB_BASE + 0x00c0)
|
||||
#define ISP21_RAWAWB_UV_DETC_VERTEX1_4 (ISP21_RAWAWB_BASE + 0x00c4)
|
||||
#define ISP21_RAWAWB_UV_DETC_VERTEX2_4 (ISP21_RAWAWB_BASE + 0x00c8)
|
||||
#define ISP21_RAWAWB_UV_DETC_VERTEX3_4 (ISP21_RAWAWB_BASE + 0x00cc)
|
||||
#define ISP21_RAWAWB_UV_DETC_ISLOPE01_4 (ISP21_RAWAWB_BASE + 0x00d0)
|
||||
#define ISP21_RAWAWB_UV_DETC_ISLOPE12_4 (ISP21_RAWAWB_BASE + 0x00d4)
|
||||
#define ISP21_RAWAWB_UV_DETC_ISLOPE23_4 (ISP21_RAWAWB_BASE + 0x00d8)
|
||||
#define ISP21_RAWAWB_UV_DETC_ISLOPE30_4 (ISP21_RAWAWB_BASE + 0x00dc)
|
||||
#define ISP21_RAWAWB_UV_DETC_VERTEX0_5 (ISP21_RAWAWB_BASE + 0x00e0)
|
||||
#define ISP21_RAWAWB_UV_DETC_VERTEX1_5 (ISP21_RAWAWB_BASE + 0x00e4)
|
||||
#define ISP21_RAWAWB_UV_DETC_VERTEX2_5 (ISP21_RAWAWB_BASE + 0x00e8)
|
||||
#define ISP21_RAWAWB_UV_DETC_VERTEX3_5 (ISP21_RAWAWB_BASE + 0x00ec)
|
||||
#define ISP21_RAWAWB_UV_DETC_ISLOPE01_5 (ISP21_RAWAWB_BASE + 0x00f0)
|
||||
#define ISP21_RAWAWB_UV_DETC_ISLOPE10_5 (ISP21_RAWAWB_BASE + 0x00f4)
|
||||
#define ISP21_RAWAWB_UV_DETC_ISLOPE23_5 (ISP21_RAWAWB_BASE + 0x00f8)
|
||||
#define ISP21_RAWAWB_UV_DETC_ISLOPE30_5 (ISP21_RAWAWB_BASE + 0x00fc)
|
||||
#define ISP21_RAWAWB_UV_DETC_VERTEX0_6 (ISP21_RAWAWB_BASE + 0x0100)
|
||||
#define ISP21_RAWAWB_UV_DETC_VERTEX1_6 (ISP21_RAWAWB_BASE + 0x0104)
|
||||
#define ISP21_RAWAWB_UV_DETC_VERTEX2_6 (ISP21_RAWAWB_BASE + 0x0108)
|
||||
#define ISP21_RAWAWB_UV_DETC_VERTEX3_6 (ISP21_RAWAWB_BASE + 0x010c)
|
||||
#define ISP21_RAWAWB_UV_DETC_ISLOPE01_6 (ISP21_RAWAWB_BASE + 0x0110)
|
||||
#define ISP21_RAWAWB_UV_DETC_ISLOPE10_6 (ISP21_RAWAWB_BASE + 0x0114)
|
||||
#define ISP21_RAWAWB_UV_DETC_ISLOPE23_6 (ISP21_RAWAWB_BASE + 0x0118)
|
||||
#define ISP21_RAWAWB_UV_DETC_ISLOPE30_6 (ISP21_RAWAWB_BASE + 0x011c)
|
||||
#define ISP21_RAWAWB_YUV_RGB2ROTY_0 (ISP21_RAWAWB_BASE + 0x0120)
|
||||
#define ISP21_RAWAWB_YUV_RGB2ROTY_1 (ISP21_RAWAWB_BASE + 0x0124)
|
||||
#define ISP21_RAWAWB_YUV_RGB2ROTU_0 (ISP21_RAWAWB_BASE + 0x0128)
|
||||
#define ISP21_RAWAWB_YUV_RGB2ROTU_1 (ISP21_RAWAWB_BASE + 0x012c)
|
||||
#define ISP21_RAWAWB_YUV_RGB2ROTV_0 (ISP21_RAWAWB_BASE + 0x0130)
|
||||
#define ISP21_RAWAWB_YUV_RGB2ROTV_1 (ISP21_RAWAWB_BASE + 0x0134)
|
||||
#define ISP21_RAWAWB_YUV_X_COOR_Y_0 (ISP21_RAWAWB_BASE + 0x0140)
|
||||
#define ISP21_RAWAWB_YUV_X_COOR_U_0 (ISP21_RAWAWB_BASE + 0x0144)
|
||||
#define ISP21_RAWAWB_YUV_X_COOR_V_0 (ISP21_RAWAWB_BASE + 0x0148)
|
||||
#define ISP21_RAWAWB_YUV_X1X2_DIS_0 (ISP21_RAWAWB_BASE + 0x014c)
|
||||
#define ISP21_RAWAWB_YUV_INTERP_CURVE_UCOOR_0 (ISP21_RAWAWB_BASE + 0x0150)
|
||||
#define ISP21_RAWAWB_YUV_INTERP_CURVE_TH0_0 (ISP21_RAWAWB_BASE + 0x0154)
|
||||
#define ISP21_RAWAWB_YUV_INTERP_CURVE_TH1_0 (ISP21_RAWAWB_BASE + 0x0158)
|
||||
#define ISP21_RAWAWB_YUV_INTERP_CURVE_TH2_0 (ISP21_RAWAWB_BASE + 0x015c)
|
||||
#define ISP21_RAWAWB_YUV_X_COOR_Y_1 (ISP21_RAWAWB_BASE + 0x0160)
|
||||
#define ISP21_RAWAWB_YUV_X_COOR_U_1 (ISP21_RAWAWB_BASE + 0x0164)
|
||||
#define ISP21_RAWAWB_YUV_X_COOR_V_1 (ISP21_RAWAWB_BASE + 0x0168)
|
||||
#define ISP21_RAWAWB_YUV_X1X2_DIS_1 (ISP21_RAWAWB_BASE + 0x016c)
|
||||
#define ISP21_RAWAWB_YUV_INTERP_CURVE_UCOOR_1 (ISP21_RAWAWB_BASE + 0x0170)
|
||||
#define ISP21_RAWAWB_YUV_INTERP_CURVE_TH0_1 (ISP21_RAWAWB_BASE + 0x0174)
|
||||
#define ISP21_RAWAWB_YUV_INTERP_CURVE_TH1_1 (ISP21_RAWAWB_BASE + 0x0178)
|
||||
#define ISP21_RAWAWB_YUV_INTERP_CURVE_TH2_1 (ISP21_RAWAWB_BASE + 0x017c)
|
||||
#define ISP21_RAWAWB_YUV_X_COOR_Y_2 (ISP21_RAWAWB_BASE + 0x0180)
|
||||
#define ISP21_RAWAWB_YUV_X_COOR_U_2 (ISP21_RAWAWB_BASE + 0x0184)
|
||||
#define ISP21_RAWAWB_YUV_X_COOR_V_2 (ISP21_RAWAWB_BASE + 0x0188)
|
||||
#define ISP21_RAWAWB_YUV_X1X2_DIS_2 (ISP21_RAWAWB_BASE + 0x018c)
|
||||
#define ISP21_RAWAWB_YUV_INTERP_CURVE_UCOOR_2 (ISP21_RAWAWB_BASE + 0x0190)
|
||||
#define ISP21_RAWAWB_YUV_INTERP_CURVE_TH0_2 (ISP21_RAWAWB_BASE + 0x0194)
|
||||
#define ISP21_RAWAWB_YUV_INTERP_CURVE_TH1_2 (ISP21_RAWAWB_BASE + 0x0198)
|
||||
#define ISP21_RAWAWB_YUV_INTERP_CURVE_TH2_2 (ISP21_RAWAWB_BASE + 0x019c)
|
||||
#define ISP21_RAWAWB_YUV_X_COOR_Y_3 (ISP21_RAWAWB_BASE + 0x01a0)
|
||||
#define ISP21_RAWAWB_YUV_X_COOR_U_3 (ISP21_RAWAWB_BASE + 0x01a4)
|
||||
#define ISP21_RAWAWB_YUV_X_COOR_V_3 (ISP21_RAWAWB_BASE + 0x01a8)
|
||||
#define ISP21_RAWAWB_YUV_X1X2_DIS_3 (ISP21_RAWAWB_BASE + 0x01ac)
|
||||
#define ISP21_RAWAWB_YUV_INTERP_CURVE_UCOOR_3 (ISP21_RAWAWB_BASE + 0x01b0)
|
||||
#define ISP21_RAWAWB_YUV_INTERP_CURVE_TH0_3 (ISP21_RAWAWB_BASE + 0x01b4)
|
||||
#define ISP21_RAWAWB_YUV_INTERP_CURVE_TH1_3 (ISP21_RAWAWB_BASE + 0x01b8)
|
||||
#define ISP21_RAWAWB_YUV_INTERP_CURVE_TH2_3 (ISP21_RAWAWB_BASE + 0x01bc)
|
||||
#define ISP21_RAWAWB_RGB2XY_WT01 (ISP21_RAWAWB_BASE + 0x01fc)
|
||||
#define ISP21_RAWAWB_RGB2XY_WT2 (ISP21_RAWAWB_BASE + 0x0200)
|
||||
#define ISP21_RAWAWB_RGB2XY_MAT0_XY (ISP21_RAWAWB_BASE + 0x0204)
|
||||
#define ISP21_RAWAWB_RGB2XY_MAT1_XY (ISP21_RAWAWB_BASE + 0x0208)
|
||||
#define ISP21_RAWAWB_RGB2XY_MAT2_XY (ISP21_RAWAWB_BASE + 0x020c)
|
||||
#define ISP21_RAWAWB_XY_DETC_NOR_X_0 (ISP21_RAWAWB_BASE + 0x0210)
|
||||
#define ISP21_RAWAWB_XY_DETC_NOR_Y_0 (ISP21_RAWAWB_BASE + 0x0214)
|
||||
#define ISP21_RAWAWB_XY_DETC_BIG_X_0 (ISP21_RAWAWB_BASE + 0x0218)
|
||||
#define ISP21_RAWAWB_XY_DETC_BIG_Y_0 (ISP21_RAWAWB_BASE + 0x021c)
|
||||
#define ISP21_RAWAWB_XY_DETC_NOR_X_1 (ISP21_RAWAWB_BASE + 0x0228)
|
||||
#define ISP21_RAWAWB_XY_DETC_NOR_Y_1 (ISP21_RAWAWB_BASE + 0x022c)
|
||||
#define ISP21_RAWAWB_XY_DETC_BIG_X_1 (ISP21_RAWAWB_BASE + 0x0230)
|
||||
#define ISP21_RAWAWB_XY_DETC_BIG_Y_1 (ISP21_RAWAWB_BASE + 0x0234)
|
||||
#define ISP21_RAWAWB_XY_DETC_NOR_X_2 (ISP21_RAWAWB_BASE + 0x0240)
|
||||
#define ISP21_RAWAWB_XY_DETC_NOR_Y_2 (ISP21_RAWAWB_BASE + 0x0244)
|
||||
#define ISP21_RAWAWB_XY_DETC_BIG_X_2 (ISP21_RAWAWB_BASE + 0x0248)
|
||||
#define ISP21_RAWAWB_XY_DETC_BIG_Y_2 (ISP21_RAWAWB_BASE + 0x024c)
|
||||
#define ISP21_RAWAWB_XY_DETC_NOR_X_3 (ISP21_RAWAWB_BASE + 0x0258)
|
||||
#define ISP21_RAWAWB_XY_DETC_NOR_Y_3 (ISP21_RAWAWB_BASE + 0x025c)
|
||||
#define ISP21_RAWAWB_XY_DETC_BIG_X_3 (ISP21_RAWAWB_BASE + 0x0260)
|
||||
#define ISP21_RAWAWB_XY_DETC_BIG_Y_3 (ISP21_RAWAWB_BASE + 0x0264)
|
||||
#define ISP21_RAWAWB_XY_DETC_NOR_X_4 (ISP21_RAWAWB_BASE + 0x0270)
|
||||
#define ISP21_RAWAWB_XY_DETC_NOR_Y_4 (ISP21_RAWAWB_BASE + 0x0274)
|
||||
#define ISP21_RAWAWB_XY_DETC_BIG_X_4 (ISP21_RAWAWB_BASE + 0x0278)
|
||||
#define ISP21_RAWAWB_XY_DETC_BIG_Y_4 (ISP21_RAWAWB_BASE + 0x027c)
|
||||
#define ISP21_RAWAWB_XY_DETC_NOR_X_5 (ISP21_RAWAWB_BASE + 0x0288)
|
||||
#define ISP21_RAWAWB_XY_DETC_NOR_Y_5 (ISP21_RAWAWB_BASE + 0x028c)
|
||||
#define ISP21_RAWAWB_XY_DETC_BIG_X_5 (ISP21_RAWAWB_BASE + 0x0290)
|
||||
#define ISP21_RAWAWB_XY_DETC_BIG_Y_5 (ISP21_RAWAWB_BASE + 0x0294)
|
||||
#define ISP21_RAWAWB_XY_DETC_NOR_X_6 (ISP21_RAWAWB_BASE + 0x02a0)
|
||||
#define ISP21_RAWAWB_XY_DETC_NOR_Y_6 (ISP21_RAWAWB_BASE + 0x02a4)
|
||||
#define ISP21_RAWAWB_XY_DETC_BIG_X_6 (ISP21_RAWAWB_BASE + 0x02a8)
|
||||
#define ISP21_RAWAWB_XY_DETC_BIG_Y_6 (ISP21_RAWAWB_BASE + 0x02ac)
|
||||
#define ISP21_RAWAWB_MULTIWINDOW_EXC_CTRL (ISP21_RAWAWB_BASE + 0x02b8)
|
||||
#define ISP21_RAWAWB_EXC_WP_REGION0_XU (ISP21_RAWAWB_BASE + 0x02fc)
|
||||
#define ISP21_RAWAWB_EXC_WP_REGION0_YV (ISP21_RAWAWB_BASE + 0x0300)
|
||||
#define ISP21_RAWAWB_EXC_WP_REGION1_XU (ISP21_RAWAWB_BASE + 0x0304)
|
||||
#define ISP21_RAWAWB_EXC_WP_REGION1_YV (ISP21_RAWAWB_BASE + 0x0308)
|
||||
#define ISP21_RAWAWB_EXC_WP_REGION2_XU (ISP21_RAWAWB_BASE + 0x030c)
|
||||
#define ISP21_RAWAWB_EXC_WP_REGION2_YV (ISP21_RAWAWB_BASE + 0x0310)
|
||||
#define ISP21_RAWAWB_EXC_WP_REGION3_XU (ISP21_RAWAWB_BASE + 0x0314)
|
||||
#define ISP21_RAWAWB_EXC_WP_REGION3_YV (ISP21_RAWAWB_BASE + 0x0318)
|
||||
#define ISP21_RAWAWB_EXC_WP_REGION4_XU (ISP21_RAWAWB_BASE + 0x031c)
|
||||
#define ISP21_RAWAWB_EXC_WP_REGION4_YV (ISP21_RAWAWB_BASE + 0x0320)
|
||||
#define ISP21_RAWAWB_EXC_WP_REGION5_XU (ISP21_RAWAWB_BASE + 0x0324)
|
||||
#define ISP21_RAWAWB_EXC_WP_REGION5_YV (ISP21_RAWAWB_BASE + 0x0328)
|
||||
#define ISP21_RAWAWB_EXC_WP_REGION6_XU (ISP21_RAWAWB_BASE + 0x032c)
|
||||
#define ISP21_RAWAWB_EXC_WP_REGION6_YV (ISP21_RAWAWB_BASE + 0x0330)
|
||||
#define ISP21_RAWAWB_SUM_RGAIN_NOR_0 (ISP21_RAWAWB_BASE + 0x0340)
|
||||
#define ISP21_RAWAWB_SUM_BGAIN_NOR_0 (ISP21_RAWAWB_BASE + 0x0348)
|
||||
#define ISP21_RAWAWB_WP_NUM_NOR_0 (ISP21_RAWAWB_BASE + 0x034c)
|
||||
#define ISP21_RAWAWB_SUM_RGAIN_BIG_0 (ISP21_RAWAWB_BASE + 0x0350)
|
||||
#define ISP21_RAWAWB_SUM_BGAIN_BIG_0 (ISP21_RAWAWB_BASE + 0x0358)
|
||||
#define ISP21_RAWAWB_WP_NUM_BIG_0 (ISP21_RAWAWB_BASE + 0x035c)
|
||||
#define ISP21_RAWAWB_SUM_RGAIN_NOR_1 (ISP21_RAWAWB_BASE + 0x0370)
|
||||
#define ISP21_RAWAWB_SUM_BGAIN_NOR_1 (ISP21_RAWAWB_BASE + 0x0378)
|
||||
#define ISP21_RAWAWB_WP_NUM_NOR_1 (ISP21_RAWAWB_BASE + 0x037c)
|
||||
#define ISP21_RAWAWB_SUM_RGAIN_BIG_1 (ISP21_RAWAWB_BASE + 0x0380)
|
||||
#define ISP21_RAWAWB_SUM_BGAIN_BIG_1 (ISP21_RAWAWB_BASE + 0x0388)
|
||||
#define ISP21_RAWAWB_WP_NUM_BIG_1 (ISP21_RAWAWB_BASE + 0x038c)
|
||||
#define ISP21_RAWAWB_SUM_RGAIN_NOR_2 (ISP21_RAWAWB_BASE + 0x03a0)
|
||||
#define ISP21_RAWAWB_SUM_BGAIN_NOR_2 (ISP21_RAWAWB_BASE + 0x03a8)
|
||||
#define ISP21_RAWAWB_WP_NUM_NOR_2 (ISP21_RAWAWB_BASE + 0x03ac)
|
||||
#define ISP21_RAWAWB_SUM_RGAIN_BIG_2 (ISP21_RAWAWB_BASE + 0x03b0)
|
||||
#define ISP21_RAWAWB_SUM_BGAIN_BIG_2 (ISP21_RAWAWB_BASE + 0x03b8)
|
||||
#define ISP21_RAWAWB_WP_NUM_BIG_2 (ISP21_RAWAWB_BASE + 0x03bc)
|
||||
#define ISP21_RAWAWB_SUM_RGAIN_NOR_3 (ISP21_RAWAWB_BASE + 0x03d0)
|
||||
#define ISP21_RAWAWB_SUM_BGAIN_NOR_3 (ISP21_RAWAWB_BASE + 0x03d8)
|
||||
#define ISP21_RAWAWB_WP_NUM_NOR_3 (ISP21_RAWAWB_BASE + 0x03dc)
|
||||
#define ISP21_RAWAWB_SUM_RGAIN_BIG_3 (ISP21_RAWAWB_BASE + 0x03e0)
|
||||
#define ISP21_RAWAWB_SUM_BGAIN_BIG_3 (ISP21_RAWAWB_BASE + 0x03e8)
|
||||
#define ISP21_RAWAWB_WP_NUM_BIG_3 (ISP21_RAWAWB_BASE + 0x03ec)
|
||||
#define ISP21_RAWAWB_SUM_RGAIN_NOR_4 (ISP21_RAWAWB_BASE + 0x0400)
|
||||
#define ISP21_RAWAWB_SUM_BGAIN_NOR_4 (ISP21_RAWAWB_BASE + 0x0408)
|
||||
#define ISP21_RAWAWB_WP_NUM_NOR_4 (ISP21_RAWAWB_BASE + 0x040c)
|
||||
#define ISP21_RAWAWB_SUM_RGAIN_BIG_4 (ISP21_RAWAWB_BASE + 0x0410)
|
||||
#define ISP21_RAWAWB_SUM_BGAIN_BIG_4 (ISP21_RAWAWB_BASE + 0x0418)
|
||||
#define ISP21_RAWAWB_WP_NUM_BIG_4 (ISP21_RAWAWB_BASE + 0x041c)
|
||||
#define ISP21_RAWAWB_SUM_RGAIN_NOR_5 (ISP21_RAWAWB_BASE + 0x0430)
|
||||
#define ISP21_RAWAWB_SUM_BGAIN_NOR_5 (ISP21_RAWAWB_BASE + 0x0438)
|
||||
#define ISP21_RAWAWB_WP_NUM_NOR_5 (ISP21_RAWAWB_BASE + 0x043c)
|
||||
#define ISP21_RAWAWB_SUM_RGAIN_BIG_5 (ISP21_RAWAWB_BASE + 0x0440)
|
||||
#define ISP21_RAWAWB_SUM_BGAIN_BIG_5 (ISP21_RAWAWB_BASE + 0x0448)
|
||||
#define ISP21_RAWAWB_WP_NUM_BIG_5 (ISP21_RAWAWB_BASE + 0x044c)
|
||||
#define ISP21_RAWAWB_SUM_RGAIN_NOR_6 (ISP21_RAWAWB_BASE + 0x0460)
|
||||
#define ISP21_RAWAWB_SUM_BGAIN_NOR_6 (ISP21_RAWAWB_BASE + 0x0468)
|
||||
#define ISP21_RAWAWB_WP_NUM_NOR_6 (ISP21_RAWAWB_BASE + 0x046c)
|
||||
#define ISP21_RAWAWB_SUM_RGAIN_BIG_6 (ISP21_RAWAWB_BASE + 0x0470)
|
||||
#define ISP21_RAWAWB_SUM_BGAIN_BIG_6 (ISP21_RAWAWB_BASE + 0x0478)
|
||||
#define ISP21_RAWAWB_WP_NUM_BIG_6 (ISP21_RAWAWB_BASE + 0x047c)
|
||||
#define ISP21_RAWAWB_Y_HIST01 (ISP21_RAWAWB_BASE + 0x0620)
|
||||
#define ISP21_RAWAWB_Y_HIST23 (ISP21_RAWAWB_BASE + 0x0624)
|
||||
#define ISP21_RAWAWB_Y_HIST45 (ISP21_RAWAWB_BASE + 0x0628)
|
||||
#define ISP21_RAWAWB_Y_HIST67 (ISP21_RAWAWB_BASE + 0x062c)
|
||||
#define ISP21_RAWAWB_RAM_CTRL (ISP21_RAWAWB_BASE + 0x0650)
|
||||
#define ISP21_RAWAWB_WRAM_CTRL (ISP21_RAWAWB_BASE + 0x0654)
|
||||
#define ISP21_RAWAWB_WRAM_DATA_BASE (ISP21_RAWAWB_BASE + 0x0660)
|
||||
#define ISP21_RAWAWB_RAM_DATA_BASE (ISP21_RAWAWB_BASE + 0x0700)
|
||||
|
||||
|
||||
/* VI_ISP_EN */
|
||||
#define VI_CCL_EN BIT(0)
|
||||
#define VI_ISP_EN_SEL BIT(1)
|
||||
@@ -1784,6 +2233,13 @@
|
||||
#define NOC_HURRY_W_MODE(a) (((a) & 0x7) << 21)
|
||||
#define NOC_HURRY_R_MODE(a) (((a) & 0x7) << 18)
|
||||
|
||||
/* ISP CTRL1 */
|
||||
#define ISP2X_SYS_YNR_FST BIT(23)
|
||||
#define ISP2X_SYS_ADRC_FST BIT(24)
|
||||
#define ISP2X_SYS_DHAZ_FST BIT(25)
|
||||
#define ISP2X_SYS_CNR_FST BIT(26)
|
||||
#define ISP2X_SYS_BAY3D_FST BIT(27)
|
||||
|
||||
/* isp interrupt */
|
||||
#define ISP2X_OFF BIT(0)
|
||||
#define ISP2X_FRAME BIT(1)
|
||||
@@ -1856,6 +2312,8 @@
|
||||
#define MI_MPFBC_FRAME BIT(31)
|
||||
|
||||
/* MI_CTRL2 */
|
||||
#define SW_BAY3D_FORCEUPD BIT(22)
|
||||
#define SW_BAY3D_WR_AUTOUPD BIT(16)
|
||||
#define SW_GAIN_WR_AUTOUPD BIT(13)
|
||||
#define SW_GAIN_WR_PINGPONG BIT(12)
|
||||
#define SW_DBR_WR_AUTOUPD BIT(10)
|
||||
@@ -1866,6 +2324,9 @@
|
||||
#define SW_RAW1_WR_AUTOUPD BIT(1)
|
||||
#define SW_RAW0_WR_AUTOUPD BIT(0)
|
||||
|
||||
/* MI_RD_CTRL2 */
|
||||
#define BAY3D_RW_ONEADDR_EN BIT(4)
|
||||
|
||||
/* MPFBC */
|
||||
#define SW_MPFBC_EN BIT(0)
|
||||
#define SW_MPFBC_MAINISP_MODE BIT(3)
|
||||
@@ -1976,6 +2437,7 @@
|
||||
#define ISP_BLS_MODE_FIXED 0
|
||||
#define ISP_BLS_WINDOW_1 (1 << 2)
|
||||
#define ISP_BLS_WINDOW_2 (2 << 2)
|
||||
#define ISP_BLS_BLS1_EN BIT(4)
|
||||
|
||||
/* GIC */
|
||||
/* ISP_GIC_CTRL */
|
||||
@@ -1997,6 +2459,10 @@
|
||||
/* ISP_HDRTMO_CTRL */
|
||||
#define ISP_HDRTMO_EN BIT(0)
|
||||
|
||||
/* HDRDRC */
|
||||
/* ISP21_DRC_CTRL0 */
|
||||
#define ISP_DRC_EN BIT(0)
|
||||
|
||||
/* HDRMGE */
|
||||
/* ISP_HDRMGE_CTRL */
|
||||
#define ISP_HDRMGE_EN BIT(0)
|
||||
@@ -2029,6 +2495,12 @@
|
||||
#define ISP_ISP_LSC_TABLE_DATA(v0, v1) \
|
||||
(((v0) & 0x1FFF) | (((v1) & 0x1FFF) << 16))
|
||||
|
||||
#define ISP21_YNR_EN BIT(0)
|
||||
#define ISP21_CNR_EN BIT(0)
|
||||
#define ISP21_SHARP_EN BIT(0)
|
||||
#define ISP21_BAYNR_EN BIT(0)
|
||||
#define ISP21_BAY3D_EN BIT(0)
|
||||
|
||||
/* ISP21 ISP CTRL0 */
|
||||
#define ISP21_CGC_RATIO_EN BIT(29)
|
||||
#define ISP21_CGC_YUV_LIMIT BIT(28)
|
||||
|
||||
@@ -42,7 +42,7 @@
|
||||
#include <linux/kfifo.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/rk-preisp.h>
|
||||
#include <linux/rkisp2-config.h>
|
||||
#include <linux/rkisp21-config.h>
|
||||
#include <linux/iommu.h>
|
||||
#include <media/v4l2-event.h>
|
||||
#include <media/media-entity.h>
|
||||
|
||||
@@ -4,7 +4,7 @@
|
||||
#ifndef _RKISP_VERSION_H
|
||||
#define _RKISP_VERSION_H
|
||||
#include <linux/version.h>
|
||||
#include <linux/rkisp2-config.h>
|
||||
#include <linux/rkisp21-config.h>
|
||||
|
||||
/*
|
||||
* RKISP DRIVER VERSION NOTE
|
||||
|
||||
@@ -9,7 +9,7 @@
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/v4l2-controls.h>
|
||||
#include "rkisp2-config.h"
|
||||
#include "rkisp21-config.h"
|
||||
|
||||
#define CIFISP_MODULE_DPCC (1 << 0)
|
||||
#define CIFISP_MODULE_BLS (1 << 1)
|
||||
|
||||
Reference in New Issue
Block a user