We're making all reset line users specify whether their lines are
shared with other IP or they operate them exclusively. In this case
the line is exclusively used only by this IP, so use the *_exclusive()
API accordingly.
Change-Id: I94d96af42ac63cd0c6445930f0458d36ec92f0e4
Acked-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
(cherry picked from commit 5baaf3b9ef)
On the STiH410 B2120 development board the MiPHY28lp shares its reset
line with the Synopsys DWC3 SuperSpeed (SS) USB 3.0 Dual-Role-Device
(DRD). New functionality in the reset subsystems forces consumers to
be explicit when requesting shared/exclusive reset lines.
Change-Id: Id9ff5e3beadada3aeb5dc8a6085d9bd86255f45c
Acked-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
(cherry picked from commit 002f17bc54)
It had changed to be suspend event for BIT6 in DEVT register from
version 2.30a and above. Thus this patch introduces one suspend
event handler to handle the suspend event.
Change-Id: I62751ee39a2ff13c1359350a8f6c43c14aa4ea12
Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
(cherry picked from commit 72704f876f)
Implementations might use different IRQs for
host, gadget so use named interrupt resources
to allow device tree to specify the interrupts.
Following are the interrupt names
Peripheral Interrupt - peripheral
HOST Interrupt - host
Maintain backward compatibility for a single named
interrupt ("dwc3_usb3") for all interrupts as well as
unnamed interrupt at index 0 for all interrupts.
As platform_get_irq() variants are used, tackle
the -EPROBE_DEFER case as well.
Change-Id: Idb47d85ceee3353a219e4a9793942c7e92a6a6eb
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
(cherry picked from commit 9522def400)
Conflicts:
drivers/usb/dwc3/core.c
It will be crash to stop gadget when the dwc3 device had been into suspend
state, thus we need to check if the dwc3 device had been into suspend state
when UDC try to stop gadget.
Change-Id: I1a49d4c52131ef4b4357d4a12b5da55e8127d750
Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
(cherry picked from commit da1410be21)
Because of recent changes to transfer handling on
DWC3, we will not get XferComplete unless we
completely fill up our TRB ring. This means that we
might get a Reset or Disconnect without getting a
XferComplete first.
In order to correctly release our allocated Transfer
Resource, we must issue ENDTRANSFER command whenever
dep->resource_index is valid.
Change-Id: I6f78a239e26d754c2472f06789f820d42261d31d
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
(cherry picked from commit 0e146028ee)
If there is a failure after pm_runtime_enable/get_sync()
we need to call pm_runtime_disable/put_sync().
Otherwise it will lead to an unbalanced pm_runtime_enable() on the
subsequent probe if the earlier probe bailed out due to -EPROBE_DEFER.
pm_runtime_get_sync() can fail as well so deal with that case too.
Change-Id: Ia8af31867e996eeee4b0a18e34303280b661a86c
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
(cherry picked from commit 328082376a)
it's clear now that when is_on=true, we must loop
until DWC3_DSTS_DEVCTRLHLT clears; while when
is_on=false we must loop until DWC3_DSTS_DEVCTRLHLT
gets set.
Instead of adding actual if() statements, we can
rely on XOR operation to evaluate to true only when
the above conditions apply. Then, we can move the
break condition back to the while() statement
together with our timeout check and the resulting
code is very compact and simpler to read.
Change-Id: Id540c7422cd1d7e00120c26353d99e2e9888ea26
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
(cherry picked from commit b6d4e16e83)
instead of looping forever and forcing a return if
timeout reaches zero, we can just use timeout and
loop's break condition directly.
Change-Id: Ibfbe125651d117cab717c5b0b73ef534ced79a67
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
(cherry picked from commit f2df679b6c)
testing shows that udelay() is unnecessary as
controller reaches Halted state almost
instantenously as can be seen by our timeout
variable never actually decrementing.
Change-Id: I39aa43a4d26c4e5bf7c2c49569bb5ab0c662e718
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
(cherry picked from commit d807bdd028)
We shouldn't change a host-only dwc3 to gadget-only
if driver is built as gadget-only. Fix that up here.
Change-Id: I7ff835a565e1d4d06e142f3fa9990ce96e85556e
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
(cherry picked from commit 5f82279a0c)
It's know that Intel's SoCs' dwc3 integration is
peripheral-only since Intel implements its own
portmux for role-swapping. In order to prevent dwc3
from ever registering and XHCI platform_device,
let's just set dr-mode to peripheral-only on Intel
SoCs.
Change-Id: Ic7a57ae89a4ea2a2f04a1aff581d728add15a034
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
(cherry picked from commit e6fe66fe08)
'modify' is what the current action is called. Let's
rename it so it matches databook. While at that,
also make sure to add support 'init' action too.
Change-Id: I9fb3b445a7f8dd6acb369407eddf6d7d0994543d
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
(cherry picked from commit 21e64bf20d)
If we don't, we will overwrite valid TRBs.
Change-Id: I8076fa857b9ae016617d58836de3d9dcf5be9e4c
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
(cherry picked from commit d6dc2e76a8)
Now we can try to issue Update Transfer every time
gadget driver queues a new request. This will make
sure we keep controller's queue busy for as long as
possible.
Change-Id: Id0418f2b4930e442d3bae7be87270100c0b347f5
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
(cherry picked from commit ba62c09d5c)
We don't need this IRQ anymore for interrupt or bulk
endpoints.
Change-Id: I223ef88f807d7265a00d8d7be480320722d7ef88
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
(cherry picked from commit 13fa2e69b1)
Let's only set LST bit when we run out of space in
our TRB ring. For all other cases, we keep LST bit
unset which will prevent constant allocation and
deallocation of endpoint transfer resources.
Change-Id: Ia846ea0e3540c151d04488f239eb0f847c85b1fd
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
(cherry picked from commit 55a0237f8f)
Instead of relying on empty list of queued requests,
let's rely on the fact that we have a TRB being
processed right now.
Change-Id: I06075d3aaf695f74946ebd269746a240be7e51c0
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
(cherry picked from commit 69450c4dc1)
We will be using this information to change how we
figure out when we need LST bit. For now, just
update our counters.
Change-Id: I3c2019ef6649d47b89dbf1c16ef2eed6012442c6
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
(cherry picked from commit 68d34c8a74)
According to SNPS databook, we need to pass transfer
resource on update transfer command, let's do it.
Change-Id: I972007913ca2511f76e565a624721300c9fb754e
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
(cherry picked from commit b6b1c6db4c)
when passing strings to trace, we don't need the
trailing newline character. Trace already appends a
newline character automatically.
Change-Id: Ibd8d34a72cf03a41c57768e4c72a02fccf338a4d
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
(cherry picked from commit 60cfb37ac9)
Conflicts:
drivers/usb/dwc3/gadget.c
Don't make any decisions regarding VBUS session based on ID
status. That is best left to the OTG core.
Pass ID and VBUS events independent of each other so that OTG
core knows exactly what to do.
This makes dual-role with extcon work with OTG irq on OMAP platforms.
Change-Id: I141c03d4127b69530e77cfef3cee5f5b95f6df26
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
(cherry picked from commit d2728fb3e0)
TRM [1] recommends that POWERPRESENT bit must not be
set and left at it's default value of 0.
[1] OMAP542x TRM - http://www.ti.com/lit/pdf/swpu249
Section 23.11.4.5.1 Mailbox VBUS/ID Management
"Because PIPE powerpresent has a different meaning in host and in device mode,
and because of the redundancy with the UTMI signals, the controller ORes
together the appropriate PIPE and UTMI inputs to create its internal
VBUS status. For that reason, it is recommended to leave field
USBOTGSS_UTMI_OTG_STATUS[9] POWERPRESENT at its default value (=0), and only to
fill in the USB2 VBUS status fields in the same register."
Change-Id: Ieaf8450992e8f8ebba75558937610f428fd46bd5
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
(cherry picked from commit 9ab330bf4d)
On OMAPs, OTG events come on the same IRQ so we need to share
this IRQ with the OTG device driver.
Change-Id: I04ad8896bdf7c698ea462cac547bc9fd9f5be423
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
(cherry picked from commit 12da8eae20)
We intend to share this interrupt with the OTG driver an to ensure
that irqflags match for the shared interrupt handlers we use
request_threaded_irq()
If we don't use request_treaded_irq() then forced threaded irq will
set IRQF_ONESHOT and this won't match with the OTG IRQ handler's
IRQ flags.
NOTE: OTG IRQ handler is yet to be added. This is a preparatory step.
Change-Id: I5b9fee6e7b2b63221abba43878961079c20ffd6f
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
(cherry picked from commit 3f586c92d8)
The DWC3_USB31_REVISION_110A macro uses an invalid constant name in its
definition. This is currently not used.
Change-Id: I8e37e8848b423de1a06bdeef7190ba4fb54cb21c
Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
(cherry picked from commit e77c561432)
Correct the use of the DWC3_DSTS_XXX_SPEED and DWC3_DCFG_XXX_SPEED
macros. The wrong set of macros were being used in a few places.
This is only a cosmetic change as the values for both sets are
identical.
Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
(cherry picked from commit 2da9ad761e)
Conflicts:
drivers/usb/dwc3/gadget.c
Change-Id: I39aed8e30e6f150c2e4d5350caac7b3936ba784d
From sparse:
warning: cast truncates bits from constant value (100 becomes 0)
The DWC3_TRB_NUM constant is too big for u8. Do the calculation a
slightly different way that should still be optimized out for the case
where DWC3_TRB_NUM == 256.
Change-Id: If6f9d66a7545230b0d0f21ab05dacd0f572f10b6
Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
(cherry picked from commit 3de2685f0c)
If the trb->enqueue == trb->dequeue, then it could be full or empty.
This could also happen at TRB index 0, so modify the check to handle
that condition. At index 0, the previous TRB is the one just before the
link TRB.
Change-Id: I17d5fd4e7592507dac08bef6c458ff14d7426461
Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
(cherry picked from commit 361572b5f7)
The TRBs left calculation didn't account for the link TRB taking up one
spot.
If the trb_dequeue < trb_enqueue, then the result includes the link
TRB slot so it must be adjusted.
Change-Id: If03f89ea1f523b4bce1b5f096ae81aebc891c63f
Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
(cherry picked from commit 7d0a038b13)
The current calculation takes dep->trb_dequeue - dep->trb_enqueue to
find the TRB space left.
If you enqueue 1, that results in:
(u8) 0 - (u8) 1 = 0xff = 255 TRBs left.
This is correct if DWC3_TRB_NUM == 256.
If DWC3_TRB_NUM is less than 256 (but still a power of 2) you need to
mod the result by DWC3_TRB_NUM.
For example the same calculation with DWC3_TRB_NUM = 8, results in:
255 % 6 = 7 TRBs left.
Change-Id: I2b41bf750e767fc7062a72da054d581c56d42f5a
Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
(cherry picked from commit 32db3d9437)
If trbs_left == 0, we don't have any space left in the TRB ring so don't
prepare anything.
Change-Id: I1dc6c665b778a7988fca9cd890884ad27dc830ef
Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
(cherry picked from commit 89bc856e5a)
Clears out all the TRBs in the ring to clean up any stale data that
might be in them from the previous time the endpoint was enabled.
Also removed the existing clear of the LINK trb since the entire ring is
cleard just before.
Change-Id: I311d0931dc9daa6b6f6e39d252e54c37c516c190
Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
(cherry picked from commit 0d25744ad1)
Make the skipping of the link TRBS built-in to the increment operation.
This simplifies the code wherever we increment the trb index and ensures
that we never end up pointing to a link trb.
Change-Id: I72063fcf672a07c3ac5132c488e75df1a6d91e94
Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
(cherry picked from commit dca0119c3a)
Sparse complains even though it looks ok. Probably it cannot detect that
the wValue, wIndex, and wLength are declared __le16 due to the macro
magic.
Redeclare them as CPU endianness and make the conversion on assignment.
Change-Id: I9682aa96ba8e1115c02f5df54d51fccdcb0ed4e1
Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
(cherry picked from commit 96bedb637a)
Cleans up the sparse warning:
warning: dubious: x | !y
Since we do want a bitwise OR here, don't use a logical (true/false)
value. Probably is not a real issue but it cleans up the warning.
Change-Id: I741c66da3f31a26402334bf5edfd9f969580b64b
Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
(cherry picked from commit d07fa665c7)
u2sel and u2pel should be __le16. Doesn't fix any issue.
Found with sparse.
Change-Id: Ibe09f6e4c938246afa664bb511c8b912216f2671
Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
(cherry picked from commit 501058edeb)
The wIndex passed in here is CPU endianness, but the function expects
little endian.
Found with sparse.
Change-Id: Ib33f0b9b4e8c3320eb590496460e2cc7274b6a0e
Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
(cherry picked from commit 958b9fa7f8)
Just like we did for endpoint commands, let's have a
single trace output for the command and its
status. This will improve trace readability
Change-Id: I2d092268347a92d1b6987c4283580a63ed4cfda9
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
(cherry picked from commit 71f7e70270)
We want commands to finish ASAP, so let's remove
that udelay() call.
Change-Id: I521945dc6242cfe1a8cf730ab2f7d9010a1e65a9
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
(cherry picked from commit 88811f7b72)
Just like we did for endpoint commands, let's use a
single return point for generic commands as
well. This aids readability.
Change-Id: Idc1bf9bc4fe2e50cb0841e9a8483c24346b4974d
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
(cherry picked from commit 0fe886cdb0)
Instead of printing command's status with a separate
trace printout, let's print it within a single call.
Change-Id: I6ea888e0b8c7afee70b90f748a9d20c469da8c04
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
(cherry picked from commit 0933df159c)
instead of having infinite loop and always checking
timeout value as a break condition, we can just
decrement timeout inside while's condition.
Change-Id: I665d39e7205463f5f4439f3a6d4fdfc6e3ed67b2
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
(cherry picked from commit f6bb225bb3)
We don't need the extra %s when command fails.
Let's remove it
Change-Id: I4cbad651f7b386ceb24f077a4c3f2036cd619ee9
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
(cherry picked from commit ba1598410e)
This will make it more human-friendly to read trace
output from dwc3.
Change-Id: I484b309a164c069fa06c45330ece4bded3150e65
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
(cherry picked from commit f75cacc468)
I really thought this would be useful, but as it
turns out, it creates more problems than fixes. The
amount of times we had to fix this because some
other commit shuffled things around and ended up
regressing this tiny little string manupulation...
Might as well remove it, since it has a negligible
added benefit.
Change-Id: I6b64399df59313f6572df7dfd93c35e2894377b5
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
(cherry picked from commit 7ab373aadb)
Improve trb tracing by showing trb flags, interrupts
trb type.
trb flags:
- h - hardware owner of descriptor
- l - last TRB
- c - chain buffers
- s - continue on short packet
interrupt flags:
- s - interrupt on short packet
- c - interrupt on complete
Capital letter means that bit is set, while
lowercase letter means bit is cleared.
Change-Id: I1f709f56a2fcc707858805289cb66fbace718abb
Signed-off-by: Janusz Dziedzic <januszx.dziedzic@linux.intel.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
(cherry picked from commit 22f2c619a1)
