Add and export dma_buf_get_each function which helps in
traversing the db_list, this will be used by the minidump
module to get dmabuf info.
Bug: 267250898
Change-Id: Ie24788fcf9cf0a49316cb871dcb9191e8084ccde
Signed-off-by: Vijayanand Jitta <vjitta@codeaurora.org>
(cherry picked from commit 602e4e28d8)
[Yunfei: Change namespace get_each_dmabuf to dma_buf_get_each]
Signed-off-by: Yunfei Wang <yf.wang@mediatek.com>
Signed-off-by: Jaskaran Singh <quic_jasksing@quicinc.com>
Signed-off-by: Simon Xue <xxm@rock-chips.com>
drivers/gpu/drm/bridge/maxim-max96745.c:168:16: error: implicit declaration of function 'drm_add_modes_noedid'
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I6213205f51f125659da40fa8d04a3a9bb39c9d0c
rv1126 does not support display interface which need to
read and parse edid, such as hdmi and dp, so add config
option to reduce memory usage.
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I0c3813711cfdb4a38ec66136569ca826c94c6c58
Fix the typec_switch and typec_mux object to align with
Commit 713fd49b43 ("usb: typec: mux: Introduce indirection").
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Change-Id: Ibb526c3d65a495426abf8c911f92df065b545132
Adds the proper MODULE_IMPORT_NS(DMA_BUF) line to the file to get it to
build properly.
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: Ia79a478a46cefbbd69b27d54ae0605f1ca844b0b
Increase drm property count from 24 to 64 to make
room for custom properties of drm plane and drm
crtc objects.
Signed-off-by: Shashank Babu Chinta Venkata <sbchin@codeaurora.org>
Bug: 139653858
Change-Id: I3e42c1fc684d7d7cea828fc35b96673bdef598f4
(cherry picked from commit 89301363b2https://android.googlesource.com/kernel/common)
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
drivers/pci/controller/dwc/pcie-dw-rockchip-acpi.c: In function 'rk_pcie_writel_ob_unroll':
drivers/pci/controller/dwc/pcie-dw-rockchip-acpi.c:32:22: error: implicit declaration of
function 'PCIE_GET_ATU_OUTB_UNR_REG_OFFSET' [-Werror=implicit-function-declaration]
32 | u32 offset = PCIE_GET_ATU_OUTB_UNR_REG_OFFSET(index);
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: I64b960ef3e8a9ad375b75048fb1406c1ac161e74
Some boards need more than the default maximum of 4 uarts. This has no
impact unless 8250.nr_uarts is specified on the cmdline to increase
the number of runtime uarts from the GKI default of 0.
Bug: 280015873
Signed-off-by: Alistair Delva <adelva@google.com>
Change-Id: I5ba4e1dcce4f4e01b7d306fa3ab05319768eef00
Current 500ms min window size for psi triggers limits polling interval
to 50ms to prevent polling threads from using too much cpu bandwidth by
polling too frequently. However the number of cgroups with triggers is
unlimited, so this protection can be defeated by creating multiple
cgroups with psi triggers (triggers in each cgroup are served by a single
"psimon" kernel thread).
Instead of limiting min polling period, which also limits the latency of
psi events, it's better to limit psi trigger creation to authorized users
only, like we do for system-wide psi triggers (/proc/pressure/* files can
be written only by processes with CAP_SYS_RESOURCE capability). This also
makes access rules for cgroup psi files consistent with system-wide ones.
Add a CAP_SYS_RESOURCE capability check for cgroup psi file writers and
remove the psi window min size limitation.
Bug: 269247660
Change-Id: I8876aa306cf2ba5acdf4daa5a5eff0665537bfeb
Suggested-by: Sudarshan Rajagopalan <quic_sudaraja@quicinc.com>
Link: https://lore.kernel.org/all/20230303011346.3342233-1-surenb@google.com/
Signed-off-by: Suren Baghdasaryan <surenb@google.com>
Acked-by: Michal Hocko <mhocko@suse.com>
Acked-by: Johannes Weiner <hannes@cmpxchg.org>
Signed-off-by: Sudarshan Rajagopalan <quic_sudaraja@quicinc.com>
Signed-off-by: Georgi Djakov <quic_c_gdjako@quicinc.com>
locks for each hlist in hash_table.
Hash_table in uid_sys_stat is protected by a global lock named id_lock,
which causes some lock competition issue. Actually, uid_lock can be split to
several file-grained locks for each hlist in hash_table, which avoid
the unnecessary lock competition when get different-uid process info.
Bug: 278138377
Signed-off-by: Peifeng Li <lipeifeng@oppo.com>
Change-Id: I04c564ce42b62d8cfb9ed29e99f310ba76244763
process_notifier() is called every time a process exits. When multiple
processes exit roughly at the same time, the uid_lock taken from inside
of process_notifier() will create contention which slows down process
exit. Defer stats accounting in such case to avoid lock contention.
Bug: 261537194
Change-Id: Ia1e9a451eab39eb0dda7eb175bfd71c67f3e0a58
Signed-off-by: Suren Baghdasaryan <surenb@google.com>
Add dma_resv_iter_first and dma_resv_iter_next to
abi_gki_aarch64_qcom. These symbols were already added to the KMI as a
part of commit b38e72d30c ("ANDROID: Add initial symbols list for
db845c").
Bug: 199236943
Change-Id: Ib5222cf342c3e119e424c3c13c062c9d867c7884
Signed-off-by: Chris Goldsworthy <quic_cgoldswo@quicinc.com>
IOMMU_SYS_CACHE_NWA allows buffers for non-coherent devices to be
mapped with the correct memory attributes so that the buffers can be
cached in the system cache, with a no write allocate cache policy.
However, this property is only usable by drivers that invoke the IOMMU
API directly; it is not usable by drivers that use the DMA API.
Thus, introduce DMA_ATTR_SYS_CACHE_NWA, so that drivers for
non-coherent devices that use the DMA API can use it to specify if
they want a buffer to be cached in the system cache.
Bug: 189339242
Change-Id: Ic812a1fb144a58deb4279c2bf121fc6cc4c3b208
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
Signed-off-by: Georgi Djakov <quic_c_gdjako@quicinc.com>
IOMMU_SYS_CACHE allows buffers for non-coherent devices to be mapped
with the correct memory attributes so that the buffers can be cached
in the system cache. However, this property is only usable by drivers
that invoke the IOMMU API directly; it is not usable by drivers that
use the DMA API.
Thus, introduce DMA_ATTR_SYS_CACHE, so that drivers for non-coherent
devices that use the DMA API can use it to specify if they want a
buffer to be cached in the system cache.
Bug: 189339242
Change-Id: I849d7a3f36b689afd2f6ee400507223fd6395158
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
Signed-off-by: Georgi Djakov <quic_c_gdjako@quicinc.com>
Add IOMMU_SYS_CACHE and IOMMU_SYS_CACHE_NWA for device mappings.
IOMMU_SYS_CACHE, used by itself, allows device accesses to be cached
in the system cache (if present). IOMMU_SYS_CACHE_NWA, used by itself,
allows device accesses to be cached in the system cache with a
no-write allocate policy.
On systems in which devices can also snoop the CPU caches (i.e.
IO-coherency is present), IOMMU_SYS_CACHE_NWA and IOMMU_SYS_CACHE can
be combined with IOMMU_CACHE (with IOMMU_SYS_CACHE + IOMMU_CACHE being
a no-op).
Bug: 189339242
Change-Id: Ic91616a148f39fead008a5b87a54ffd781fee734
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
Signed-off-by: Georgi Djakov <quic_c_gdjako@quicinc.com>
Signed-off-by: Chris Goldsworthy <quic_cgoldswo@quicinc.com>
Non-coherent devices on systems that support a system or
last level cache may want to request that allocations be
cached in the system cache. For memory that is allocated
by the kernel, and used for DMA with devices, the memory
attributes used for CPU access should match the memory
attributes that will be used for device access.
The memory attributes that need to be programmed into
the MAIR for system cache usage are:
0xf4 - Normal memory, outer write back read/write allocate,
inner non-cacheable.
There is currently no support for this memory attribute for
CPU mappings, so add it.
Bug: 189339242
Change-Id: I3abc7becd408f20ac5499cbbe3c6c6f53f784107
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
Signed-off-by: Georgi Djakov <quic_c_gdjako@quicinc.com>
Currently, the frequency is calculated by max freq * 1.25 * util / max cap.
Add a vendor hook to adjust the frequency when the calculation
overestimate.
android_vh_map_util_freq
adjust util to freq calculation
Bug: 177845439
Signed-off-by: Yun Hsiang <yun.hsiang@mediatek.com>
Change-Id: I9aa9079f00af7d3380b19f2fe21b75cddd107d15
(cherry picked from commit 3122e3ec9672036384304fdeaa1b1815f60ba817)
(cherry picked from commit a2d89d4f3a)
Consider the following sequence of events:
1) A page in a PROT_READ|PROT_WRITE VMA is faulted.
2) Page migration allocates a page with the KASAN allocator,
causing it to receive a non-match-all tag, and uses it
to replace the page faulted in 1.
3) The program uses mprotect() to enable PROT_MTE on the page faulted in 1.
As a result of step 3, we are left with a non-match-all tag for a page
with tags accessible to userspace, which can lead to the same kind of
tag check faults that commit e74a684680 ("arm64: Reset KASAN tag in
copy_highpage with HW tags only") intended to fix.
The general invariant that we have for pages in a VMA with VM_MTE_ALLOWED
is that they cannot have a non-match-all tag. As a result of step 2, the
invariant is broken. This means that the fix in the referenced commit
was incomplete and we also need to reset the tag for pages without
PG_mte_tagged.
Fixes: e5b8d92189 ("arm64: mte: reset the page tag in page->flags")
Cc: <stable@vger.kernel.org> # 5.15
Link: https://linux-review.googlesource.com/id/I7409cdd41acbcb215c2a7417c1e50d37b875beff
Link: https://lore.kernel.org/all/20230420210945.2313627-1-pcc@google.com/
Signed-off-by: Peter Collingbourne <pcc@google.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Bug: 263910115
Change-Id: I7409cdd41acbcb215c2a7417c1e50d37b875beff
[pcc: fixed merge conflict]
The mte_sync_page_tags() function sets PG_mte_tagged if it initializes
page tags. Then we return to mte_sync_tags(), which sets PG_mte_tagged
again. At best, this is redundant. However, it is possible for
mte_sync_page_tags() to return without having initialized tags for the
page, i.e. in the case where check_swap is true (non-compound page),
is_swap_pte(old_pte) is false and pte_is_tagged is false. So at worst,
we set PG_mte_tagged on a page with uninitialized tags. This can happen
if, for example, page migration causes a PTE for an untagged page to
be replaced. If the userspace program subsequently uses mprotect() to
enable PROT_MTE for that page, the uninitialized tags will be exposed
to userspace.
Fix it by removing the redundant call to set_page_mte_tagged().
Fixes: e059853d14 ("arm64: mte: Fix/clarify the PG_mte_tagged semantics")
Signed-off-by: Peter Collingbourne <pcc@google.com>
Cc: <stable@vger.kernel.org> # 6.1
Link: https://linux-review.googlesource.com/id/Ib02d004d435b2ed87603b858ef7480f7b1463052
Link: https://lore.kernel.org/all/20230420214327.2357985-1-pcc@google.com/
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Bug: 263910115
Change-Id: Ib02d004d435b2ed87603b858ef7480f7b1463052
Since these are unmapped from EL1, kmemleak will crash if it accesses
them.
Bug: 275004094
Signed-off-by: Keir Fraser <keirf@google.com>
Change-Id: Ieb15033c2dc21e6437a3a3c91a8b36e8dda31e98
Since host stage-2 mappings are created lazily, we cannot rely on the
pte in order to recover the target physical address when checking a
host-initiated memory transition.
Instead, move the addr_is_allowed_memory() check into the host callback
function where it is passed the physical address directly from the
walker.
Bug: 279739439
Signed-off-by: Will Deacon <willdeacon@google.com>
Change-Id: I84bdc43eded79f1f5e5a489dbc0874604491e5c8
