enqueue_task() may call cpufreq_task_boost() before governor is initial,
so enable_sem and speedchange_task is not initial, then do not boost.
Fixes: 2d367d61e8 (cpufreq: interactive: introduce boost cpufreq interface for task)
Change-Id: I68ec027299fa46e7749efd43b44af6e476753ac5
Signed-off-by: Liang Chen <cl@rock-chips.com>
this patch add V4L2_CID_HFLIP and V4L2_CID_VFLIP support
and fixed error in setting HDRAE_EXP
Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
Change-Id: If92dfa4b09aff13ddf0be8498898ad8bc6a45950
We found a situation where state->visible is true but
the plane is disabled, and state->fb is null.
According to the documentation of struct drm_plane_state,
the member crtc can truly describe the plane enable/active
state. So we check state->crtc instead of plane->visible here.
Change-Id: I9f9e8912c7279c1c68c8370014b08c7ba6bae72c
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
This adds support to limit frequency at multiple temperature zones, but
the frequency will be also changed by thermal framework if the device is
a cooling device.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I609cede78fce7e0a264fb961b422f05a45a7c949
Ensure the pclk is enabled when register access occurs.
Change-Id: Id108a04aed8424725dcc02dec9fe46bfc724c09b
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
There are some configs needed to update for rockchip_linux_defconfig.
As below:
1) UART number increase to 6, e.g: px30...
2) Enable HW_RANDOM_ROCKCHIP for fast ramdom number init
3) Enable some the missing configs for rk805
4) Enable ARM_ROCKCHIP_BUS_DEVFREQ config
5) Enable USB_CONFIGFS_F_UVC for UVC
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Change-Id: I880a4c59e40ba7b79f6f68fc39fca55919314e7b
Add the px30-evb-ddr3-v11-linux.dts for new panel on px30 evb boards.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Change-Id: I3f9acdd5f31c666487b1a51f611aa406ca553645
Fixes: d3d4f3e92d ("arm64: dts: rockchip: use ports to link DSI node and panel")
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Change-Id: I25328b4ac95fc88c0bbfa64c2a0dfd33040a8f63
make ARCH=arm rv1126_defconfig rv1126-facial-gate.config
Signed-off-by: Lin Jianhua <linjh@rock-chips.com>
Change-Id: I31719cb84af3d5ca12acec44df2976cdaf43e246
In rx only mode, if start is rewritten, a repeat start signal
will be generated, which may affect some peripherals.
Fixes: 42f500840d ("i2c: rk3x: Remove start state and irq")
Signed-off-by: David Wu <david.wu@rock-chips.com>
Change-Id: I1bdc6ee669bfcbd60e25abf723596791c59a9231
it produces a lot of heat when es8323 suspend, and fixed it.
Signed-off-by: XiaoTan Luo <lxt@rock-chips.com>
Change-Id: I26c9a5dacc15f4b9a5ca323993d4986848c6be7d
it has a high probability that es8323 record error, and fixed it.
Signed-off-by: XiaoTan Luo <lxt@rock-chips.com>
Change-Id: I57509a2f5ee04045bb2618a7c7ec11440030c4dc
1. when import dma-buf we should compare dma_buf->ops with
rockchip_drm_gem_prime_dmabuf_ops;
2. drm_gem_prime_import_dev add some special change for ion alloc
buffer, we must remove them from drm_prime.c for gki.
so we implement rockchip_drm_gem_prime_import to instead of
drm_gem_prime_import.
Change-Id: Iab3260b5c3efb5634d411eb1e8620fb575aa063c
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
fixed the maximum voltage value of CPU working at 408M
Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
Change-Id: Iaa730767007229295106d8f5e2ff7e1653f19aef
y state isr of next long frame of some sensor comes before frame end of short frame,
fix can not report luma connected with these sensor.
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
Change-Id: I9024bf330da178445aaff4aa8131dec6547e5ba5
There is a pull-up resistor added to the new touch board,
so the address of TP is changed to 0x14.
At the same time, switch the reporting coordinate method for
meet the requirement of QT using linuxfb.
Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
Change-Id: I1e25f7e47b2b93ccb66b1c093241eb94afc1a574
