This amends the following points:
- pull all RX messages from FIFO to TCPM while packet received and
GoodCRC sent.
- for TX success alert, just complete the tx status and GoodCRC will
be read out at RX process (GCRCSENT alert).
The above changes can fix the Source Caps packets may loss in PD
renegotiate stage probably.
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Change-Id: I0422449842fd24e42e398a38446dc00477c7acce
Invoke set_pd_rx() may flush the RX FIFO of PD controller, so do
set_pd_rx() before sending Soft Reset in case Source caps may be flushed
at debounce time between SOFT_RESET_SEND and SNK_WAIT_CAPABILITIES state.
Without this patch, in PD charger stress test, the FUSB302 driver may
occur the following exceptions in power negotiation stage.
[ ...]
[ 4.512252] fusb302_irq_intn
[ 4.512260] AMS SOFT_RESET_AMS finished
[ 4.512269] state change SOFT_RESET_SEND ->SNK_WAIT_CAPABILITIES [rev3 NONE_AMS]
[ 4.514511] pd := on
[ 4.514516] pending state change SNK_WAIT_CAPABILITIES ->HARD_RESET_SEND @ 310 ms [rev3 NONE_AMS]
[ 4.515428] IRQ: 0x51, a: 0x00, b: 0x01, status0: 0x93
[ 4.515431] IRQ: BC_LVL, handler pending
[ 4.515435] IRQ: PD sent good CRC
[ 4.516434] PD message header: 0
[ 4.516437] PD message len: 0
[ 4.516444] PD RX, header: 0x0 [1]
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Change-Id: Icf8748e319094bee5dd010e353254c532fdea6ab
The commit af02b05e59 ("mmc: add thunder boot support") reduced
the timeout time by mistake, which will cause mmc initialization error.
Fixes: af02b05e59 ("mmc: add thunder boot support")
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: Ie84d20104d2ea389c2369d6d1985c6dae0de054f
The voltage level of opp-table depend on thermal driver.
Signed-off-by: Liang Chen <cl@rock-chips.com>
Change-Id: Id51106a0676cac38027e901d9c30832aba39d8a5
sdmmc card wasn't functional at all as some properties copied from
old kernel can't work any more.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: Ib1deb1d5387bbca0e3be22c3175f301005bcee1d
For rk3128 reference design, sdmmc_pwren is used as a GPIO.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: If954337fe87da85eb7a088714ac6b0a5777c3cb7
Some properties have been removed or modified as kernel upgraded.
And add sdmmc_det for rk3128 since rk3128 can use functional det.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: I256bedb66a1fbf61fdcf40ff9034f69755642b05
Use freq 0 Hz to represent the case which not used yet, and,
should assign the match freq as external mclk in if used.
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: Ida01fcf9fb7c57db2de3d55c19a9bc80ac8fde97
Use freq 0 Hz to represent the case which not used yet, and,
should assign the match freq as external mclk in if used.
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I0a731367a81a740df36af7552c7b6a353f9bd2f0
Use freq 0 Hz to represent the case which not used yet, and,
should assign the match freq as external mclk in if used.
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: Id8d39117ba477285a562e7fa7bf7b28edd5e9212
adjust commit time from 1/8 to 7/8 scan timing when enable writeback;
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Iea0dd9e29b83399c1a0966e0c3ff68b861acd020
if not control csirx data clk, may cause vicap do cru reset fail
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: I38bd186e8add2d3e7df1df527f3d02bf4e7d5d76
There is no need to start DAIs which have no channel mapping.
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: Ia6be32d474845b9ecb443c38b6801e9836e8a77a
If set default phase to 1, 1080p RGB/YUV444 10BIT display blur
when switch from 4K YUV420 8BIT.
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I8ccd1cef40f3e47ce481a176a41c569ab2932b83
