Commit Graph

23 Commits

Author SHA1 Message Date
陈亮
eb7e8235cf rk312x: correct clk_ddr rate
Signed-off-by: 陈亮 <cl@rock-chips.com>
2014-09-18 02:33:31 -07:00
张晴
a013c410ce rk312x:clk:support set clks 2014-07-18 10:04:19 +08:00
dkl
8929905cb9 reset: rk3036: add rk3036 reset-controller support 2014-07-08 14:29:06 +08:00
黄涛
223378cc0f Merge remote-tracking branch 'origin/develop-3.10' into develop-3.10-next
Conflicts:
	drivers/mmc/host/Kconfig
	drivers/video/rockchip/hdmi/chips/rk616/rk616_hdmi.c
	drivers/video/rockchip/hdmi/chips/rk616/rk616_hdmi.h
	drivers/video/rockchip/hdmi/chips/rk616/rk616_hdmi_hw.c
	drivers/video/rockchip/hdmi/chips/rk616/rk616_hdmi_hw.h
	include/linux/mmc/rk_mmc.h
	include/linux/rockchip/cru.h
2014-07-07 21:01:04 +08:00
dkl
3207637c8d rockchip: add reset-rockchip driver to support Generic Reset Controller framework 2014-07-02 19:30:37 +08:00
黄涛
4f26888822 ARM: rockchip: rk3036: add initial support 2014-06-24 17:37:35 +08:00
hcy
51d7acb84f fix system reboot stop at DDR_DEBUG information 2014-06-03 16:54:13 +08:00
陈亮
cc1cd797fa 1.add rk_system_status.c, listen system status ,and prepare something for new status. 2.serialize ddrfreq, ensure that change ddrfreq is done before enter new status 2014-05-26 23:32:01 -07:00
陈亮
9b652a83df ddrfreq: add dualview sence and isp sence 2014-05-09 00:03:15 -07:00
陈亮
aaccb426d6 ddrfreq: add video scene, performan scene 2014-05-08 06:11:54 -07:00
陈亮
0180727dca ddrfreq: add more auto freq point 2014-05-07 06:30:33 -07:00
dkl
ad11a1286b clk: rockchip: add CLK_SET_RATE_PARENT_IN_ORDER
If the flag CLK_SET_RATE_PARENT_IN_ORDER is set, consider the
order of .set_parent and .set_rate, to prevent a too large
temporary rate on rate change. This will fix the bug of clk_gpu
in rk3288.
2014-04-28 21:24:24 +08:00
dkl
7348c1bed5 clk: rockchip: rk3288: adjust clock settings
1. add clkops_rate_3288_dclk_lcdc0/1
2. change gpll init_rate to 297M, and npll init_rate to 1250M
2014-04-28 21:24:24 +08:00
dkl
91019ca759 clk: rockchip: add clk_pll_ops_3188plus_auto 2014-04-28 21:24:24 +08:00
dkl
5a6a7c9fe3 clk: rockchip: add clkops_rate_3288_usb480m 2014-04-17 11:18:10 +08:00
dkl
d1de807ce5 pd: rockchip: add virtual pd clks 2014-04-14 21:32:41 +08:00
dkl
54775cd3b8 pd: rockchip: add clk_pd type and rk3288 clk_pd support 2014-04-14 16:59:23 +08:00
dkl
0e321ec4d7 rk3288: fix problem of mux clk with frac parent in rk3288
Mux clk with frac parent in rk3288, like i2s/spdif/uart,
has problem when set rate before.
2014-03-25 20:16:37 +08:00
dkl
d11c496731 clk: rockchip: add rk3288-clocks.dtsi 2014-03-16 12:09:58 +08:00
dkl
1fe0958ebe clk: rk: add CLK_PLL_3288_APLL type support 2014-03-13 11:36:19 +08:00
dkl
8a6caaaffd clk: rk: modify clk_pll, using pll_flags instead of pll_id 2014-03-13 10:45:29 +08:00
陈亮
f949ee0174 rk3188:linux3.10: add ddr clk node ops 2014-02-28 00:40:56 -08:00
dkl
15b1a654eb clk: rk: merge some defines about clk and add rk3188 prefix 2014-02-28 16:13:10 +08:00