Commit Graph

1274389 Commits

Author SHA1 Message Date
XiaoTan Luo
291dcddefa ASoC: rockchip: multicodecs: Correct error code for tdm slot configuration
Prevent returning an error for unsupported set_tdm_slot operations.

Fixes: 818669da27 ("ASoC: rockchip: multicodecs: add tdm support")
Signed-off-by: XiaoTan Luo <lxt@rock-chips.com>
Change-Id: I7bc292905100a7938ba0b55b92c267ada471d097
2024-08-28 19:01:36 +08:00
William Wu
27d840843a arm64: dts: rockchip: rk3326-evb-lp3-v10: Add vbus-supply for usb2 otg
This patch adds vbus-supply for usb2 otg to support
vbus control in u-boot via kernel dtb.

Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: Ic1c414bef56e68cea79c0e316824b4d915e8d63e
2024-08-28 18:44:18 +08:00
Shawn Lin
0f7094037e PCI: rockchip: dw: Remove forward definition of rk_pcie_{enable, disable}_power
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: I3e04e0ef5e320fcf6cc86e2923557e5dddedc4da
2024-08-27 19:26:49 +08:00
Shawn Lin
c54772e75b PCI: rockchip: dw: Reorder and document steps of rk_pcie_really_probe()
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: Iffc9e7e04cc4329b7d0b71f9cc1dd1ee3080e7b6
2024-08-27 19:26:49 +08:00
Shawn Lin
5fd5f84e05 PCI: rockchip: dw: Move debugfs all into rockchip_pcie_debugfs_init()
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: I34d9bdc41afa4051f903adf00a37eebaabc25524
2024-08-27 19:26:49 +08:00
Shawn Lin
52729bfaff PCI: rockchip: dw: Move dma_obj initialization into rk_pcie_init_dma_trx()
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: Id8c744d891c00fb9b121baf33637dfe47b73a69f
2024-08-27 19:26:49 +08:00
Shawn Lin
b4ce92d9e0 PCI: rockchip: dw: Move irq and wq into rk_pcie_init_irq_and_wq()
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: Iad6e116a43d72c198ec5b032cfc46229651f70d8
2024-08-27 19:26:48 +08:00
Shawn Lin
a8e681d542 PCI: rockchip: dw: Release PCIe reset/clock before phy initial
In order to let combo phy check the mplla_state/mpllb_state.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: I22da2ad35a12c1f135dcbb940e235f9cb179c439
2024-08-27 19:26:06 +08:00
Shawn Lin
6d90c6b513 PCI: rockchip: dw: Move getting lpbk and comp into rk_pcie_resource_get()
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: Iaa9e7b22c402ad528e7ba839bcf4bd7d697dcedd
2024-08-27 19:26:06 +08:00
Shawn Lin
deccf139df PCI: rockchip: dw: Move getting skip_scan_in_resume into rk_pcie_resource_get()
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: I422ad5e53d1a377e7e0b2a11e5144ce54b938be9
2024-08-27 19:26:06 +08:00
Shawn Lin
a7ee33c78d PCI: rockchip: dw: Move getting vpcie3v3 into rk_pcie_resource_get()
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: I7fb17e48c7ee795454a0a15d0331ffeee4046c98
2024-08-27 19:26:05 +08:00
Shawn Lin
95a000fc6c PCI: rockchip: dw: Move getting clkreq, HP and bifurcation into rk_pcie_resource_get()
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: Ifb3a16eadbbb50a64a6b53967fa906f363998674
2024-08-27 19:26:05 +08:00
Shawn Lin
b1d095908b PCI: rockchip: dw: Move getting rsts into rk_pcie_resource_get()
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: I7c46fc1425037cc43e768a23a678ef5a348ee280
2024-08-27 19:26:05 +08:00
Shawn Lin
b58cb3ff2b PCI: rockchip: dw: Remove rk_pcie_clk_init()
Move devm_clk_bulk_get_all into rk_pcie_resource_get()

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: I4115faaa1fd84f7c7b521a025c3b9682e920c362
2024-08-27 19:26:05 +08:00
XiaoTan Luo
818669da27 ASoC: rockchip: multicodecs: add tdm support
Signed-off-by: XiaoTan Luo <lxt@rock-chips.com>
Change-Id: I7fccc0ad5214399b0354899f2a5f81b2f16161b7
2024-08-27 14:21:00 +08:00
Yifeng Zhao
6732e1af29 exfat: fix memory leak in exfat_load_bitmap()
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I50523d98e269dea3837bc520a7588bf245a01cd3
2024-08-27 14:09:47 +08:00
Tao Huang
70046cbf84 ARM: rk3506_defconfig: Disable CONFIG_ROCKCHIP_CLK_INV/PVTM/CONFIG_ROCKCHIP_PVTM
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: If22b930f24fa99b41d6e8ef7bdab3e63c9d35734
2024-08-27 11:24:44 +08:00
Tao Huang
ee672f753b media: rockchip: flexbus_cif: Add MODULE_IMPORT_NS(DMA_BUF)
ERROR: modpost: module flexbus_cif uses symbol dma_buf_put from namespace DMA_BUF, but does not import it.
ERROR: modpost: module flexbus_cif uses symbol dma_buf_fd from namespace DMA_BUF, but does not import it.

Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I3a512a9b4efc899dc16b61b6cbc867d5cabe70d1
2024-08-27 10:55:31 +08:00
Damon Ding
e3b31a037d drm/rockchip: tve: add .loader_protect() support for tve
If logo display enabled, the rockchip_tve_encoder_loader_protect()
helps to set the tve enable/disable status and call
pm_runtime_get_sync()/pm_runtime_put(), which allows for
the continuation of the display state from the U-Boot stage.

In addition, fix the check of tve mode setting in .mode_set()
to avoid display flashing, which caused by the off/on switch of dac.

Change-Id: I6f1fcaf05cb6e362ce375e447c566fb5356c5380
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
2024-08-26 16:44:53 +08:00
Damon Ding
1dcd984537 drm/rockchip: tve: add support to enable/disable tve/vdac clks dynamically for rk3528
It doesn't make sense to always enable tve/vdac clks in probing.
The clks dynamic switching can also help to reduce the power
consumption.

Change-Id: Id93b5552d6e984d7a6306508f5ee74b383a0d3c5
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
2024-08-26 16:44:46 +08:00
Damon Ding
c60bd1fdea drm/rockchip: tve: add clk error check for rk3528
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Change-Id: I00f83467aa82da3a023c7e2e7cd40d44b7a70b3a
2024-08-26 16:44:32 +08:00
Finley Xiao
e7bf974d33 clk: rockchip: rk3506: Remove frac parent clk for dclk vop
Change-Id: I0c6d95eb180393f90e769f43f7b6dd08a49cc308
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2024-08-26 12:03:28 +08:00
Alex Zhao
09deb2e9df net: wireless: rockchip_wlan: bcmdhd: Remove unnecessary code to resolve gki compilation errors
Change-Id: I16b6fa727946d64fbf90ee2acdebd9744748da32
Signed-off-by: Alex Zhao <zzc@rock-chips.com>
2024-08-23 10:29:35 +08:00
Sandy Huang
d866beb995 drm/rockchip: vop2: NV12/NV21/NV15/NV51 format src_h must aligned as 2 line
RK3528/RK3562/RK3576 NV12/NV21/NV15/NV51 format src_h must aligned as 2 line,
otherwise the last line will be error.

Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I2df24bbaa318fb78bb632a6d9d42cbc4ee66656b
2024-08-22 19:57:49 +08:00
ZiHan Huang
728606d23e ARM: rk3506_defconfig: Enable CONFIG_NTFS3_FS and CONFIG_MSDOS_PARTITION
rk3506 evb USB flash drive mounting must support one ntfs format

before:
   text	   data	    bss	    dec	    hex	filename
4919662	2289888	 114376	7323926	 6fc116	vmlinux

after:
   text	   data	    bss	    dec	    hex	filename
5019134	2302528	 114952	7436614	 717946	vmlinux

Change-Id: I50fc0313db640e39b2cd46325bf7966357c3198d
Signed-off-by: ZiHan Huang <zack.huang@rock-chips.com>
2024-08-22 18:53:05 +08:00
Zhihuan He
6564f7d12d ARM: dts: rockchip: rk3506: adapt dsmc_lb_slave device
Change-Id: I4d249cee8146cc2614b24d1be6c88cd433f6c988
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
2024-08-22 18:44:36 +08:00
Zhihuan He
fc7e00567a ARM: dts: rockchip: rk3506: adapt dsmc device
Change-Id: I9da2c0a22c50c66aa8ecac3614ee93f4841cb074
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
2024-08-22 18:42:05 +08:00
Zhihuan He
c0eed45df4 arm64: dts: rockchip: rk3576: add mtr timing for dsmc
Change-Id: I6d3e95327fa8ae219a8035f1eed6c75deb9970a6
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
2024-08-22 18:41:30 +08:00
Sugar Zhang
724daf925a ASoC: rockchip: i2s: Fix the max register
Fix the get_fifo_count always return zero.

Fixes: 336c6579db ("ASoC: rockchip: i2s: Add support for DLP")
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I221c2ccfb9f88e6bc1c0f28b53f5f10906d3d397
2024-08-22 18:18:23 +08:00
William Wu
da6d7ef34d phy: rockchip: inno-usb2: Recovery iddig ctrl regs in resume
During system suspend and resume, the iddig control
registers maybe changed unexpectedly because of some
reasons, such as grf lost power or modified in phy
tuning, it will cause otg host mode invalid after
system resume if the otg port was forced to host mode
by iddig registers before enter suspend.

This patch check the otg port mode and iddig status
in resume, if the otg port in force host mode and the
iddig status has changed during resume, it recovery
the iddig control regs for host mode.

Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: I881736718db6ee5cf42c0cff58f3c2629cb29928
2024-08-22 18:10:53 +08:00
Ye Zhang
2af76b3213 gpio: rockchip: Update debounce config function
GPIO_TYPE_V2 supports debounce configuration.

Signed-off-by: Ye Zhang <ye.zhang@rock-chips.com>
Change-Id: I52bae10669e2d10d4deabe775b660d09ce380481
2024-08-22 18:10:17 +08:00
Cai YiWei
51a075438d media: rockchip: isp: version v2.6.1
Change-Id: I9af0f89f94548912ec03654fdabcfd016d8a6907
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
2024-08-22 16:23:59 +08:00
Huibin Hong
b46f7847ae ARM: dts: rockchip: rk3506: modify reserved memory
1. set trust size:0x62000
2. set ramoops start:0x83000, size:0x2d000

Change-Id: I140599f2286e363fbb7607cea9b6824be4c4ade3
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
2024-08-22 14:36:55 +08:00
Zheng zhiqi
6a348dff81 arm64: dts: rockchip: rk3588-vehicle-evb: reboot adsp
Reboot rk2118 while platform reboot

Change-Id: I8a3d199b619ee3412a82620619c360ec867bfaa2
Signed-off-by: Zheng zhiqi <looper.zheng@rock-chips.com>
2024-08-22 09:56:29 +08:00
Mingwei Yan
c803efb987 media: rockchip: vpss: online support reset
Signed-off-by: Mingwei Yan <mingwei.yan@rock-chips.com>
Change-Id: I50bd79743fac270ff4ee888959f60dd36f9e6639
2024-08-22 09:30:52 +08:00
Shawn Lin
866b86dd10 arm64: configs: rockchip_linux_defconfig: Add GPIO based HP for PCIe
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: If22e9b2532c092a48e4a5ec2c91d86aa0b68848c
2024-08-21 19:45:27 +08:00
Shawn Lin
9e3a86e865 PCI: rockchip: dw: Add gpio based hotplug
[1]check we do have two devices plugged:

console:/ # lspci
00:00.0 Class 0604: Device 1d87:3576 (rev 01)
01:00.0 Class 0108: Device 15b7:5017 (rev 01)
20:00.0 Class 0604: Device 1d87:3576 (rev 01)
21:00.0 Class 0108: Device 1d97:2269 (rev 03)

[2]Unplug two NVMe devices:

[   35.680289][  T134] pcieport 0000:00:00.0: Hot-UnPlug Event
[   35.680361][  T134] pcieport 0000:00:00.0: Power Status = 1
[   35.827183][  T134] rk-pcie 2a200000.pcie: rk_pcie_slot_disable
[   35.827303][  T134] pcieport 0000:00:00.0: Hot-UnPlug Event
[   35.827323][  T134] pcieport 0000:00:00.0: Power Status = 0
[   35.827334][  T134] pcieport 0000:00:00.0: Device is already removed
[   35.827343][  T134] rk-pcie 2a200000.pcie: rk_pcie_slot_disable
[   38.201153][  T138] pcieport 0000:20:00.0: Hot-UnPlug Event
[   38.201209][  T138] pcieport 0000:20:00.0: Power Status = 1
[   43.239050][  T138] nvme nvme1: Device shutdown incomplete; abort shutdown
[   46.204721][  T138] rk-pcie 2a210000.pcie: rk_pcie_slot_disable

[3]They are removed:

console:/ # lspci
00:00.0 Class 0604: Device 1d87:3576 (rev 01)
20:00.0 Class 0604: Device 1d87:3576 (rev 01)

[4]Then we plug them again:

console:/ # [   52.435494][  T134] pcieport 0000:00:00.0: Hot-Plug Event
[   52.435583][  T134] pcieport 0000:00:00.0: Power Status = 0
[   52.435610][  T134] rk-pcie 2a200000.pcie: rk_pcie_slot_enable
[   52.648277][  T134] rk-pcie 2a200000.pcie: PCIe Linking... LTSSM is 0x3
[   52.735030][  T134] rk-pcie 2a200000.pcie: PCIe Link up, LTSSM is 0x30011
[   52.777740][  T134] pcieport 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[   52.777955][  T134] pci 0000:01:00.0: [1d97:2269] type 00 class 0x010802
[   52.778072][  T134] pci 0000:01:00.0: reg 0x10: [mem 0x00000000-0x00003fff 64bit]
[   52.778977][  T134] pci 0000:01:00.0: 2.000 Gb/s available PCIe bandwidth, limited by 2.5 GT/s PCIe x1 link at 0000:00:00.0 (capable of 63.012 Gb/s with 16.0 GT/s PCIe x4 link)
[   52.791130][  T134] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01
[   52.791229][  T134] pci 0000:01:00.0: BAR 0: assigned [mem 0x20200000-0x20203fff 64bit]
[   52.792548][  T134] nvme nvme0: pci function 0000:01:00.0
[   52.792970][  T137] nvme 0000:01:00.0: enabling device (0000 -> 0002)
[   52.820084][  T137] nvme nvme0: allocated 64 MiB host memory buffer.
[   52.834777][  T137] nvme nvme0: 6/0/0 default/read/poll queues
[   52.840583][   T84] nvme nvme0: Ignoring bogus Namespace Identifiers
[   56.454008][  T138] pcieport 0000:20:00.0: Hot-Plug Event
[   56.454062][  T138] pcieport 0000:20:00.0: Power Status = 0
[   56.454082][  T138] rk-pcie 2a210000.pcie: rk_pcie_slot_enable
[   56.668151][  T138] rk-pcie 2a210000.pcie: PCIe Linking... LTSSM is 0x3
[   56.755033][  T138] rk-pcie 2a210000.pcie: PCIe Link up, LTSSM is 0x30011
[   56.771544][  T138] pcieport 0000:20:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[   56.771739][  T138] pci 0000:21:00.0: [15b7:5017] type 00 class 0x010802
[   56.771857][  T138] pci 0000:21:00.0: reg 0x10: [mem 0x00000000-0x00003fff 64bit]
[   56.772592][  T138] pci 0000:21:00.0: 2.000 Gb/s available PCIe bandwidth, limited by 2.5 GT/s PCIe x1 link at 0000:20:00.0 (capable of 63.012 Gb/s with 16.0 GT/s PCIe x4 link)
[   56.783092][  T138] pci_bus 0000:21: busn_res: [bus 21] end is updated to 21
[   56.783156][  T138] pci 0000:21:00.0: BAR 0: assigned [mem 0x21200000-0x21203fff 64bit]
[   56.784098][  T138] nvme nvme1: pci function 0000:21:00.0
[   56.784551][   T84] nvme 0000:21:00.0: enabling device (0000 -> 0002)
[   56.795146][   T84] nvme nvme1: allocated 32 MiB host memory buffer.
[   56.813480][   T84] nvme nvme1: 6/0/0 default/read/poll queues

[5]Accessing them to check the devices:

console:/ # lspci
00:00.0 Class 0604: Device 1d87:3576 (rev 01)
01:00.0 Class 0108: Device 15b7:5017 (rev 01)
20:00.0 Class 0604: Device 1d87:3576 (rev 01)
21:00.0 Class 0108: Device 1d97:2269 (rev 03)

console:/ # [   66.181110][  T534] healthd: battery l=50 v=3300 t=2.6 h=2 st=3 c=-1600 fc=100 chg=au
dd if=/dev/block/nvme0n1 of=/dev/null bs=1M count=1000
1000+0 records in
1000+0 records out
1048576000 bytes (0.9 G) copied, 3.322 s, 301 M/s

console:/ # dd if=/dev/block/nvme1n1 of=/dev/null bs=1M count=1000                         <
1000+0 records in
1000+0 records out
1048576000 bytes (0.9 G) copied, 3.724 s, 269 M/s

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: I49c57755d11cc43bbf7cf9eb23542f5e1e11aaa3
2024-08-21 19:43:48 +08:00
Tao Huang
57ed7b017f ARM: rk3506_defconfig: Enable CONFIG_LD_DEAD_CODE_DATA_ELIMINATION
before:
   text	   data	    bss	    dec	    hex	filename
4919662	2289888	 114376	7323926	 6fc116	vmlinux

after:
   text	   data	    bss	    dec	    hex	filename
4817210	2235024	 110208	7162442	 6d4a4a	vmlinux

Change-Id: I66ff62436bafa48242cec573901195220e84fbac
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2024-08-21 19:17:45 +08:00
Yuntao Liu
cf50c9c2e4 BACKPORT: ARM: 9404/1: arm32: enable HAVE_LD_DEAD_CODE_DATA_ELIMINATION
The current arm32 architecture does not yet support the
HAVE_LD_DEAD_CODE_DATA_ELIMINATION feature. arm32 is widely used in
embedded scenarios, and enabling this feature would be beneficial for
reducing the size of the kernel image.

In order to make this work, we keep the necessary tables by annotating
them with KEEP, also it requires further changes to linker script to KEEP
some tables and wildcard compiler generated sections into the right place.
When using ld.lld for linking, KEEP is not recognized within the OVERLAY
command, and Ard proposed a concise method to solve this problem.

It boots normally with defconfig, vexpress_defconfig and tinyconfig.

The size comparison of zImage is as follows:
defconfig       vexpress_defconfig      tinyconfig
5137712         5138024                 424192          no dce
5032560         4997824                 298384          dce
2.0%            2.7%                    29.7%           shrink

When using smaller config file, there is a significant reduction in the
size of the zImage.

We also tested this patch on a commercially available single-board
computer, and the comparison is as follows:
a15eb_config
2161384         no dce
2092240         dce
3.2%            shrink

The zImage size has been reduced by approximately 3.2%, which is 70KB on
2.1M.

Change-Id: Id2c136f7c992c6699c6c576ada46bfb025378f78
Signed-off-by: Yuntao Liu <liuyuntao12@huawei.com>
Tested-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
(cherry picked from commit ed0f941022515ff40473ea5335769a5dc2524a3f)
2024-08-21 19:17:45 +08:00
Mingwei Yan
205bc82ae4 media: rockchip: vpss: support suspend and resume
Signed-off-by: Mingwei Yan <mingwei.yan@rock-chips.com>
Change-Id: I30a15c5952853b99968acbe732adcc83301e1d62
2024-08-21 19:12:47 +08:00
Mingwei Yan
ed7f33a28d media: rockchip: vpss: offline add some debug info
Signed-off-by: Mingwei Yan <mingwei.yan@rock-chips.com>
Change-Id: Idcdb789929698242a2d78a43a0f28b46be0b27d7
2024-08-21 19:09:55 +08:00
Zhang Yubing
9ce43aae96 drm/rockchip: fix some csc parameters error
1. Fix the csc matrix. For YUV709L to YUV709L, YUV601L to
YUV601L, YUV2020L to YUV2020L, The csc matrix should be
identity matrix. For YUV601L to YUV709L, modeify the csc
matrix.
2. optimize the final calculation result. Use the new r2y
and y2r matrix for csc yuv2yuv and rgb2rgb case. A simple
round is used for csc yuv2yuv and rgb2rgb case for a more
precise result.

Change-Id: I51f1b597c2aa3edcb66bc359df709b9b61a97b52
Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
2024-08-21 18:12:08 +08:00
Tao Huang
0cb1f2340c ARM: rk3506_defconfig: Disable more unused NET_VENDOR
Change-Id: Ie466c01ef94d34c9aad8a64fb4bc055d5108550a
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2024-08-21 10:53:18 +08:00
Chen Shunqing
b56ae053d3 media: i2c: rk628: reduce power consumption when there is no hdmi in
Signed-off-by: Chen Shunqing <csq@rock-chips.com>
Change-Id: Idc4b5f2b6372414e61634b3144b01d6ca0acc447
2024-08-21 09:28:51 +08:00
Zhen Chen
e67dbfb61f MALI: bifrost: CSF: Add MALI_CSF_INCLUDE_FW to include mali_csffw.bin into driver by default
Change-Id: Ib6374444bdda257b245c2f09475cb470f1974dcd
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
2024-08-20 18:37:40 +08:00
Zhen Chen
d6fdcb0bf4 MALI: bifrost: CSF: Add formal mali_csffw.bin of Valhall DDK g22(r47)
Change-Id: Ia97d5d1f597dbeda65ec78431304ec0e851d9eed
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
2024-08-20 18:37:40 +08:00
Zhen Chen
386decb92e MALI: bifrost: CSF: Using DDK version as prefix in 'default_fw_name'
Change-Id: I7e4ab0323794cdc4db8789e4aef317c357dc4938
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
2024-08-20 18:37:40 +08:00
Zhen Chen
8d8f23f435 MALI: rockchip: upgrade bifrost DDK to g22p0-01eac0, from g21p0-01eac0
Change-Id: I7dabc77e636e7507ee6d3ef7d573e7ea3566703a
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
2024-08-20 18:37:40 +08:00
Algea Cao
8de69287b9 drm/bridge: synopsys: dw-hdmi-qp: Support set ddc scl freq from dts
Change-Id: I8a57946cbf70976a87bf19e963581e02a5c0a521
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
2024-08-20 14:06:49 +08:00
Shawn Lin
1b2222254f phy: rockchip: naneng-combphy: Update external clk parameters for better SI
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: Ic121a29ddc00357b069b27b0fe5e8f4654677ae1
2024-08-19 09:23:12 +08:00