We had a multi-partition SD-Card with two ext2 file systems. The partition
table was getting overwritten by a race between the card removal and
the unmount of the 2nd ext2 partition.
What was observed:
1. Suspend/resume would call to remove the device. The clearing
of the device information is done asynchronously.
2. A request is made to unmount the file system (this is called
after the removal has started).
3. The remapping table was cleared by the asynchronous part of
the device removal.
4. A write request to the super block (block 0 of the partition)
was sent down and instead of being remapped to the partition
offset, it was remapped to block 0 of the device which is where
the partition table is located.
5. Write was queued and written resulting in the overwriting
of the partition table with the ext2 super block.
6. The mmc_queue is cleaned up.
The mmc card device driver used to access SD cards, was calling del_gendisk
before calling mmc_cleanup-queue. The comment in the mmc_blk_remove_req
code indicated that it expected del_gendisk to block all further requests
from being queued but it doesn't. The mmc driver uses the presences of the
mmc_queue to determine if the request should be queued.
The fix was to clean up the mmc_queue before the rest of the
the delete partition code is called.
This prevents the overwriting of the partition table.
However, the umount gets an error trying to write the super block.
The umount should be issued before the device is removed but that
is not always possible. The umount is still needed to cleanup other
data structures.
Addresses the problem described in http://crbug.com/240815
Signed-off-by: Paul Taysom <taysom@chromium.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
Patch "mmc: sdhci: Add size for caller in init+register" changed the
interface for sdhci_pltfm_init, while patch "mmc: sdhci-sirf: add mmc
host sdhci-pltfm based driver for SiRF SoCs" added a new driver
with the old interface.
This changes the sirf driver to use the new interface, avoiding
one warning, and simplifying the init sequence. Since we're here
already, this also adds an error path for failed clk_prepare_enable.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Christian Daudt <csd@broadcom.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
Use the wrapper functions for getting and setting the driver data using
platform_device instead of using dev_{get,set}_drvdata() with &pdev->dev,
so we can directly pass a struct platform_device.
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Acked-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Signed-off-by: Chris Ball <cjb@laptop.org>
Fix to return a negative error code instead of 0 when we cannot get
IRQ source by platform_get_irq(), as done elsewhere in this function.
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Acked-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Chris Ball <cjb@laptop.org>
At Interrupt status register, Bit9 is Data Read Timeout.
But we used macro name as the DTO. It could be confused with the
Data Transfer Over(DTO)-Bit[3].
It's clearly that is changed the DRTO instead of DTO.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Acked-by: Seungwon Jeon <tgih.jun@samsung.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
This adds dpm support for rv6xx asics. This includes:
- clockgating
- dynamic engine clock scaling
- dynamic memory clock scaling
- dynamic voltage scaling
- dynamic pcie gen1/gen2 switching
Set radeon.dpm=1 to enable.
v2: remove duplicate line
v3: fix thermal interrupt check noticed by Jerome
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
This adds dpm support for rs780/rs880 asics. This includes:
- clockgating
- dynamic engine clock scaling
- dynamic voltage scaling
set radeon.dpm=1 to enable it.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Calculate the low and high watermarks based on the low and high
clocks for the current power state. The dynamic pm hw will select
the appropriate watermark based on the internal dpm state.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Calculate the low and high watermarks based on the low and high
clocks for the current power state. The dynamic pm hw will select
the appropriate watermark based on the internal dpm state.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Calculate the low and high watermarks based on the low and high
clocks for the current power state. The dynamic pm hw will select
the appropriate watermark based on the internal dpm state.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
calculate the low and high watermarks based on the low and high
clocks for the current power state. The dynamic pm hw will select
the appropriate watermark based on the internal dpm state.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This adds the common dpm (dynamic power management)
infrastructure:
- dpm callbacks
- dpm init/fini/suspend/resume
- dpm power state selection
No device specific code is enabled yet.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Has a different dpm controller than r600.
v2: rebase on gpu reset changes
v3: rebase on get_xclk changes
v4: update rptr/wtpr callbacks
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
dpm needs access to atombios data and command tables
for setup and calculation of a number of parameters.
v2: endian fix
v3: fix mc reg table bug
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This is required for certain advanced functionality.
v2: save/restore list takes dword offsets
v3: rebase on gpu reset changes
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Since commit ab78029 (drivers/pinctrl: grab default handles from
device core), we can rely on device core for handling pinctrl.
So remove devm_pinctrl_get_select_default() from the driver.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
v2: fix up for latest reset changes
v3: use CP for pt updates for now
v4: update for 2 level PTs
v5: update for ib_parse removal
v6: vm_flush api change
v7: rebase
v8: fix gfx ring function pointers
v9: fix vm_set_page function params
v10: update for compute changes
v11: cleanup for release
v12: update rptr/wptr callbacks
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
The compute rings use RELEASE_MEM rather then EOP
packets for writing fences and there is no SYNC_PFP_ME
packet on the compute rings.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Type 2 packets are deprecated on CIK MEC and we should use
type 3 nop packets. Setting the count field to the max value
(0x3fff) indicates that only one dword should be skipped
like a type 2 packet.
v2: add comment to code
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
On CIK, the compute rings work slightly differently than
on previous asics, however the basic concepts are the same.
The main differences:
- New MEC engines for compute queues
- Multiple queues per MEC:
- CI/KB: 1 MEC, 4 pipes per MEC, 8 queues per pipe = 32 queues
- KV: 2 MEC, 4 pipes per MEC, 8 queues per pipe = 64 queues
- Queues can be allocated and scheduled by another queue
- New doorbell aperture allows you to assign space in the aperture
for the wptr which allows for userspace access to queues
v2: add wptr shadow, fix eop setup
v3: fix comment
v4: switch to new callback method
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
The doorbell aperture is a PCI BAR whose pages can be
mapped to compute resources for things like wptrs
for userspace queues.
This patch maps the BAR and sets up a simple allocator
to allocate pages from the BAR.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Add callbacks to the radeon_asic struct to handle
rptr/wptr fetchs and wptr updates.
We currently use one version for all rings, but this
allows us to override with a ring specific versions.
Needed for compute rings on CIK.
v2: udpate as per Christian's comments
v3: fix some rebase cruft
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
With the new eMMC5.1 spec, there is a new EXT_CSD register with
the revision number(EXT_CSD_REV) 7. This patch updates the check
for ext-csd.rev number as 7.
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Yuvaraj Kumar C D <yuvaraj.cd@samsung.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
With device core now able to setup the default pin configuration, the
call to devm_pinctrl_get_select_default can be removed. And the pin
configuration code based on the deprecated Samsung specific gpio
bindings is also removed.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
Instead of parsing the DT binding on our own, use the standard parser
mmc_of_parse(), introduced by commit 6c56e7a.
Signed-off-by: Simon Baatz <gmbnomis@gmail.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Chris Ball <cjb@laptop.org>
In addition to just logging errors encountered during DT parsing or
allocating GPIO slots for CD/WP, mmc_of_parse() now returns with an error.
In particular, this is needed if the GPIO allocation may return
EPROBE_DEFER.
Signed-off-by: Simon Baatz <gmbnomis@gmail.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
In preparation to switching the jz4740 clk driver to the
common clk framework, update the clk enable/disable calls
to clk_prepare_enable/clk_disable_unprepare.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Chris Ball <cjb@laptop.org>
of_match_ptr() eliminates having an #ifdef returning NULL for the case
when OF is disabled.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Instead of using a GPIO to turn on/off the CAN transceiver, it is better to
use a regulator as some systems may use a PMIC to power the CAN transceiver.
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
