Commit Graph

854283 Commits

Author SHA1 Message Date
William Wu
35ec91bf3a phy: rockchip-inno-combphy: remove combphy_u3_cp_test
The combphy_u3_cp_test() is used for USB3 compliance test,
and it depends on the cp_test of phy_ops which will be
dropped later, so we remove combphy_u3_cp_test directly.

As a side effect, we need to use io commands to set the
USB3 enter compliance test mode instead of host_testmode
for RK1808 USB3 combphy.

Change-Id: Iac7d9a4c6b0d2a74c284586f5dcbb48925691a91
Signed-off-by: William Wu <william.wu@rock-chips.com>
2020-06-29 16:53:21 +08:00
William Wu
9b2b3773bc usb: dwc3: rockchip-inno: remove debugfs directory and host_testmode
This patch remove debugfs directory and host_testmode which
cause the following error:

ERROR: "xhci_set_link_state" [drivers/usb/dwc3/dwc3-rockchip-inno.ko] undefined!

We remove the code of host_testmode directly, because it
depends on the phy_cp_test() which will be dropped later.

As a side effect, we need to use io commands to set the
DWC3 Host enter compliance test mode instead of host_testmode
for RK3328 USB3.

Change-Id: Ie0b1fac63fd6458f07ad30edadc7c4c27486e894
Signed-off-by: William Wu <william.wu@rock-chips.com>
2020-06-29 16:53:21 +08:00
XiaoDong Huang
5f48c4e68e regulator: tps549b22: read voltage-step from device-tree
Change-Id: I4de8a54b8475af073ed51ced0959a4e93590563d
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
2020-06-29 14:23:11 +08:00
Hu Kejun
9342eb601f media: rockchip: isp: fix ae window is not correct
Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
Change-Id: Ie98897c7e63bbaac724357d1ee4b6964071a9346
2020-06-29 11:59:21 +08:00
Lin Jinhan
018299265d ARM: dts: rockchip: rv1126: add crypto node
Change-Id: If9e8f868e6d917ced387622c16e81e29d56a40db
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
2020-06-29 11:16:10 +08:00
Ren Jianing
ca2d5e4f59 usb: dwc3: gadget: fix isoc out transfer issue
When I test the uac gadget function, I find that the uac
gadget out transfer may stop expectedly and the alsa buffer
will be empty which results to input/output error.

In some cases, we will get an endpoint event
DWC3_DEPEVT_XFERINPROGRESS and the event status is
DEPEVT_STATUS_MISSED_ISOC, and the original code try to issue
an EndTransfer command. After the EndTransfer is completed,
we will get a XferNotReady event. However, it will fail to
giveback the req to the udc gadget driver due to an additional
request unmap operation.

To fix this problem, this patch return directly in kick transfer
if there are isochronous endpoints and retry to transfer next time.

Signed-off-by: Ren Jianing <jianing.ren@rock-chips.com>
Change-Id: I80a8e7c0caa9129e5736bbf89909662c2f3ed4fe
2020-06-29 11:06:51 +08:00
Wu Liangqing
62da2b7c48 arm64: dts: rockchip: rk3368a-817-tablet: compatible add rockchip,rk3368a
Change-Id: Iaa9633ec7c302353d735d4ed3d72c9bbbee844a1
Signed-off-by: Wu Liangqing <wlq@rock-chips.com>
2020-06-29 08:52:59 +08:00
Jon Lin
082cbe0f6d drivers: rkflash: Remove bbt option property if scan fail
Change-Id: Ice861d20077152174d4d407a40239a9142cf3355
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
2020-06-29 08:52:31 +08:00
Sugar Zhang
cee61f3e32 video: rockchip: mpp: Fix panic when mpp service is omit or disabled
[    4.239358] Unable to handle kernel NULL pointer dereference at virtual address 00000050
[    4.263110] pgd = (ptrval)
[    4.269464] [00000050] *pgd=00000000
[    4.285610] Internal error: Oops: 5 [#1] PREEMPT SMP ARM
[    4.291283] Modules linked in:
[    4.294795] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.19.111 #1960
[    4.301399] Hardware name: Generic DT based system
[    4.306660] PC is at mpp_set_grf+0x8/0x3c
[    4.311054] LR is at mpp_add_driver+0x24/0x44
[    4.315713] pc : [<b03d7b44>]    lr : [<b03d50d8>]    psr: 20000153
[    4.322250] sp : bf039ee8  ip : 00000d8c  fp : bf7ffd80
[    4.327740] r10: b0b3003c  r9 : 00000007  r8 : 00000000
[    4.333260] r7 : b0b15914  r6 : b0f21788  r5 : 00000006  r4 : b1022a2c
[    4.340094] r3 : 00000048  r2 : bf5d1e24  r1 : b0f21788  r0 : 00000048
[    4.346947] Flags: nzCv  IRQs on  FIQs off  Mode SVC_32  ISA ARM  Segment user
[    4.354487] Control: 10c5387d  Table: 6000406a  DAC: 00000055

Change-Id: Idad72d462da59a8af53fd038ceda973da1f4139d
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
2020-06-29 08:47:57 +08:00
Cai YiWei
2fa88ab89a media: rockchip: ispp: fix tnr 3to1 frame order
Change-Id: I44dbaf12819111a09d38a7685f1aaf53afc84777
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
2020-06-28 15:02:51 +08:00
Nickey Yang
a7898428fc ARM: dts: rv11xx-evb-v12: support rv1109/rv1126 evb ddr3 v12 board
There are some differences between hardware V12 and v10
1.Power:
    The buck1 of rk809 supplies power to NPU and vepu
    The discrete power supplies power to logic
2.Reset signal of camera:
    The reset signal of csi rx0 is control by gpio1_D5,
    The reset signal of csi rx1 is control by gpio2_A0.

Change-Id: Ib290939c9a3a47efaeabfbadbc796126e0cbf279
Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
2020-06-28 15:02:16 +08:00
Wu Liangqing
6edb4a2e3f arm64: dts: rockchip: rk3368a-817-tablet: rk817 buck2 adjust voltage by hardware
Change-Id: Ide3287096e881e5b763adf240a843813ec4d8924
Signed-off-by: Wu Liangqing <wlq@rock-chips.com>
2020-06-28 10:28:34 +08:00
Ren Jianing
3a4f755124 ARM: dts: rockchip: add vup_gpios in u2phy0 for rv11xx-ai-cam
The USB2.0 OTG PHY of RV1126/1109 which is designed for lower power
consumption provides only 8.8mA current source on DM. Multiplied
by 45 Ohm host termination resistance, voltage is about 400mV.
If the threshold voltage of host is greater than 400mV, the high
speed handshake will fail and SoC communicate at full speed. So
swing calibration is necessary.

We use gpio to control the 220 Ohm pull-up resistor to provide additional
current. Experiments show that the voltage of chirpK can be increases
to about 600mV.

Signed-off-by: Ren Jianing <jianing.ren@rock-chips.com>
Change-Id: I387ae1840959540ff9ca22db26896def0e890619
2020-06-24 19:26:40 +08:00
Ren Jianing
ef65767d42 ARM: dts: rockchip: change dr_mode to peripheral for rv11xx-ai-cam
Signed-off-by: Ren Jianing <jianing.ren@rock-chips.com>
Change-Id: Ieedc7480173ff9c1d575643d1dea2f09e5528945
2020-06-24 19:26:21 +08:00
Jianing Ren
a35ff85301 phy: phy-rockchip-naneng-usb2: enable id irq when vbus always on
This patch will enable id interrupt for otg port when the property
vbus-always-on is set in dts.

If vbus is always on, bvalid interrupt won't make sense and be
disabled. But we cat change id state to switch drd mode by software.

Change-Id: I69fc3f00430dfd73835c6e99694d8d7c72c60c8c
Signed-off-by: Jianing Ren <jianing.ren@rock-chips.com>
2020-06-24 18:59:01 +08:00
Jianing Ren
d65989c056 phy: phy-rockchip-naneng-usb2: add low power function for rv1126
By bypass charge detect module, about 140uA current can be saved
on USB_AVDD_1V8 power supply when suspend. Notice that bandgap
current can not be turned off, so there is still about 165uA
current.

This patch also remove the tuning in phy resuming, because the power
of phy is always on and registers does not need to be configured
again.

Change-Id: If13d3741e3b01289c1bd0294d6e6d88278c4654c
Signed-off-by: Jianing Ren <jianing.ren@rock-chips.com>
2020-06-24 18:59:01 +08:00
Jianing Ren
65b48186c4 phy: phy-rockchip-naneng-usb2: cancel the dynamic management of clks
This patch remove the clks manegement in phy operations and keep the
clks always on. Keep the clks on can avoid many errors such as USB480M
clk abnormal output and EHCI controller error.

Change-Id: If201106d432d05e8fc5f63d595a67524e2183b5c
Signed-off-by: Jianing Ren <jianing.ren@rock-chips.com>
2020-06-24 18:59:01 +08:00
Andy Yan
bc592f16c7 drm/rockchip: rv1126: Fix vop version number
According to VOP_VERSION register on rv1126, the
major is 0x2, minor is 0x0b.

Change-Id: Ie8f3a91d839bcd042a655881302e9b43f6f297d5
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
2020-06-24 14:49:51 +08:00
Wu Liangqing
015331f133 arm64: dts: rockchip: add px30-evb-ddr3-v11 board
Change-Id: I5aec5cb43ad000bc51b79ff26c9ac0f018855aaa
Signed-off-by: Wu Liangqing <wlq@rock-chips.com>
2020-06-24 11:42:06 +08:00
Ding Wei
d5819f757d ARM: dts: rockchip: rk3288 add clk-rates setting for vdpu and rkvdec
Change-Id: Ibd695ef470c40829a348c660dd94de3f6a2b320c
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
2020-06-24 11:33:19 +08:00
Ding Wei
e21d349ac8 arm64: dts: rockchip: rk3368 add clk-rates setting for vdpu and rkvdec
Change-Id: Ibe2411fc99892981bb6c1af16187f646aa018a1e
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
2020-06-24 11:32:46 +08:00
Ding Wei
bcdfd733fa video: rockchip: mpp: clock relative code refactoring
1. read clock setting using the common code from dtsi.
2. clock enable/disable, all devices using the same function.
3. clock frequency set to two levels: normal and advanced.
4. according to specific requirements, the frequency is set
   level instead of the value.

Change-Id: Idcf8e0f49987df20f3eb2574aff316e507f82cfe
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
2020-06-24 11:28:56 +08:00
Ding Wei
08c8b2fbdd video: rockchip: mpp: rename functions in mpp_hw_ops
mpp_hw_ops->power_on -> mpp_hw_ops->clk_on
mpp_hw_ops->power_off -> mpp_hw_ops->clk_off

Change-Id: I65a5eb27a4a65512caa7bc184b63e6ae43e98043
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
2020-06-24 09:21:39 +08:00
Ding Wei
50d39fff2e video: rockchip: mpp: remove parameter session_max_buffer_debug
Change-Id: Id5bf9912a454684f0074e8d42d7005351c95c7c7
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
2020-06-24 09:09:25 +08:00
Ding Wei
7c8b4804d6 video: rockchip: mpp: adjust the scope of debugfs relative code
Change-Id: Ief1bbbfc3712c38f9cf3e2468db0eb8fc5410d3f
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
2020-06-24 09:08:57 +08:00
shengfei Xu
3915fb8f88 mfd: rk808: update rk817 volatile reg range
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Change-Id: Ifeb89255a2e98d4d2af92b83726017c2f75ebc92
2020-06-24 09:03:15 +08:00
shengfei Xu
ceffd1ad98 mfd: rk808: modify the sequence of the sleep pin function and polarity
The sequence of operations is as follows:
1. disable the sleep pin function
2. modify the sleep pin polarity
3. delay 3 32k clock cycle
4. select the sleep pin function

Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Change-Id: If6df2b2f190951abe9bb31fbd18d9af47e145038
2020-06-24 09:03:15 +08:00
Wu Liangqing
26de57fe61 arm64: dts: rk3368a-817-tablet: adaptive bnd board
Change-Id: I46ae95deff7308fd2a386aa20558563c45eff6b6
Signed-off-by: Wu Liangqing <wlq@rock-chips.com>
2020-06-24 08:59:46 +08:00
Simon Xue
a4318b7d29 iommu: rockchip: Add support iommu v2
Change-Id: I82dcbf5b9d24bd82d6127558c264226b32e7a7bd
Signed-off-by: Simon Xue <xxm@rock-chips.com>
2020-06-23 16:22:35 +08:00
Elaine Zhang
1963c05e82 ARM: dts: rv1126: add otp info for tsadc
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Change-Id: Ie9be2e9dad96cc96543cd94e5eb1c8a3b83e6e0a
2020-06-23 15:38:08 +08:00
Elaine Zhang
bc48adbe38 thermal: rockchip: add tsadc calibration for rv1126 soc
Get the calibration parameters for each chip by reading the OTP,
Calculate temperature using calibration parameters.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Change-Id: I05cfb65ae95dcefc7fc52ed91326c7da9d27de55
2020-06-23 15:38:08 +08:00
Wu Liangqing
f8aefe8f0d arm64: dts: rockchip: Add rk3368a tablet dts
rk3368a-817-tablet-bnd
rk3368a-817-tablet

Change-Id: I04f44360c98e2f3bcca99c56f16ebf4ee5b841e8
Signed-off-by: Wu Liangqing <wlq@rock-chips.com>
2020-06-23 15:05:29 +08:00
Wyon Bi
c105f787c1 arm64: dts: rockchip: rk3399-android: Add default port link for dsi
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: Ib6ed042666910f62c75e9a1ab76fff0001753b88
2020-06-23 14:49:38 +08:00
Wyon Bi
e555855b35 arm64: dts: rockchip: px30-android: Add default port link for dsi
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: Ie46aa51fe07443bdd3c0414fccb3406cbb2aabd7
2020-06-23 14:49:38 +08:00
Wyon Bi
c1af8c024e arm64: dts: rockchip: Remove unused rk3326-w7 board dts
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I1a95c8ed23d23275f5a6ea3cb707725429fab85d
2020-06-23 14:49:38 +08:00
Wyon Bi
6ff2906201 ARM: dts: rockchip: rk3288-android: Add default port link for dsi
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I2b652f0a3661e155bc4aaebee872c9572e536627
2020-06-23 14:49:38 +08:00
Wyon Bi
81f597fb5c ARM: dts: rockchip: rk312x-android: Add default port link for dsi
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I545a966ed887ae1cfb08f90eaceca749f34c1bf2
2020-06-23 14:49:38 +08:00
Shunhua Lan
7ba9790a40 ASoC: rockchip: rk817-codec: add route config for L to ClassD and R to HPR
Signed-off-by: Shunhua Lan <lsh@rock-chips.com>
Change-Id: Ie3ebf144d622a2219716221bae6db616ea9a7aa2
2020-06-23 14:45:53 +08:00
Algea Cao
4132c41827 arm64: rockchip_defconfig: enable rk1000
add mfd rk1000-core and drm bridge rk1000-tve.

Change-Id: I0c030f2f90eab1242af44c39bea1af7a1870f3fe
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
2020-06-22 19:15:50 +08:00
Algea Cao
ef52649124 drm/bridge: support rk1000 tv encoder
RK1000 is a digital-analog mixed chip which has tve output function.
RK1000's registers can be written and read through I2C interaface.
Because RK1000's I2C need dclk and mclk, RK1000 TVE should be registered
after RK1000 CORE.

Change-Id: I65b40826bd1dbf07d4fa94ecdf8c75005008731f
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
2020-06-22 19:11:37 +08:00
William Wu
69c4c922be ARM: configs: disable UAC1 UAC2 UVC and RNDIS for rv1126-evb-ddr3-v10-tb.config
This patch disable USB Gadget functions UAC1/UAC2/UVC/RNDIS,
and only support F_FS for ADB.

Change-Id: If04bb18f9c620299dde4b2452e418e63badeec12
Signed-off-by: William Wu <william.wu@rock-chips.com>
2020-06-22 18:52:44 +08:00
Tao Huang
ddf1750043 soc: rockchip: thunderboot_mmc: Probe driver early
By create device early.

Change-Id: I80d574d9d0d196cf6fbd4dcce9f595b6cc230606
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2020-06-22 18:48:26 +08:00
Tao Huang
a6c9add575 soc: rockchip: decompress: Probe driver early
By create device early.

Change-Id: Id9071bf5f988958b1604a5066f7b99e67abc0675
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2020-06-22 18:48:26 +08:00
Tao Huang
ab3221eae8 nvmem: core: Call nvmem_init() early when CONFIG_ROCKCHIP_THUNDER_BOOT=y
rockchip_otp_module_init() depends on nvmem_init() to init nvmem_bus_type.
But rockchip_otp_module_init() and nvmem_init() are both in the same
subsys_initcall level.

Change-Id: I58bc66519fb76179be3e6a170048a67c0861b224
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2020-06-22 18:48:26 +08:00
Wyon Bi
1b0ad3ab86 arm64: dts: rockchip: rk3368-android: Add default port link for dsi
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I72109bc00c177318eff94212363566902020cec1
2020-06-22 17:19:51 +08:00
Yifeng Zhao
93979fb7e0 soc: rockchip: mtd_vendor_storage: fix issue data structure not align to 4KB
The size of vendor_info need align to 4KB and compatible with uboot.

Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I16ae2cf5c976032e944bfb590d38ec89831f9b2f
2020-06-22 16:02:43 +08:00
Cai YiWei
df4424d974 media: rockchip: isp: fix dmarx iommu error
dmarx isr is unreliable, using MI frame end to replace it

Change-Id: Iabb4f405aedf3e81995d009ce2f4bddce2d12ed3
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
2020-06-22 16:01:51 +08:00
Finley Xiao
6d419c0c10 video: rockchip: mpp: rkvenc: register cooling device
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I6d802a97abe35d94039471161466868bfdf0d113
2020-06-22 14:32:55 +08:00
Nickey Yang
abb2f8fc45 media: i2c: os04a10: fix power on sequence
1.The reset signal is directly controlled by GPIO,
so there is no need to wait for the delay of RC circuit

2.Correct the level setting of reset signal

Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
Change-Id: I808a7ba13f23f630d1ab9d11c54cb33a1e85123c
2020-06-22 14:08:02 +08:00
Tao Huang
6e63958128 Input: sensor-dev - Fix warning
drivers/input/sensors/sensor-dev.c:1600:5: warning:
no previous prototype for 'sensor_probe' [-Wmissing-prototypes]

drivers/input/sensors/sensor-dev.c:1854:3: warning:
this statement may fall through [-Wimplicit-fallthrough=]

drivers/input/sensors/sensor-dev.c:1857 sensor_probe() warn:
missing break? reassigning 'sensor->input_dev->name'

drivers/input/sensors/sensor-dev.c:1602:30: warning:
Value stored to 'sensor' during its initialization is never read

drivers/input/sensors/sensor-dev.c:504:3: warning:
Value stored to 'result' is never read

Unneeded variable: "result". Return "0" on line 893
Unneeded variable: "result". Return "0" on line 908

Fixes: a32d316fcc ("driver: sensors: improve sensor driver to pass android vts test")
Change-Id: I95bdc5373694e0a78f9a29583a3138e14eae6126
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2020-06-19 21:44:51 +08:00