Commit Graph

793095 Commits

Author SHA1 Message Date
Mathieu Poirier
39e1830cfc UPSTREAM: coresight: tmc-etr: Introduce the notion of IDR to ETR devices
(Upstream commit c5ff734462).

In CPU-wide scenarios with an N:1 source/sink topology, sources share
the same sink.  In order to reuse the same sink for all sources an
IDR is needed to archive events that have already been accounted for.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Tested-by: Leo Yan <leo.yan@linaro.org>
Tested-by: Robert Walker <robert.walker@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Bug: 140266694
Change-Id: I09fb662438059a858e4208cbb065bee3b1181d94
Signed-off-by: Yabin Cui <yabinc@google.com>
2019-11-06 14:05:03 -08:00
Mathieu Poirier
e6bc81eab3 UPSTREAM: coresight: tmc-etr: Introduce the notion of reference counting to ETR devices
(Upstream commit 57549999b9).

This patch adds reference counting to struct etr_buf so that, in CPU-wide
trace scenarios, shared buffers can be disposed of when no longer used.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Tested-by: Leo Yan <leo.yan@linaro.org>
Tested-by: Robert Walker <robert.walker@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Bug: 140266694
Change-Id: Iafb13f87406b27ac592b79f09ee69e542d014b48
Signed-off-by: Yabin Cui <yabinc@google.com>
2019-11-06 14:05:03 -08:00
Mathieu Poirier
55df09d490 UPSTREAM: coresight: tmc-etr: Introduce the notion of process ID to ETR devices
(Upstream commit ef848e463a).

In preparation to support CPU-wide trace scenarios, introduce the notion
of process ID to ETR devices.  That way events monitoring the same process
can use the same etr_buf, allowing multiple CPUs to use the same sink.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Tested-by: Leo Yan <leo.yan@linaro.org>
Tested-by: Robert Walker <robert.walker@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Bug: 140266694
Change-Id: Ifed721da1237126c7196ccfd25477aa843bb8760
Signed-off-by: Yabin Cui <yabinc@google.com>
2019-11-06 14:05:03 -08:00
Mathieu Poirier
d8b599598b UPSTREAM: coresight: tmc-etr: Create per-thread buffer allocation function
(Upstream commit e553a8aef4).

Buffer allocation is different when dealing with per-thread and
CPU-wide sessions.  In preparation to support CPU-wide trace scenarios
simplify things by keeping allocation functions for both type separate.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Tested-by: Leo Yan <leo.yan@linaro.org>
Tested-by: Robert Walker <robert.walker@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Bug: 140266694
Change-Id: I179e4886236b0b91ae6a03d2d8cf1275814ed5ea
Signed-off-by: Yabin Cui <yabinc@google.com>
2019-11-06 14:05:03 -08:00
Mathieu Poirier
9cb983e9e8 UPSTREAM: coresight: tmc-etr: Refactor function tmc_etr_setup_perf_buf()
(Upstream commit 855ab61c16).

Refactoring function tmc_etr_setup_perf_buf() so that it only deals
with the high level etr_perf_buffer, leaving the allocation of the
backend buffer (i.e etr_buf) to another function.

That way the backend buffer allocation function can decide if it wants
to reuse an existing buffer (CPU-wide trace scenarios) or simply create
a new one.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Tested-by: Leo Yan <leo.yan@linaro.org>
Tested-by: Robert Walker <robert.walker@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Bug: 140266694
Change-Id: Ib95330a4905fbe3fc1eb3cb3c25e2f4648ba02c8
Signed-off-by: Yabin Cui <yabinc@google.com>
2019-11-06 14:05:03 -08:00
Mathieu Poirier
d8a82c60dc UPSTREAM: coresight: Communicate perf event to sink buffer allocation functions
(Upstream commit a0f08a6a9f).

Make struct perf_event available to sink buffer allocation functions in
order to use the pid they carry to allocate and free buffer memory along
with regimenting access to what source a sink can collect data for.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Tested-by: Leo Yan <leo.yan@linaro.org>
Tested-by: Robert Walker <robert.walker@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Bug: 140266694
Change-Id: I977c7ccfb5d02946bc177409191d1ab4e86e41dc
Signed-off-by: Yabin Cui <yabinc@google.com>
2019-11-06 14:05:03 -08:00
Mathieu Poirier
76e72557eb UPSTREAM: coresight: perf: Refactor function free_event_data()
(Upstream commit f5200aa983).

Function free_event_data() is already busy and is bound to become
worse with the addition of CPU-wide trace scenarios.  As such spin
off a new function to strickly take care of the sink buffers.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Tested-by: Leo Yan <leo.yan@linaro.org>
Tested-by: Robert Walker <robert.walker@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Bug: 140266694
Change-Id: I7ed7be5f783cb9814ab3e0d760ca3501e53dbd3d
Signed-off-by: Yabin Cui <yabinc@google.com>
2019-11-06 14:05:03 -08:00
Mathieu Poirier
f9da6dd8cb UPSTREAM: coresight: perf: Clean up function etm_setup_aux()
(Upstream commit 02d5c897a0).

There is no point in allocating sink memory for a trace session if
there is not a way to free it once it is no longer needed.  As such make
sure the sink API function to allocate and free memory have been
implemented before moving ahead with the establishment of a trace
session.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Tested-by: Leo Yan <leo.yan@linaro.org>
Tested-by: Robert Walker <robert.walker@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Bug: 140266694
Change-Id: Ibfb1d9f2c47e4fb47091b2d9f2ca4c43acb4eb27
Signed-off-by: Yabin Cui <yabinc@google.com>
2019-11-06 14:05:03 -08:00
Mathieu Poirier
0efc646aa8 UPSTREAM: coresight: Properly address concurrency in sink::update() functions
(Upstream commit 0916447c87).

When operating in CPU-wide trace scenarios and working with an N:1
source/sink HW topology, update() functions need to be made atomic
in order to avoid racing with start and stop operations.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Tested-by: Leo Yan <leo.yan@linaro.org>
Tested-by: Robert Walker <robert.walker@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Bug: 140266694
Change-Id: If16c146cc4721acc005c7db3d88e57d38fe48ece
Signed-off-by: Yabin Cui <yabinc@google.com>
2019-11-06 14:05:03 -08:00
Mathieu Poirier
14b9467147 UPSTREAM: coresight: Properly address errors in sink::disable() functions
(Upstream commit 12dfc9e022).

When disabling a sink the reference counter ensures the operation goes
through if nobody else is using it.  As such if drvdata::mode is already
set do CS_MODE_DISABLED, it is an error and should be reported as such.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Tested-by: Leo Yan <leo.yan@linaro.org>
Tested-by: Robert Walker <robert.walker@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Bug: 140266694
Change-Id: I541bfb6a7ae067b5327b8e76f700155f31b942ba
Signed-off-by: Yabin Cui <yabinc@google.com>
2019-11-06 14:05:03 -08:00
Mathieu Poirier
22611bfef6 UPSTREAM: coresight: Move reference counting inside sink drivers
(Upstream commit f973d88b75).

When operating in CPU-wide mode with an N:1 source/sink HW topology,
multiple CPUs can access a sink concurrently.  As such reference counting
needs to happen when the device's spinlock is held to avoid racing with
other operations (start(), update(), stop()), such as:

session A                               Session B
-----                                   -------

enable_sink
atomic_inc(refcount)  = 1

...

atomic_dec(refcount) = 0                enable_sink
if (refcount == 0) disable_sink
atomic_inc()

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Tested-by: Leo Yan <leo.yan@linaro.org>
Tested-by: Robert Walker <robert.walker@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Bug: 140266694
Change-Id: Ia8dd776ddfb0576e62e44c556490b61defd4724c
Signed-off-by: Yabin Cui <yabinc@google.com>
2019-11-06 14:05:03 -08:00
Mathieu Poirier
7fb9382987 UPSTREAM: coresight: Adding return code to sink::disable() operation
(Upstream commit 6c817a95d8).

In preparation to handle device reference counting inside of the sink
drivers, add a return code to the sink::disable() operation so that
proper action can be taken if a sink has not been disabled.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Tested-by: Leo Yan <leo.yan@linaro.org>
Tested-by: Robert Walker <robert.walker@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Bug: 140266694
Change-Id: I85b7b561b9ebd53dab55ba730af16209f4302e8e
Signed-off-by: Yabin Cui <yabinc@google.com>
2019-11-06 14:05:03 -08:00
Mathieu Poirier
3d4d5bb728 UPSTREAM: coresight: etm4x: Configure tracers to emit timestamps
(Upstream commit a54e14f810).

Configure timestamps to be emitted at regular intervals in the trace
stream to temporally correlate instructions executed on different CPUs.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Tested-by: Leo Yan <leo.yan@linaro.org>
Tested-by: Robert Walker <robert.walker@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Bug: 140266694
Change-Id: Ic246074d6f89e8b3bab25d559ccfdee99c1fdc69
Signed-off-by: Yabin Cui <yabinc@google.com>
2019-11-06 14:05:03 -08:00
Mathieu Poirier
3e93855282 UPSTREAM: coresight: etm4x: Skip selector pair 0
(Upstream commit 8013f32a1b).

Resource selector pair 0 is always implemented and reserved.  As such
it should not be explicitly programmed.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Tested-by: Leo Yan <leo.yan@linaro.org>
Tested-by: Robert Walker <robert.walker@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Bug: 140266694
Change-Id: I1cb310ecc59adf849980c5cb757e8f8032f5ba35
Signed-off-by: Yabin Cui <yabinc@google.com>
2019-11-06 14:05:02 -08:00
Mathieu Poirier
5351ad941a UPSTREAM: coresight: etm4x: Add kernel configuration for CONTEXTID
(Upstream commit 82500a810e).

Set the proper bit in the configuration register when contextID tracing
has been requested by user space.  That way PE_CONTEXT elements are
generated by the tracers when a process is installed on a CPU.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Tested-by: Leo Yan <leo.yan@linaro.org>
Tested-by: Robert Walker <robert.walker@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Bug: 140266694
Change-Id: I6a36134c7c162c9e4e8efa164b31b03e373e4dae
Signed-off-by: Yabin Cui <yabinc@google.com>
2019-11-06 14:05:02 -08:00
Mathieu Poirier
36e1605dad UPSTREAM: coresight: pmu: Adding ITRACE property to cs_etm PMU
(Upstream commit 6fcdba33ab).

Add to the capabilities the ITRACE property so that ITRACE START events
are generated when the PMU is switched on by the core.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Tested-by: Leo Yan <leo.yan@linaro.org>
Tested-by: Robert Walker <robert.walker@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Bug: 140266694
Change-Id: I0531b3e2843eef4f5c594a65b699ec3988b2f4bc
Signed-off-by: Yabin Cui <yabinc@google.com>
2019-11-06 14:05:02 -08:00
Suzuki K Poulose
cb8a9fac5e UPSTREAM: coresight: tmc: Cleanup power management
(Upstream commit 263556950f).

Drop the power only if we were successful in probing the device.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Bug: 140266694
Change-Id: I2ee34b0d1a344255fe2d3250d5f8c0cf1ee71e2c
Signed-off-by: Yabin Cui <yabinc@google.com>
2019-11-06 14:05:02 -08:00
Suzuki K Poulose
1e421be19d UPSTREAM: coresight: Fix freeing up the coresight connections
(Upstream commit 1b015ef28a).

With commit c2c729415b ("coresight: platform: Cleanup coresight
connection handling"), we switched to re-using coresight_connections
for the coresight_device. However, that introduced a mismatch in the
alloc/free of the connections. The allocation is made using devm_*,
while we use kfree() to release the memory when a device is released
(even though we don't support this at the moment). Fix this by leaving
it to the automatic freeing of the memory.

Fixes: c2c729415b ("coresight: platform: Cleanup coresight connection handling")
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Bug: 140266694
Change-Id: If5226ef45073cc1a450d3e98fc1f91f9ed86a2f4
Signed-off-by: Yabin Cui <yabinc@google.com>
2019-11-06 14:05:02 -08:00
Suzuki K Poulose
3f2c1cc5e3 UPSTREAM: coresight: tmc: Report DMA setup failures
(Upstream commit 08be874775).

If we failed to setup the DMA mask for TMC-ETR, report the
error before failing the probe.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Bug: 140266694
Change-Id: I4567bb57138de35f2b7383edc58a944cf9cc8098
Signed-off-by: Yabin Cui <yabinc@google.com>
2019-11-06 14:05:02 -08:00
Arnd Bergmann
25a0dd6744 UPSTREAM: coresight: catu: fix clang build warning
(Upstream commit 59d63de076).

Clang points out a syntax error, as the etr_catu_buf_ops structure is
declared 'static' before the type is known:

In file included from drivers/hwtracing/coresight/coresight-tmc-etr.c:12:
drivers/hwtracing/coresight/coresight-catu.h:116:40: warning: tentative definition of variable with internal linkage has incomplete non-array type 'const struct etr_buf_operations' [-Wtentative-definition-incomplete-type]
static const struct etr_buf_operations etr_catu_buf_ops;
^
drivers/hwtracing/coresight/coresight-catu.h:116:21: note: forward declaration of 'struct etr_buf_operations'
static const struct etr_buf_operations etr_catu_buf_ops;

This seems worth fixing in the code, so replace pointer to the empty
constant structure with a NULL pointer. We need an extra NULL pointer
check here, but the result should be better object code otherwise,
avoiding the silly empty structure.

Fixes: 434d611cdd ("coresight: catu: Plug in CATU as a backend for ETR buffer")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
[Fixed line over 80 characters]
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Bug: 140266694
Change-Id: I752f581e5e26c907d7ccb66669e3b582cf0502da
Signed-off-by: Yabin Cui <yabinc@google.com>
2019-11-06 14:05:02 -08:00
Alexander Shishkin
bdc1e2cb66 UPSTREAM: perf/core: Fix the address filtering fix
(Upstream commit 52a44f83fc).

The following recent commit:

c60f83b813 ("perf, pt, coresight: Fix address filters for vmas with non-zero offset")

changes the address filtering logic to communicate filter ranges to the PMU driver
via a single address range object, instead of having the driver do the final bit of
math.

That change forgets to take into account kernel filters, which are not calculated
the same way as DSO based filters.

Fix that by passing the kernel filters the same way as file-based filters.
This doesn't require any additional changes in the drivers.

Reported-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Vince Weaver <vincent.weaver@maine.edu>
Fixes: c60f83b813 ("perf, pt, coresight: Fix address filters for vmas with non-zero offset")
Link: https://lkml.kernel.org/r/20190329091212.29870-1-alexander.shishkin@linux.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>

Bug: 140266694
Change-Id: I28472be39c9ee0f1157b51014880fc66926a39e7
Signed-off-by: Yabin Cui <yabinc@google.com>
2019-11-06 14:05:02 -08:00
Alexander Shishkin
93b9a8a987 UPSTREAM: perf, pt, coresight: Fix address filters for vmas with non-zero offset
(Upstream commit c60f83b813).

Currently, the address range calculation for file-based filters works as
long as the vma that maps the matching part of the object file starts
from offset zero into the file (vm_pgoff==0). Otherwise, the resulting
filter range would be off by vm_pgoff pages. Another related problem is
that in case of a partially matching vma, that is, a vma that matches
part of a filter region, the filter range size wouldn't be adjusted.

Fix the arithmetics around address filter range calculations, taking
into account vma offset, so that the entire calculation is done before
the filter configuration is passed to the PMU drivers instead of having
those drivers do the final bit of arithmetics.

Based on the patch by Adrian Hunter <adrian.hunter.intel.com>.

Reported-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Tested-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Acked-by: Peter Zijlstra <peterz@infradead.org>
Cc: Jiri Olsa <jolsa@redhat.com>
Fixes: 375637bc52 ("perf/core: Introduce address range filtering")
Link: http://lkml.kernel.org/r/20190215115655.63469-3-alexander.shishkin@linux.intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>

Bug: 140266694
Change-Id: I248219cff1573281196d455cf39d028b68ec17a7
Signed-off-by: Yabin Cui <yabinc@google.com>
2019-11-06 14:05:02 -08:00
Alexander Shishkin
547690a5ac UPSTREAM: perf: Copy parent's address filter offsets on clone
(Upstream commit 18736eef12).

When a child event is allocated in the inherit_event() path, the VMA
based filter offsets are not copied from the parent, even though the
address space mapping of the new task remains the same, which leads to
no trace for the new task until exec.

Reported-by: Mansour Alharthi <malharthi9@gatech.edu>
Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Tested-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Acked-by: Peter Zijlstra <peterz@infradead.org>
Cc: Jiri Olsa <jolsa@redhat.com>
Fixes: 375637bc52 ("perf/core: Introduce address range filtering")
Link: http://lkml.kernel.org/r/20190215115655.63469-2-alexander.shishkin@linux.intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>

Bug: 140266694
Change-Id: I14af7095b0712ee6fc427eafc3d3486f0fc1b07c
Signed-off-by: Yabin Cui <yabinc@google.com>
2019-11-06 14:05:02 -08:00
Mathieu Poirier
93b40c1d2e UPSTREAM: coresight: Use event attributes for sink selection
(Upstream commit b5390f4b5e).

This patch uses the information conveyed by perf_event::attr::config2
to select a sink to use for the session.  That way a sink can easily be
selected to be used by more than one source, something that isn't currently
possible with the sysfs implementation.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Bug: 140266694
Change-Id: I417e932b72445fd304624e493429c1e785985f1d
Signed-off-by: Yabin Cui <yabinc@google.com>
2019-11-06 14:05:02 -08:00
Mathieu Poirier
f60cc6bebb UPSTREAM: coresight: perf: Add "sinks" group to PMU directory
(Upstream commit 988036f9d3).

Add a "sinks" directory entry so that users can see all the sinks
available in the system in a single place.  Individual sink are added
as they are registered with the coresight bus.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Bug: 140266694
Change-Id: I11a0cdefd7cb71ca7463d11e8ed7d792d90cee65
Signed-off-by: Yabin Cui <yabinc@google.com>
2019-11-06 14:05:02 -08:00
Mathieu Poirier
3075152770 UPSTREAM: coresight: etb10: Add support for CLAIM tag
(Upstream commit acaf5a06b9).

Following in the footstep of what was done for other CoreSight devices,
add CLAIM tag support to ETB10 in order to synchronise access to the
HW between the kernel and an external agent.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Bug: 140266694
Change-Id: I35e83a66af545abbc7ea5fa303c2086f687a1f76
Signed-off-by: Yabin Cui <yabinc@google.com>
2019-11-06 14:05:02 -08:00
Suzuki K Poulose
cbb64784c0 UPSTREAM: coreisght: tmc: Claim device before use
(Upstream commit 4d3ebd3658).

Use CLAIM tags to make sure the device is available for use.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Bug: 140266694
Change-Id: I3f3ea1037e956a2f6e8235494d73d9d76581749f
Signed-off-by: Yabin Cui <yabinc@google.com>
2019-11-06 14:05:02 -08:00
Suzuki K Poulose
e718162c33 UPSTREAM: coresight: dynamic-replicator: Claim device for use
(Upstream commit 4e33d69437).

Use CLAIM protocol to make sure the device is available for use.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Bug: 140266694
Change-Id: Iad04d371710f781287a530987b83e2c5317fd75d
Signed-off-by: Yabin Cui <yabinc@google.com>
2019-11-06 14:05:02 -08:00
Suzuki K Poulose
289179cb38 UPSTREAM: coresight: funnel: Claim devices before use
(Upstream commit f13d7c0835).

Use the CLAIM protocol to grab the ownership of the component.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Bug: 140266694
Change-Id: I9f5bf5e1502e03336c03db07f39ebc4379246eb3
Signed-off-by: Yabin Cui <yabinc@google.com>
2019-11-06 14:05:01 -08:00
Suzuki K Poulose
a972dbe7fb UPSTREAM: coresight: etmx: Claim devices before use
(Upstream commit 68a147752d).

Use the CLAIM tags to grab the device for self-hosted usage.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Bug: 140266694
Change-Id: Ieb98a7a68560a94b4d74b62206d4b530eb2cb008
Signed-off-by: Yabin Cui <yabinc@google.com>
2019-11-06 14:05:01 -08:00
Suzuki K Poulose
7757d73a7d UPSTREAM: coresight: Add support for CLAIM tag protocol
(Upstream commit 2478a6ae4a).

Coresight architecture defines CLAIM tags for a device to negotiate
control of the components (external agent vs self-hosted). Each device
has a pair of registers (CLAIMSET & CLAIMCLR) for managing the CLAIM
tags. However, the protocol for the CLAIM tags is IMPLEMENTATION DEFINED.
PSCI has recommendations for the use of the CLAIM tags to negotiate
controls for external agent vs self-hosted use. This patch implements
the recommended protocol by PSCI.

The claim/disclaim operations are performed from the device specific
drivers. The disadvantage is that the calls are sprinkled in each driver,
but this makes the operation much simpler.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Bug: 140266694
Change-Id: I1956110ec9822cfd9ac279a0dcddcaf8b90b7f37
Signed-off-by: Yabin Cui <yabinc@google.com>
2019-11-06 14:05:01 -08:00
Suzuki K Poulose
297602b19f UPSTREAM: coresight: dynamic-replicator: Handle multiple connections
(Upstream commit 30af4fb619).

When a replicator port is enabled, we block the traffic
on the other port and route all traffic to the new enabled
port. If there are two active trace sessions each targeting
the two different paths from the replicator, the second session
will disable the first session and route all the data to the
second path.
ETR
/
e.g, replicator
\
ETB

If CPU0 is operated in sysfs mode to ETR and CPU1 is operated
in perf mode to ETB, depending on the order in which the
replicator is enabled one device is blocked.

Ideally we need trace-id for the session to make the
right choice. That implies we need a trace-id allocation
logic for the coresight subsystem and use that to route
the traffic. The short term solution is to only manage
the "target port" and leave the other port untouched.
That leaves both the paths unaffected, except that some
unwanted traffic may be pushed to the paths (if the Trace-IDs
are not far enough), which is still fine and can be filtered
out while processing rather than silently blocking the data.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Bug: 140266694
Change-Id: I3804e95a76ad9b0d9d28ab0f0f36f090670d0da7
Signed-off-by: Yabin Cui <yabinc@google.com>
2019-11-06 14:05:01 -08:00
Suzuki K Poulose
ca5ddfab1d UPSTREAM: coresight: etb10: Handle errors enabling the device
(Upstream commit 62563e84a8).

Prepare the etb10 driver to return errors in enabling
the device.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Bug: 140266694
Change-Id: I7b94e65c3587857a290a89b65ca9a5f0348474a5
Signed-off-by: Yabin Cui <yabinc@google.com>
2019-11-06 14:05:01 -08:00
Suzuki K Poulose
a3266c2141 UPSTREAM: coresight: etm3: Add support for handling errors
(Upstream commit e2a1551a88).

Add support for reporting errors back from the SMP cross
function call for enabling ETM.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Bug: 140266694
Change-Id: Iec7569e4199469e7304c79be7b7eef123458d310
Signed-off-by: Yabin Cui <yabinc@google.com>
2019-11-06 14:05:01 -08:00
Suzuki K Poulose
3ec81bf2b3 UPSTREAM: coresight: etm4x: Add support for handling errors
(Upstream commit e006d89abe).

Add support for handling errors in enabling the component.
The ETM is enabled via cross call to owner CPU. Make
necessary changes to report the error back from the cross
call.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Bug: 140266694
Change-Id: I8a54186df77720d2d4d573e269ed961695593a4f
Signed-off-by: Yabin Cui <yabinc@google.com>
2019-11-06 14:05:01 -08:00
Suzuki K Poulose
a1cca3695d UPSTREAM: coresight: tmc-etb/etf: Prepare to handle errors enabling
(Upstream commit 1d364034aa).

Prepare to handle errors in enabling the hardware and
report it back to the core driver.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Bug: 140266694
Change-Id: I4e6d7de11cee8651e91d5c52495d5079bf221022
Signed-off-by: Yabin Cui <yabinc@google.com>
2019-11-06 14:05:01 -08:00
Suzuki K Poulose
b1da8a2071 UPSTREAM: coresight: tmc-etr: Handle errors enabling CATU
(Upstream commit 1c7995e11c).

Make sure we honor the errors in CATU device and abort the operation.
While at it, delay setting the etr_buf for the session until we are
sure that we are indeed enabling the ETR.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Bug: 140266694
Change-Id: I8115bff427d9d4b5755a0d7e84ab53de76bdc83a
Signed-off-by: Yabin Cui <yabinc@google.com>
2019-11-06 14:05:01 -08:00
Suzuki K Poulose
2d44cc189b UPSTREAM: coresight: tmc-etr: Refactor for handling errors
(Upstream commit 6276f9cba5).

Refactor the tmc-etr enable operation to make it easier to
handle errors in enabling the hardware. We need to make
sure that the buffer is compatible with the ETR. This
patch re-arranges to make the error handling easier, by
deferring the hardware enablement until all the errors
are checked. This also avoids turning the CATU on/off
during a sysfs read session.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Bug: 140266694
Change-Id: If37267ec025df465507bf9e592a512058579914d
Signed-off-by: Yabin Cui <yabinc@google.com>
2019-11-06 14:05:01 -08:00
Suzuki K Poulose
ba7f8c6650 UPSTREAM: coresight: Handle failures in enabling a trace path
(Upstream commit b9866bb168).

coresight_enable_path() enables the components in a trace
path from a given source to a sink, excluding the source.
The operation is performed in the reverse order; the sink
first and then backwards in the list. However, if we encounter
an error in enabling any of the component, we simply disable
all the components in the given path irrespective of whether
we enabled some of the components in the enable iteration.
This could interfere with another trace session if one of the
link devices is turned off (e.g, TMC-ETF). So, we need to
make sure that we only disable those components which were
actually enabled from the iteration.

This patch achieves the same by refactoring the coresight_disable_path
to accept a "node" to start from in the forward order, which can
then be used from the error path of coresight_enable_path().
With this change, we don't issue a disable call back for a component
which didn't get enabled. This change of behavior triggers
a bug in coresight_enable_link(), where we leave the refcount
on the device and will prevent the device from being enabled
forever. So, we also drop the refcount in the coresight_enable_link()
if the operation failed.

Also, with the refactoring, we always start after the first node (which
is the "SOURCE" device) for disabling the entire path. This implies,
we must not find a "SOURCE" in the middle of the path. Hence, added
a WARN_ON() to make sure the paths we get are sane, rather than
simply ignoring them.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Bug: 140266694
Change-Id: I09b76e9890d01b763df14ce701dd6f4a60d06b40
Signed-off-by: Yabin Cui <yabinc@google.com>
2019-11-06 14:05:01 -08:00
Leo Yan
ffcb39cca6 UPSTREAM: coresight: tmc: Fix byte-address alignment for RRP
(Upstream commit e7753f3937).

>From the comment in the code, it claims the requirement for byte-address
alignment for RRP register: 'for 32-bit, 64-bit and 128-bit wide trace
memory, the four LSBs must be 0s. For 256-bit wide trace memory, the
five LSBs must be 0s'.  This isn't consistent with the program, the
program sets five LSBs as zeros for 32/64/128-bit wide trace memory and
set six LSBs zeros for 256-bit wide trace memory.

After checking with the CoreSight Trace Memory Controller technical
reference manual (ARM DDI 0461B, section 3.3.4 RAM Read Pointer
Register), it proves the comment is right and the program does wrong
setting.

This patch fixes byte-address alignment for RRP by following correct
definition in the technical reference manual.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Bug: 140266694
Change-Id: I57465984b4558721df1e3eed0268698f518e1938
Signed-off-by: Yabin Cui <yabinc@google.com>
2019-11-06 14:05:01 -08:00
Tomasz Nowicki
e62d98db42 UPSTREAM: coresight: etm4x: Configure EL2 exception level when kernel is running in HYP
(Upstream commit b860801e32).

For non-VHE systems host kernel runs at EL1 and jumps to EL2 whenever
hypervisor code should be executed. In this case ETM4x driver must
restrict configuration to EL1 when it setups kernel tracing.
However, there is no separate hypervisor privilege level when VHE
is enabled, the host kernel runs at EL2.

This patch fixes configuration of TRCACATRn register for VHE systems
so that ETM_EXLEVEL_NS_HYP bit is used instead of ETM_EXLEVEL_NS_OS
to on/off kernel tracing. At the same time, it moves common code
to new helper.

Signed-off-by: Tomasz Nowicki <tnowicki@caviumnetworks.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Bug: 140266694
Change-Id: Id058f827c83e767e2b859a4bf55b3245c3b2f197
Signed-off-by: Yabin Cui <yabinc@google.com>
2019-11-06 14:05:01 -08:00
Mathieu Poirier
318920ee66 UPSTREAM: coresight: etb10: Splitting function etb_enable()
(Upstream commit d4989fe886).

Up until now the relative simplicity of enabling the ETB made it
possible to accommodate processing for both sysFS and perf methods.
But work on claimtags and CPU-wide trace scenarios is adding some
complexity, making the current code messy and hard to maintain.

As such follow what has been done for ETF and ETR components and split
function etb_enable() so that processing for both API can be done
cleanly.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Bug: 140266694
Change-Id: Ib4676804e79d034d29fe8623944bc58e0c5db4a7
Signed-off-by: Yabin Cui <yabinc@google.com>
2019-11-06 14:05:00 -08:00
Mathieu Poirier
8f9377ddc1 UPSTREAM: coresight: etb10: Refactor etb_drvdata::mode handling
(Upstream commit d43b8ec599).

This patch moves the etb_drvdata::mode from a locat_t to a simple u32,
as it is for the ETF and ETR drivers.  This streamlines the code and adds
commonality with the other drivers when dealing with similar operations.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Bug: 140266694
Change-Id: I0f38579a632919a0eef37b9825a6cdf23a39b7cd
Signed-off-by: Yabin Cui <yabinc@google.com>
2019-11-06 14:05:00 -08:00
Suzuki K Poulose
834cb9c8a1 UPSTREAM: coresight: etm-perf: Add support for ETR backend
(Upstream commit 22f429f19c).

Add support for using TMC-ETR as backend for ETM perf tracing.
We use software double buffering at the moment. i.e, the TMC-ETR
uses a separate buffer than the perf ring buffer. The data is
copied to the perf ring buffer once a session completes.

The TMC-ETR would try to match the larger of perf ring buffer
or the ETR buffer size configured via sysfs, scaling down to
a minimum limit of 1MB.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Bug: 140266694
Change-Id: Iaac97ed6528768233bf66a82da9b3976571e4791
Signed-off-by: Yabin Cui <yabinc@google.com>
2019-11-06 14:05:00 -08:00
Suzuki K Poulose
39288d269e UPSTREAM: coresight: perf: Remove set_buffer call back
(Upstream commit 3d6e893575).

In coresight perf mode, we need to prepare the sink before
starting a session, which is done via set_buffer call back.
We then proceed to enable the tracing. If we fail to start
the session successfully, we leave the sink configuration
unchanged.  In order to make the operation atomic and to
avoid yet another call back to clear the buffer, we get
rid of the "set_buffer" call back and pass the buffer details
via enable() call back to the sink.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Bug: 140266694
Change-Id: I2a858def1342d0f06c5643f638cb6d5c49d70ccf
Signed-off-by: Yabin Cui <yabinc@google.com>
2019-11-06 14:05:00 -08:00
Suzuki K Poulose
97f329748f UPSTREAM: coresight: perf: Add helper to retrieve sink configuration
(Upstream commit d25054ee8d).

We can always find the sink configuration for a given perf_output_handle.
Add a helper to retrieve the sink configuration for a given
perf_output_handle. This will be used to get rid of the set_buffer()
call back.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Bug: 140266694
Change-Id: I0a9d8d9d8370fea5e4245697dca1e510d3f9438c
Signed-off-by: Yabin Cui <yabinc@google.com>
2019-11-06 14:05:00 -08:00
Suzuki K Poulose
08ecb258bc UPSTREAM: coresight: perf: Remove reset_buffer call back for sinks
(Upstream commit 7ec786ad19).

Right now we issue an update_buffer() and reset_buffer() call backs
in succession when we stop tracing an event. The update_buffer is
supposed to check the status of the buffer and make sure the ring buffer
is updated with the trace data. And we store information about the
size of the data collected only to be consumed by the reset_buffer
callback which always follows the update_buffer. This was originally
designed for handling future IPs which could trigger a buffer overflow
interrupt. This patch gets rid of the reset_buffer callback altogether
and performs the actions in update_buffer, making it return the size
collected. We can always add the support for handling the overflow
interrupt case later.

This removes some not-so pretty hack (storing the new head in the
size field for snapshot mode) and cleans it up a little bit.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Bug: 140266694
Change-Id: I5264db2e453909473b6ab5cb9ea0cba10091ff6e
Signed-off-by: Yabin Cui <yabinc@google.com>
2019-11-06 14:05:00 -08:00
Suzuki K Poulose
ab2a1487ec UPSTREAM: coresight: Convert driver messages to dev_dbg
(Upstream commit 41a75cdde7).

Convert component enable/disable messages from dev_info to dev_dbg.
When used with perf, the components in the paths are enabled/disabled
during each schedule of the run, which can flood the dmesg with these
messages. Moreover, they are only useful for debug purposes. So,
convert such messages to dev_dbg() which can be turned on as
needed.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Bug: 140266694
Change-Id: I44698c3c29b1d8cee3f2813a11dd5be1606e9ca3
Signed-off-by: Yabin Cui <yabinc@google.com>
2019-11-06 14:05:00 -08:00
Suzuki K Poulose
cdd97df049 UPSTREAM: coresight: tmc-etr: Relax collection of trace from sysfs mode
(Upstream commit cad5f8d399).

Since the ETR now uses mode specific buffers, we can reliably
provide the trace data captured in sysfs mode, even when the ETR
is operating in PERF mode.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Bug: 140266694
Change-Id: I2c4849f9664de698cba483c5ba897bce1f34e54b
Signed-off-by: Yabin Cui <yabinc@google.com>
2019-11-06 14:05:00 -08:00
Suzuki K Poulose
152fedd00f UPSTREAM: coresight: tmc-etr: Handle driver mode specific ETR buffers
(Upstream commit 96a7f64400).

Since the ETR could be driven either by SYSFS or by perf, it
becomes complicated how we deal with the buffers used for each
of these modes. The ETR driver cannot simply free the current
attached buffer without knowing the provider (i.e, sysfs vs perf).

To solve this issue, we provide:
1) the driver-mode specific etr buffer to be retained in the drvdata
2) the etr_buf for a session should be passed on when enabling the
hardware, which will be stored in drvdata->etr_buf. This will be
replaced (not free'd) as soon as the hardware is disabled, after
necessary sync operation.

The advantages of this are :

1) The common code path doesn't need to worry about how to dispose
an existing buffer, if it is about to start a new session with a
different buffer, possibly in a different mode.
2) The driver mode can control its buffers and can get access to the
saved session even when the hardware is operating in a different
mode. (e.g, we can still access a trace buffer from a sysfs mode
even if the etr is now used in perf mode, without disrupting the
current session.)

Towards this, we introduce a sysfs specific data which will hold the
etr_buf used for sysfs mode of operation, controlled solely by the
sysfs mode handling code.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Bug: 140266694
Change-Id: I8a85ab42cbf077ca803c633b3c35375117a35f85
Signed-off-by: Yabin Cui <yabinc@google.com>
2019-11-06 14:05:00 -08:00