This fixed some Rockchip SoCs just shared one irq with
all mailbox channels.
Change-Id: Ie78a3372b58ad20a20e75046aca379a2db65260f
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
This change amend the below features.
- Checked the mailbox channel status before send message.
- Used the con_priv variable to handle the channel private data.
- Added the spinlock cfg_lock to protect the register R/W.
- Optimized the interrupt handler can receive B2A message proactively.
Change-Id: If1939e51e821307788ab59dd4ef874a20a6568e2
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
The all cpus of big cluster will be closed when suspend, and cpu is
booted before thermal when resume, the cpu frequency and voltage will be
changed before thermal start, if the ambient temperature is low, the
voltage may not be enough, so this path set the initial state to low
temperature state and change the OPP Table before cpufreq start.
Change-Id: I37ae1086e05df4dc4391f80ce5cc25a22d217b4a
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
After change OPP Table according to temperature, the system monitor will
update current voltage, but the cpufreq also will change frequency and
voltage, so a lock should be add between system monitor and cpufreq.
If use interactive governor, policy->rwsem can be used. but if use
ondemand or conservative governor, there isn't a ready-made lock,
so this patch adds a new mutex lock to protect changing voltage.
Change-Id: I5fdad482261ac5c3624048d06b3e761f5abdc6c1
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
The system monitor may sill use regulator, clock and opp table before
unregister.
Change-Id: I8d5008808ba2b2290864b8c96121ba4c85fc09ac
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
On some platforms, the mathematical model of leakage-static power
curve is quadratic equation and the leakage has a range between a
minimum and maximum.
Change-Id: I1d5101b5e5897256e32fffab4210033214e7a532
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
1. Push task to session should be in front of push task to queue.
Otherwise, when mpp_task_finish finish and worker_thread call
mpp_task_try_run, it may be get a task who has push in queue but
not in session, cause some errors.
2. Mark running immediately avoid two session run at the same time.
3. Add mutex protect list_empty judge.
4. Merge mutex list_lock and mutex list.
5. Change session lock position out list_for_each_entry_safe.
log:
[34734.574134] list_add corruption. prev->next should be next (e8e8bd24), but was e9f2c804. (prev=e9f2c804).
[34734.574213] ------------[ cut here ]------------
[34734.575460] kernel BUG at lib/list_debug.c:28!
[34734.575858] Internal error: Oops - BUG: 0 [#1] PREEMPT SMP ARM
[34734.576376] Modules linked in: bcmdhd
[34734.576722] CPU: 1 PID: 10096 Comm: mpp_dec_parser Not tainted 4.19.80 #100
[34734.577339] Hardware name: Generic DT based system
[34734.577784] PC is at __list_add_valid+0x44/0x84
[34734.578202] LR is at __list_add_valid+0x44/0x84
Change-Id: I8503c3b01854f027527559a33607390ddfc1db01
Signed-off-by: Grey Li <grey.li@rock-chips.com>
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
sideband is a fast display path, this path bypass the surfaceflinger and
hwc, use DRM_IOCTL_MODE_SETPLANE directly show video to the panel.
Change-Id: I0b54d1d4b38505b0244d0c78f54b0d0f01c7dd37
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
The static-power related stuff had been removed by commit 84fe2cab48
(cpu_cooling: Drop static-power related stuff), but it will still be
used on some rockchip platforms with wide leakage range.
Change-Id: Iee293a6514e0a0407e2d2ab6c3089d6b6d55fd30
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Sometimes ts3 is a floating point value, so convert it to an integer
by multipliying by 10 in devicetree.
Change-Id: I3ac6f879e75927e1e551acbfba18148c993b5d26
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
The touch screen driver is for the new rk3368 evb board.
Change-Id: I213a461c956a219ae1969ac30dc23e587d3d723e
Signed-off-by: Wang Jie <dave.wang@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
This driver is for the new rk3368 evb board.
static global variable,solve compilation problems.
There are two ways to speed up system startup:
a.replace msleep() with usleep_range().
b.enable asynchronous probing.
Modify delay time.
- modify GSLX680_I2C_NAME:
before: gslx680 driver and gslx6801 driver have the same name,
causing the kernel to register gslx680 driver failed.
- add power control:
in gsl_ts_probe() enable power; in gsl_ts_remove disable power.
- fix for none pinctrl
- fix gslX680_ts_worker() error: buffer overflow 'key_x' 512 <= 512
Change-Id: I7d7ae9879397d1850e5cd1092fb2730f6d1fdf18
Signed-off-by: Wang Jie <dave.wang@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Set resolution to 4K when connect an HDMI2.0 monitor
will enable scrambler feature.
At this time, change to connect an hdmi1.4 monitor will
cause black screen because we do not set scrambler feature bypassed.
So fix this.
Change-Id: Ic14b683719c8234c316dc1cacaa62c72a38e0294
Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
to Improve signal compatibility disable scamble when tmdsclk less than
340Mhz by default. and can enable it by define "scramble-low-rates;"
in dts file.
Change-Id: I0bd5d8e2ea4df065d84018615d4c39cac7ac441a
Signed-off-by: xuhuicong <xhc@rock-chips.com>
1. The function init_timer_pinned() is removed, use timer_setup().
2. The function kstrtouint() can not work for read target_load, use sscanf().
3. The icpu->irq_work need work on corresponding cpu, so use irq_work_queue_on().
4. max_transition_latency is removed from struct interactive_governor in the new framework.
5. update sample time when idle notify call cpufreq_interactive_update().
Change-Id: I87eb1254e4af622689ede39a14f72bc01dd0b433
Signed-off-by: Liang Chen <cl@rock-chips.com>
https://lkml.org/lkml/2016/9/14/208
Interactive governor has lived in Android sources for a very long time
and this commit is based on the code present in following branch:
https://android.googlesource.com/kernel/common android-4.4
The Interactive governor is designed for latency-sensitive workloads,
such as interactive user interfaces like the mobile phones and tablets.
The interactive governor aims to be significantly more responsive to
ramp CPU quickly up when CPU-intensive activity begins.
Existing governors sample CPU load at a particular rate, typically every
X ms and then update the frequency from a work-handler. This can lead
to under-powering UI threads for the period of time during which the
user begins interacting with a previously-idle system until the next
sample period happens.
The 'interactive' governor uses a different approach.
A real-time thread is used for scaling up, giving the remaining tasks
the CPU performance benefit, unlike existing governors which are more
likely to schedule ramp-up work to occur after your performance starved
tasks have completed.
The Android version of interactive governor also checks whether to scale
the CPU frequency up soon after coming out of idle. When the CPU comes
out of idle, the governor check if the CPU sampling is overdue or not.
If yes, it immediately starts the sampling. Otherwise, the utilization
hooks from the scheduler handle the sampling later. If the CPU is very
busy from exiting idle to when the evaluation happens, then it assumes
that the CPU is under-powered and ramps it to MAX speed.
If the CPU was not sufficiently busy to immediately ramp to MAX speed,
then the governor evaluates the CPU load since the last speed
adjustment, choosing the highest value between that longer-term load or
the short-term load since idle exit to determine the CPU speed to ramp
to.
The core of this code is written and maintained (in Android
repositories) by Mike Chan and Todd Poyner over a long period of time.
Vireshk has made changes to to the governor to align it with the current
practices followed with mainline governors, like using utilization hooks
from the scheduler and handling kobject (for governor's sysfs directory)
in a race free manner. And of course this included general cleanup of
the governor as well.
Signed-off-by: Mike Chan <mike@android.com>
Signed-off-by: Todd Poynor <toddpoynor@google.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Change-Id: Ib5e8d1dab0fa3cc5ba79b7a554c8dde35435cbdb
[AmitP: Cherry-picked this version from
https://git.kernel.org/cgit/linux/kernel/git/vireshk/pm.git/log/?h=cpufreq/interactive-idle-notifier.
Also refactored and folded https://lkml.org/lkml/2016/9/14/209
patch into this unified patch.]
Signed-off-by: Amit Pundir <amit.pundir@linaro.org>
Signed-off-by: Liang Chen <cl@rock-chips.com>
(cherry picked from https://android.googlesource.com/kernel/msm
commit 33f7a05d4e82c81841af20e6a944a4c3f9b2973e)
When CPU idle is enabled, the idle call should also notify the
idle_notifier_call_chain of the change in status. Otherwise some
processes will think the CPU is always active.
CRs-Fixed: 677525
Change-Id: Iabd6f617d6835688cf8b482ac1321e5c1deafffd
Signed-off-by: Patrick Cain <pcain@codeaurora.org>
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
Signed-off-by: Liang Chen <cl@rock-chips.com>
(cherry picked from https://android.googlesource.com/kernel/msm
commit e7f65ab439125bdc29a7a0ca7345ff746d014119)
At present there was no check for the return status of pm_runtime_get_sync()
before assess the registers. That would return a failure, such as
-EAGAIN, -EBUSY, -EASSCES, and the access of registers without
enabling the clocks for the rng would trigger a bus exception and kernel
hang.
Change-Id: Id95361dd12ec6a4be2b70f386de721327cbb607c
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Background:
- EDP software register bank is on the EDP 24m clock domain;
- CPU access EDP software register bank, need to go through EDP APB
read/write bus and EDP internal read/write bus;
- EDP APB read/write bus is on the EDP pclk clock domain;
- EDP internal read/write bus is on the EDP 24m clock domain;
- Asynchronous logic circuit is added between APB read/write bus and
Internal read/write bus;
Issue:
There is a bug on the Asynchronous logic circuit between APB read/write
bus and Internal read/write bus; This bug will be random to cause the
following wrong control/address signals sequence happen;
- For write, maybe wrong register address is wrote in;
- For read, maybe wrong register address is read out;
Workaround:
- For CPU write EDP register operation, write any register need
following three steps,
1): Read EDP_BASE+0x00 dummy register firstly, latch the dummy
register address on Reg_Address bus, to avoid next step write to
wrong register to cause function register overrun;
2): 1st time to write the EDP register you want to operate,
to latch the real write address on Reg_Address bus;
3): 2nd time to write the EDP register you want to operate,
to make sure the data is write on the real write address;
- For CPU read EDP register operation, read any register need following
two steps,
1): 1st time to read the EDP register you want to operate, to latch
the real read address on Reg_Address bus;
2): 2nd time to read the EDP register you want to operate, to make
sure the data is read out from the real read address;
Change-Id: I4a87d3883efe94d32ccf8809edb5b9d869670d2d
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
This adds clk_get_optional() and devm_clk_get_optional() functions to get
optional clocks.
They behave the same as (devm_)clk_get() except where there is no clock
producer. In this case, instead of returning -ENOENT, the function
returns NULL. This makes error checking simpler and allows
clk_prepare_enable, etc to be called on the returned reference
without additional checks.
Change-Id: I3d4fa031f94c313f836712d8c3d8177c9eb3f06a
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: Russell King <linux@armlinux.org.uk>
[sboyd@kernel.org: Document in devres.txt]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
(cherry picked from commit 60b8f0ddf1)
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
The adreno driver expects the "id" field of the returned clk_bulk_data
to be filled in with strings from the clock-names property.
But due to the use of kmalloc_array() in of_clk_bulk_get_all() it
receives a list of bogus pointers instead.
Zero-initialize the "id" field and attempt to populate with strings from
the clock-names property to resolve both these issues.
Change-Id: I6d32388f8cd61b02b99f3c5a4aebb866958415eb
Fixes: 616e45df7c ("clk: add new APIs to operate on all available clocks")
Fixes: 8e3e791d20 ("drm/msm: Use generic bulk clock function")
Cc: Dong Aisheng <aisheng.dong@nxp.com>
Cc: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lkml.kernel.org/r/20190913024029.2640-1-bjorn.andersson@linaro.org
Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
(cherry picked from commit 7f81c24265)
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
clk_bulk_get_optional() allows to get a group of clocks where one
or more is optional. For a not available clock, e.g. not specifed
in the clock consumer node in DT, its respective struct clk pointer
will be NULL. This allows for operating on a group of returned
clocks (struct clk_bulk_data array) with existing clk_bulk* APIs.
Change-Id: Ia706f1a64515e1c4c6fcbba992da7cee4ed8fe9c
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
(cherry picked from commit 2f25528e4e)
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
This patch introduces of_clk_bulk_get_all and clk_bulk_x_all APIs
to users who just want to handle all available clocks from device tree
without need to know the detailed clock information likes clock numbers
and names. This is useful in writing some generic drivers to handle clock
part.
Change-Id: I5838d4a3ca806ef487a4d8a7d5bab60018e219a2
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Tested-by: Thor Thayer <thor.thayer@linux.intel.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
(cherry picked from commit 616e45df7c)
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
'clock-names' property is optional in DT, so of_clk_bulk_get() is
introduced here to handle this for DT users without 'clock-names'
specified. Later clk_bulk_get_all() will be implemented on top of
it and this API will be kept private until someone proves they need
it because they don't have a struct device pointer.
Change-Id: I2f34ce58a0bc6d70305121dea308f4f34ce0fc2f
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Russell King <linux@arm.linux.org.uk>
Reported-by: Shawn Guo <shawnguo@kernel.org>
Tested-by: Thor Thayer <thor.thayer@linux.intel.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
(cherry picked from commit cfdc0411cf)
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Since the rk3288 used the v2 in pwm-rockchip.c that supported the pwm's
polarity.
So the pwm-cells should be 3.
Change-Id: I68c70bdeefd03ce11559abbd597c5b466a20a8c1
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
This patch drops the rockchip specific glue layer which
was used for RK3399 and RK1808. Because the DWC3 Core
has supported the drd perfectly, so we just used the
generic glue layer for most of Rockchip SoCs integrated
DWC3 controller except RK3328/RK3228H.
Change-Id: Ie88f3c06bd8fec5bb7137581519c3a2cbc40e040
Signed-off-by: William Wu <william.wu@rock-chips.com>
