Commit Graph

608055 Commits

Author SHA1 Message Date
Shawn Lin
6a0dbbc7e1 arm64: dts: rockchip: remove always-on and boot-on from vcc{io}_sd of PX30/RK3326 boards
vccio_sd and vcc_sd are well better controlled by MMC core
and please don't bother taking care of them instead, otherwise
reboot w/ a working SD3.0 card will fail to respond the correct
OCR in the first place as missing a proper power removal.

Change-Id: I9efa11e25198b66e21538bd6603a3bab6638dc5f
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
2018-03-20 20:51:03 +08:00
Algea Cao
6ad9ec862c drm/rockchip: tve: get vdac adjust value from efuse
Change-Id: Idf50443557cfc73fb47613027785bbf88e49f567
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
2018-03-20 20:50:19 +08:00
Algea Cao
ef6e3f4cef ARM: dts: rk322x: tve support get dac adjust value
Efuse byte 29 bit 3-7 is used for tve dac.

Change-Id: Ic119b25ae8b74969ff7968d8772f7a008d3c920c
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
2018-03-20 20:50:19 +08:00
Sandy Huang
38a1973ae2 drm/rockchip: 3229 vop: fix mistake fild when in interlace mode
set frame effect to fix mistake fild when in interlace mode

Change-Id: I74143cc28cbd9a7864a1df57979f3888137c141c
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2018-03-20 20:46:55 +08:00
Sandy Huang
ac1f715f53 drm/rockchip: vop: fix lb mode config error
when video width is bigger than 3840 the linebuffer mode
should be LB_YUV_3840X5.

Change-Id: I27dce8a6fcb7f6f5b8d196671a515c68f188c101
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2018-03-20 20:46:37 +08:00
Wyon Bi
6ee21b2eae drm/rockchip: vop: Fix bcsh_out_mode register field definitions
Change-Id: I5436d748be938ee5795ce7b3fd49f582fad58bdf
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
2018-03-20 20:46:07 +08:00
Huang jianzhi
cd028dbdac ARM: dts: rockchip: rk3229-evb-android: Modify pwm frequency from 40k to 200k
Change-Id: I53a363b1c54165189fb246ed7030c372786badd2
Signed-off-by: Huang jianzhi <jesse.huang@rock-chips.com>
2018-03-20 14:36:20 +08:00
Xu Hongfei
710c5332ee camera: rockchip: change gc0312 fps to 20fps for the test of cts/vts
Change-Id: Ic409f1ff0918482367da10cd3d7f07ef957a34b1
Signed-off-by: Xu Hongfei <xuhf@rock-chips.com>
2018-03-20 14:35:57 +08:00
Zheng Yang
41ada5352f phy: rockchip: inno-hdmi: fix vco calculating in recalc_rate
On 32bit platform, vco may be out of range. The variable type
of vco needs to be set to u64.

Change-Id: I2f6b967278986bb77bf74c7a11794fc4d73645db
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
2018-03-20 14:29:43 +08:00
Tao Huang
e07667aa2d usb: bc: Fix compile error when !DWC_OTG_310
Change-Id: I726d459a5e9a7043bc6543fe58fee51b8cc5f034
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2018-03-20 14:25:44 +08:00
Sandy Huang
91783f5900 drm/panel: simple: add support spi init screen
Change-Id: I58c77b5042d3a7456b553f369f7a44286472f582
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2018-03-20 14:18:02 +08:00
Sandy Huang
6200d44596 drm/panel: simple: rename dsi panel cmd name
panel init cmds is not only for dsi panel, some mcu screen and
spi screen also need init cmds, so we update this panel init cmd
name and reuse this part logic.

Change-Id: I9e633647fa3f3d92eb90b443a8a5da99a24a3b42
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2018-03-20 14:16:32 +08:00
Liang Chen
78ffe82012 arm64: dts: rockchip: adjust opp-table and IR-Drop for px30/rk3326
Change-Id: I266078b219edc60b27cea547462cad886e3af1bb
Signed-off-by: Liang Chen <cl@rock-chips.com>
2018-03-20 14:16:04 +08:00
Finley Xiao
310a0955e9 clk: rockchip: px30: Make usb480m critical
Gpu 480M is from usb480m and the source clocks should be always on
if change gpu frequency after power off pd.

Change-Id: I11b5b05381e1745919b7137a64e4d334786cf433
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2018-03-20 14:14:45 +08:00
Zhang Yunlong
01fc57fe3f soc: rockchip: rk_camera: correct macro definition
Change-Id: Ib7bba62d4f25905e5e42d5f76092eddeb8806ee9
Signed-off-by: Zhang Yunlong <dalon.zhang@rock-chips.com>
2018-03-20 14:13:22 +08:00
Zhang Yunlong
830d9321e7 arm64: dts: rockchip: rk3326-863-lp3-v10: remove dvp regulator 'always-on' property
Change-Id: I3790833144ae17fd5417bfc056d82cf7fe6866e6
Signed-off-by: Zhang Yunlong <dalon.zhang@rock-chips.com>
2018-03-20 14:12:17 +08:00
Zhang Yunlong
cd5d124bba arm64: dts: rockchip: rk3326-863-cif-sensor: config dvp regulator
Change-Id: Ia8a9e6dc71067420b3da2b95ab16706715147001
Signed-off-by: Zhang Yunlong <dalon.zhang@rock-chips.com>
2018-03-20 14:11:57 +08:00
David Wu
e38aa951c8 pwm: rockchip: Make pwm pinctrl setting after pwm enabled
If the PWM pinctrl uses default state, the iomux setting will
be done at probe, the PWM may not be enabled at this moment.
It will make PWM into an intermediate state, destroy the default
hardware state, the PWM is not ready for work yet. So it is better
for doing PWM pinctrl setting after PWM enabled.

Change-Id: Iea34a7baf6a4d7df0c631f7f4fdab5b9d61bbd5f
Signed-off-by: David Wu <david.wu@rock-chips.com>
2018-03-19 16:30:38 +08:00
Finley Xiao
f636c5450a arm: dts: rk3228: Assign aclk_vop to 400MHz
Change-Id: I044cd80e47f460dc4ec419e6f9627b0f48d867b9
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2018-03-19 15:48:14 +08:00
Finley Xiao
2bcdca5264 arm: dts: rk3228: Assign gpll to 1200MHz
Change-Id: I2be3d9a668f9c722a09b0caac6cb620e131ea1d3
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2018-03-19 15:48:14 +08:00
Finley Xiao
86eabe311f clk: rockchip: rk3228: remove the flag ROCKCHIP_PLL_SYNC_RATE for GPLL
To slove the display shaking, when uboot logo display to kernel show.

Change-Id: Ifc97f72df27b4e8dbcd34ab8ed65ac027fd424d1
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2018-03-19 15:48:14 +08:00
Sandy Huang
2f4dee4910 drm/rockchip: fix kernel panic when drm driver probe failed
For some reason drm driver maybe probe failed, so the drm_dev is
null. this will lead to kernel panic when enter suspend function.

Change-Id: Ic529ba9103d27b0766189285bd6cf8e43b23b912
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2018-03-19 15:06:37 +08:00
Zhang Yunlong
5b1eeb6646 arm64: dts: rockchip: add cif data pin combinations for px30
Change-Id: Ia1d81e1e6450cfc9c13c775ac6ed5d70613ee90e
Signed-off-by: Zhang Yunlong <dalon.zhang@rock-chips.com>
2018-03-19 14:15:15 +08:00
Finley Xiao
40b3301c59 clk: rockchip: rk3228: Fix sclk_wifi div_width
Change-Id: I8e216249fbd588ce55660eba9911fc59aedc920d
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2018-03-18 21:41:43 +08:00
Meng Dongyang
079b3c7cdb usb: dwc2: make hcd into L3 power off state when suspend
The controller will reset and run into error state if turn
off power when suspend in host mode. This patch stop hcd to
make the controller into L3 state to make sure that the
controller and driver state will reset when resume.

Change-Id: If66bc1a249e919f440ecde0c66f18dabde0b2e62
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
2018-03-16 17:51:16 +08:00
shengfei Xu
ab4a44bf83 power: rk817_charger: enable boost if charger offline
Change-Id: I43d1ded1098c7b37c40bc6a66949b77a0c1e1172
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
2018-03-16 17:50:19 +08:00
Liang Chen
1641eb4fc2 PM / devfreq: adjust opp-table by board IR-Drop
Change-Id: I94280b3f4a122961c0201cf9f8fbf5dc34058581
Signed-off-by: Liang Chen <cl@rock-chips.com>
2018-03-16 17:49:29 +08:00
Liang Chen
3ccca07e3f cpufreq: dt: adjust opp-table by board IR-Drop
Change-Id: Ia51daad4bf5b73621875d1608cd0e486024fcf95
Signed-off-by: Liang Chen <cl@rock-chips.com>
2018-03-16 17:49:29 +08:00
Liang Chen
f31ed416e5 soc: rockchip: add support for adjust opp-table by board IR-Drop
The IR-Drop is always different between different boards, so we
need know the IR-Drop to adjust opp-table to guarantee stably
for the board.

Change-Id: I8ad05d30e15a7e62910a952cc6fa199d70129660
Signed-off-by: Liang Chen <cl@rock-chips.com>
2018-03-16 17:49:29 +08:00
Zhaoyifeng
5790f6182b drivers: rk_nand: update ftl for rk3226 and px30
1. Optimize the garbage processing.
2. Add data list for block manager.

Change-Id: I1c5563151e80dd3b3e941835dd93e2fe4eb4e20b
Signed-off-by: Zhaoyifeng <zyf@rock-chips.com>
2018-03-16 17:49:19 +08:00
Binyuan Lan
7a4fcedce8 ASoC: rockchip: rk817-codec: dynamically enable/disable mclk
Change-Id: I57c97c72ff294bcf63590aa79c6ce0656dc8b022
Signed-off-by: Binyuan Lan <lby@rock-chips.com>
2018-03-16 17:35:30 +08:00
Zhangbin Tong
de5b227eb5 ARM: dts: rockchip: rk3229-evb-android: Fix pin config for bluetooth uart rts
Change-Id: I1745fe8a02994ccbbc6dcfdb2db69319d5312841
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
2018-03-16 10:23:37 +08:00
XiaoDong Huang
ca9d744625 ARM: dts: rockchip: rk3229-evb-android: enable virtual-poweroff
Change-Id: I7d4dd53190e58cc9caec9f8fd9e1330cf34e6d2b
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
2018-03-16 09:23:26 +08:00
XiaoDong Huang
7490a94de2 arm: dts: rockchip: rk322x: add virtual-poweroff
Change-Id: I730cf886ee20a16f638c7e5d74ee6927c0f3022b
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
2018-03-16 09:23:25 +08:00
Zheng Yang
595ad3137e phy: rockchip: inno-hdmi: fix 322x hdmi tmdsclk 27M PLL setting
On some chip, HDMI post PLL is not stable when it's vco is 1080M,
but it work ok when vco is 270M. We use a efuse bit to distinguish
these chip.

Change-Id: I143363d67e60747ee52d405edace3ec611de3e6e
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
2018-03-15 19:09:47 +08:00
Zheng Yang
b3de8bee89 ARM: dts: rk322x: hdmi phy support get efuse flag
Efuse byte 29 bit 1 is used for HDMI PHY.

Change-Id: Ic6d38b43660a89b898d3a3ceb848847e95409c3d
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
2018-03-15 19:09:47 +08:00
Chris Zhong
07b7c37ca5 arm64: rockchip_linux_config: enable LEDS_IS31FL32XX
LEDS_IS31FL32XX is a led driver IC used by rk3308 evb.

Change-Id: I77c8dcd379e72bd85bffcad5f0ec51bbaf876274
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
2018-03-15 18:51:42 +08:00
Sandy Huang
cbedcd2f9c ARM: dts: rk322x: Fix vop iommu interrupt config error
Change-Id: Iee6034335a3d2f9a5a974be5119d87170a6c3480
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2018-03-15 14:27:32 +08:00
Zheng Yang
dcd0e2c2b5 phy: rockchip: inno-hdmi: manual power down RK3228 post-PLL with no uboot logo
Inno hdmi phy post pll is enabled by default on rk3228, it's need to
manual power down post pll if uboot logo is not shown.

Change-Id: I7ed4de2eae2d723f390dae44281281b9e81f4e1d
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
2018-03-15 14:26:43 +08:00
Nickey Yang
8b4430021f arm64: dts: rockchip: add rk3399-videostrong board support
Change-Id: I0b24ee2f926f3be4bc8d93064c2f5f8e51ffe2de
Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
2018-03-15 14:25:46 +08:00
Algea Cao
f27ca618fc phy: rockchip: inno-hdmi: Add rk3228 phy pll recalculate rate
Change-Id: Ifad3edda80e86dff39e8decd75d51a5670c12871
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
2018-03-15 14:25:14 +08:00
Shawn Lin
865523b715 BACKPORT: FROMLIST: clk: rockchip: Restore the clock phase after the rate was changed
There are many factors affecting the clock phase, including clock
rate, temperature, logic voltage and silicon process, etc. But clock
rate is the most significant one here, and the driver should be aware
of the change of the clock rate. As mmc controller need a fixed phase
after tuning was completed, at least before explicitly doing re-tune,
so this patch try to restore the clock phase by monitoring the event
of rate change.

Change-Id: Id1ccdfd2e8d4e2eb9f6a1923b3813138dbaf99f7
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
(cherry picked from https://patchwork.kernel.org/patch/10269525/)
2018-03-15 11:31:58 +08:00
Tony Xie
adc3c2caca arm64: configs: rockchip_defconfig: enable CONFIG_PINCTRL_RK805
Change-Id: I57099822c273822aaf857f3d92a94fd4fcf03703
Signed-off-by: Tony Xie <tony.xie@rock-chips.com>
2018-03-15 11:29:25 +08:00
lei.chen
a8201d063a ARM: dts: rockchip: add mmc-hs200-1_8v for rk322x-android
Change-Id: I035f5b4f3bc60f5a6086728fe29a7c07b8159e62
Signed-off-by: lei.chen <lei.chen@rock-chips.com>
2018-03-15 09:37:11 +08:00
Finley Xiao
0e7eba3141 clk: rockchip: rk3308: Rename gmac to mac
Change-Id: I31e9fddcffde824c2b41bd3eddccf3a995cfb913
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2018-03-14 14:42:20 +08:00
Finley Xiao
ec51d82bdc clk: rockchip: rk3308: Add CLK_IGNORE_UNUSED for clocks with div50
Change-Id: I3b01a93741af7e66f57b5c93c33746d8cbe21bfe
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2018-03-14 14:05:04 +08:00
Jason Song
6655b96cd3 ARM: dts: rockchip: rk3288: fix uart4 pinctrl error.
Change-Id: Ia1d5af0a3fadf9f8649df664aef2e6f3d862d778
Signed-off-by: Jason Song <sxj@rock-chips.com>
2018-03-14 09:11:18 +08:00
Tao Huang
5b30e653ca clk: rockchip: build depends on CPU config
Change-Id: Ia35e7bba3eb7bd37f8f291d7501681a6ccea421f
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2018-03-13 18:38:21 +08:00
Tao Huang
a5c23986ad media: soc_camera/rockchip: Fix compile warning
aptina/imx/ov_camera_module.c:
Fix this warning: this if clause does not guard... [-Wmisleading-indentation]

Change-Id: I788d4d4d04dd2b0b7c41e1a041e9084c62b1975c
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2018-03-13 18:37:19 +08:00
Binyuan Lan
686662c6f1 ASoC: rockchip: i2s: protect I2S_XFER_TXS/I2S_XFER_RXS with mutex
fix bug error log: "rockchip-i2s ff070000.i2s: fail to clear".
When the TX/RX have started, can not do 'clear operation'.

Change-Id: I83c2ac29412a37a5de02ed9d4be62716fe46678a
Signed-off-by: Binyuan Lan <lby@rock-chips.com>
2018-03-13 18:32:51 +08:00