Commit Graph

604710 Commits

Author SHA1 Message Date
Zorro Liu
6bf00d509a driver: input: sensor: improve lis3dh init and data read
Change-Id: Ie5bb012a2f60b966179cacba1fbff530c172dae3
Signed-off-by: Zorro Liu <lyx@rock-chips.com>
2017-11-23 15:27:17 +08:00
Frank Wang
c8dc9b5859 ARM64: dts: rockchip: fix usb_otg compatible for rk3368-android
Both dwc2 and dwc_otg_310 driver are existed in the system since
commit c3c4fa0, and we use dwc_otg_310 driver for RK3368 android
platform, so only keep one compatible to fit for the driver.

Change-Id: Iee001ef057dcc63b723faf21fec94d5a4b592868
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
2017-11-23 14:10:04 +08:00
Meng Dongyang
dc71e51944 usb: dwc2: make otg manage lowlevel hw on its own
According to the design guide of dwc2, the application must flush
all FIFOs after reallocating the FIFO data RAM and the phy is
required to keep power on when flush FIFO. But on some rockchip
platforms, the usb phy will be powered off when the usb otg/gadget
disconnect, in this case if the application call the function
dwc2_hsotg_udc_start() to start udc, it will result in the error
as below:

dwc2_hsotg_init_fifo: timeout flushing fifos (GRSTCTL=80000430)
dwc2_core_reset() HANG! Soft Reset GRSTCTL=80000001
bound driver configfs-gadget
dwc2_core_reset() HANG! Soft Reset GRSTCTL=80000001

This patch make the dwc2 driver to manage the power of phy in
udc start and stop function both in otg and peripheral mode. Make
sure that the usb phy is powered on when udc start, and then the
usb phy driver can manage the phy power dynamically.

Change-Id: I15d3cb5313fc157b58a37c9e15f191d7cb966217
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
2017-11-23 11:25:17 +08:00
Xinhuang Li
0f3895a77d ARM: rockchip_defconfig: enable CONFIG_SND_SOC_TC358749X
Change-Id: I817fb1dd6eea07561081cfa4a0268a20271ac989
Signed-off-by: Xinhuang Li <buluess.li@rock-chips.com>
2017-11-22 09:47:22 +08:00
Xinhuang Li
059e614bdd ASoC: codecs: tc358749x: compatible with different power pin definitions
some boards do not define the power pin such as power18/power33
for tc358749x

Change-Id: I36914dc005e465c290f71df2483d1969f6d101ef
Signed-off-by: Xinhuang Li <buluess.li@rock-chips.com>
2017-11-22 09:47:04 +08:00
Xinhuang Li
fec2710757 ARM: dts: rk3288-firefly: add tc358749x node
Change-Id: I135ef2399832de717e4ef24fefe41fce678af725
Signed-off-by: Xinhuang Li <buluess.li@rock-chips.com>
2017-11-22 09:46:58 +08:00
Zheng Yang
d1943fde81 drm: bridge: dw-hdmi: support Dynamic Range and Mastering Infoframe
The Dynamic Range and Mastering InfoFrame carries data such as
the EOTF and the Static Metadata associated with the dynamic
range of the video stream.

This function is introduced in the 2.11a version.

Change-Id: I279cc0665e34d75209774013882ccc8946ce6da5
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
2017-11-22 09:31:48 +08:00
Zheng Yang
b8e71e7b42 drm/rockchip: dw-hdmi: move depth checking into dw_hdmi_rockchip_select_output
For some display device, max_tmds_clock is 0, we think
max_tmds_clock is 340MHz. If tmdsclock > max_tmds_clock,
depth should fall back to 8bit. And If display mode support
YCBCR420, output format is YCBCR420.

Because max tmds clk of RK3368 is 340MHz, hdmi output policy
is same as mentioned above.

It is need to check tmds clock rate at the last. So we move
depth checking into dw_hdmi_rockchip_select_output.

Change-Id: I27e029fc0171b175ddbfa453ed12854ab6a7432b
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
2017-11-22 09:31:25 +08:00
Zorro Liu
a494bb74a7 ARM64: dts: rockchip: rk3368-android: uart2 disabled default
Change-Id: I75ee10d966cea374508e10bcb5cb275636f04e91
Signed-off-by: Zorro Liu <lyx@rock-chips.com>
2017-11-22 09:26:29 +08:00
Sean Young
72ba972c19 UPSTREAM: [media] rc: unify nec32 protocol scancode format
There are two different encodings used for nec32:
 - The ir-nec-decoder.c decoder treats it as 32 bit msb first.
 - The img-ir decoder/encoder, winbond wakeup, dib0700, ir-ctl userspace,
   treat nec32 analogous to necx and nec: 4 bytes, each lsb first. So this
   format reverses the 4 bytes.

There are arguments to be had for both formats, but we should not use
different formats in different parts of the kernel. Selecting the second
format introduces the least code churn. It does mean that the TiVo keymap
needs updating.

This change was submitted before as "18bc174 [media] media: rc: change
32bit NEC scancode format", which was reverted because it was unclear
what scancode rc drivers produce. There are now more examples of drivers
which produce nec32 in lsb format.

The TiVo keymap is verified against the Nero Liquid TiVo remote. The
keymap is not for the Tivo DVR remote, which uses rc-5.

Signed-off-by: Sean Young <sean@mess.org>
Cc: James Hogan <james.hogan@imgtec.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
(cherry picked from commit 6eae57e9d5)

Change-Id: Ib722e0116fe0b590e3fb96d8c7ff1e3a384a0b55
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
2017-11-22 09:25:36 +08:00
Sean Young
676241a57e UPSTREAM: [media] gpio-ir: do not allow a timeout of 0
According to the documentation, a timeout of 0 turns off timeouts,
which is not the case.

Signed-off-by: Sean Young <sean@mess.org>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
(cherry picked from commit ee5310e66e)

Change-Id: If6edb518e2c14478d13b9e0bf99a0ef8cd03b579
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
2017-11-22 09:25:36 +08:00
Eric Nelson
56ce5d3016 UPSTREAM: [media] rc: gpio-ir-recv: add timeout on idle
Many decoders require a trailing space (period without IR illumination)
to be delivered before completing a decode.

Since the gpio-ir-recv driver only delivers events on gpio transitions,
a single IR symbol (caused by a quick touch on an IR remote) will not
be properly decoded without the use of a timer to flush the tail end
state of the IR receiver.

This patch initializes and uses a timer and the timeout field of rcdev
to complete the stream and allow decode.

The timeout can be overridden through the use of the LIRC_SET_REC_TIMEOUT
ioctl.

Signed-off-by: Eric Nelson <eric@nelint.com>
Acked-by: Sean Young <sean@mess.org>
Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
(cherry picked from commit 3fb136f339)

Change-Id: Ice220af0199cf848bb907c9a419dd079efd94834
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
2017-11-22 09:25:36 +08:00
Eric Nelson
213bf6dcd9 UPSTREAM: [media] rc-core: define a default timeout for drivers
A default timeout value of 125 ms should work for all decoders.

Declare a constant to help standardize its' use.

Signed-off-by: Eric Nelson <eric@nelint.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
(cherry picked from commit c8e1bbc52d)

Change-Id: I672091f1902c3a91c9746dbfd8438896f7c9433d
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
2017-11-22 09:25:36 +08:00
Eric Biggers
208e9ebabe UPSTREAM: arm64: support keyctl() system call in 32-bit mode
As is the case for a number of other architectures that have a 32-bit
compat mode, enable KEYS_COMPAT if both COMPAT and KEYS are enabled.
This allows AArch32 programs to use the keyctl() system call when
running on an AArch64 kernel.

Signed-off-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
(cherry picked from commit 5c2a625937)

Change-Id: I100b99f6c2262da5b7c7ea660c47ffedfa6a1297
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
2017-11-22 09:25:36 +08:00
Frank Wang
c3c4fa01be ARM64: configs: add usb related config to rockchip_defconfig
Enable CONFIG_USB_DWC2 and CONFIG_PHY_ROCKCHIP_INNO_USB3 driver
for rockchip_defconfig.

Change-Id: Ic22cc450e5f139935dc54ffb798413edff7df3cb
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
2017-11-22 09:22:31 +08:00
Joseph Chen
b6f8d1d25b mfd: rk808: add rk818 suspend/resume registers setting
set 3.4v interrupt signal assert when suspend, set 3.0v shutdown
signal assert when resume.

Change-Id: Id15b721bbdc9665a18cf9946b92c435a23f1666c
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2017-11-22 09:21:15 +08:00
Joseph Chen
9ad17c3dbf mfd: rk808: add rk816 suspend/resume registers setting
set 3.4v interrupt signal assert when suspend, set 3.0v shutdown
signal assert when resume.

Change-Id: Ie91d8ce6a79e5ea50b654ea52c3ed8acf047f8fb
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2017-11-22 09:21:15 +08:00
Joseph Chen
3599b49698 mfd: rk808: fix position typo of mask and value for rk816
Change-Id: I29fa67327b18a6c3cd2a22d223a30c7546c7ffac
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
2017-11-22 09:21:15 +08:00
William Wu
6e3c63017e phy: rockchip-inno-usb2: reinit charge state when usb disconnect
When detect the usb peripheral disconnect from PC usb
host port or usb charger, we need to reinit the charge
state immediately, then it can do usb battery charge
detect work to get correct charge type if usb re-plug
in again in a short time.

Change-Id: I187f1d23a11b00f57e0a3699b6174cd7a59be3f1
Signed-off-by: William Wu <william.wu@rock-chips.com>
2017-11-22 09:20:47 +08:00
Finley Xiao
16efe6c228 arm64: dts: rockchip: rk3399: Add nocp device node
Change-Id: I9ef68b69a263720aea3d51e854375b51027c94a2
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2017-11-21 20:34:37 +08:00
Finley Xiao
488e660611 arm64: dts: rockchip: rk3368: Add nocp device node
Change-Id: I21b8a073491910a4c20e974008b961b29c986ec2
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2017-11-21 20:34:31 +08:00
Finley Xiao
c2c3c9bda9 ARM: dts: rockchip: rk3288: Add nocp device node
Change-Id: I7432a68be8730718b1d6d22c7e97f83827d0eb75
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2017-11-21 20:34:25 +08:00
Finley Xiao
ae74e02de8 arm64: rockchip_defconfig: enable CONFIG_DEVFREQ_EVENT_ROCKCHIP_NOCP
Change-Id: I0efed176f35018cea510ca8ddb41cac23ae23d96
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2017-11-21 20:33:46 +08:00
Finley Xiao
41193192bb ARM: rockchip_defconfig: enable CONFIG_DEVFREQ_EVENT_ROCKCHIP_NOCP
Change-Id: I13ab528a35285290e7a99b4ae2de54bddf02185d
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2017-11-21 20:32:04 +08:00
Finley Xiao
ccfeccfe22 PM / devfreq: event: Add new Rockchip NoC probe driver
This patch adds NoC (Network on Chip) Probe driver which provides
the primitive values to get the performance data. For example, RK3399
has multiple NoC probes to monitor traffic statistics for analyzing
the transaction flow.

Change-Id: I66f6708f0d244488ca08f0f1f1cb36b19c7a2d0a
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2017-11-21 20:24:57 +08:00
Tao Huang
90454edfc6 ARM: rockchip_defconfig: update by savedefconfig
Change-Id: I561581485fdbff1b6f3f5a41e26d6049cbd672e4
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2017-11-21 17:39:12 +08:00
Zhen Chen
dac44b4210 MALI Utgard: RK: add nodes to get gpu_utilisation
Change-Id: I7ceebd882282fc08c8560fba5ec8978d18d5b819
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
2017-11-21 17:19:07 +08:00
William Wu
6b406ee4c7 usb: dwc_otg_310: hcd: fix isoc split in transaction
The handle_xfercomp_isoc_split_in() use two conditions
to check if the isoc in csplit transcation is done:

 - the actual xfer length of the current frame is zero
 - the total xfer length of the frames equals to the
   request length of the frames

But in some case, we find that the two conditions are
not enough, e.g. on rockchip platforms, connect the usb
audio card with the FE1.1 HUB, the audio is setted to
44100 2ch 16 bits, the csplit transcation sequence is:

 - CSPLIT IN transcation
   - MDATA packet [176 bytes]

 - CSPLIT IN transcation
   - DATA0 packet [No data]

In this case, the total actual xfer length of frames is
less than the request length of frames, so the current
code will not update the status of frame and the qtd
isoc_frame_index, this cause usb audio data corrupted.

According to the USB 2.0 spec "Figure 11-85. Isochronous
IN Complete-split Transaction Sequence", we can use DATA0
to check if the transaction is last data. So use DATA0
instead of zero length transaction to check if the csplit
transcation is done.

Change-Id: I55cfa3f7b93ed6bfba3ecec5820d7b534c05ba34
Signed-off-by: William Wu <william.wu@rock-chips.com>
2017-11-21 17:17:13 +08:00
Wu Liang feng
41ebd2ae40 usb: dwc_otg_310: add force host channel halt quirk
According to DWC2 Programming Guide, if a host channel is
used for non-split periodic transfer, we must not disable
the channel if we want to halt it, and at the end of the
next uframe/frame (in the worst case), the core generates
a channel halted and disables the channel automatically.

But some specil usb device, like usb audio (VID = 0x0572,
PID = 0x1494, Manufacturer: Conexant Systems INC), we
need to halt the channel immediately when do close usb
audio operation. Otherwise, the host may still start a
new transaction after usb audio close, and cause to set
usb interface failed when open usb audio next time.

This patch introduces a new quirk to force host channel
halt even if it's used for a non-split periodic transfer.

Change-Id: I2911ad8f68bb3738691ac683b0b64330d3428213
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
2017-11-21 17:17:13 +08:00
Wu Liang feng
8a68b9361b usb: dwc_otg_310: hcd: fix a race condition between queue and dequeue
In the current urb enqueue process, it doesn't use
spinlock protect qtd init, this may cause urb dequeue
to access the qtd unexpectedly and cause kernel panic
with the following log:

Unable to handle kernel NULL pointer dereference at virtual address 00000024
pgd = c0004000
[00000024] *pgd=00000000
Internal error: Oops: 817 [#1] PREEMPT SMP ARM
Modules linked in: drmboot(PO)
CPU: 1 PID: 623 Comm: wakeWordAgent Tainted: P           O 3.10.104 #64
task: cee05f80 ti: cefaa000 task.ti: cefaa000
PC is at dwc_otg_hcd_urb_dequeue+0x90/0x12c
LR is at urb_dequeue+0x70/0xb8
...
[<c0447af8>] (dwc_otg_hcd_urb_dequeue+0x90/0x12c) from [<c04497c4>] (urb_dequeue+0x70/0xb8)
[<c04497c4>] (urb_dequeue+0x70/0xb8) from [<c0417144>] (usb_hcd_unlink_urb+0x84/0xa4)
[<c0417144>] (usb_hcd_unlink_urb+0x84/0xa4) from [<c051dedc>] (deactivate_urbs+0xa4/0xc8)
[<c051dedc>] (deactivate_urbs+0xa4/0xc8) from [<c051eeb0>] (snd_usb_endpoint_stop+0x2c/0x3c)
[<c051eeb0>] (snd_usb_endpoint_stop+0x2c/0x3c) from [<c0525c78>] (stop_endpoints+0x48/0x64)
[<c0525c78>] (stop_endpoints+0x48/0x64) from [<c0525ce0>] (snd_usb_substream_capture_trigger+0x4c/0xa0)
[<c0525ce0>] (snd_usb_substream_capture_trigger+0x4c/0xa0) from [<c05128b8>] (snd_pcm_do_stop+0x4c/0x54)
[<c05128b8>] (snd_pcm_do_stop+0x4c/0x54) from [<c0512190>] (snd_pcm_action_single+0x38/0x64)
[<c0512190>] (snd_pcm_action_single+0x38/0x64) from [<c0512360>] (snd_pcm_drop+0x68/0xb8)
[<c0512360>] (snd_pcm_drop+0x68/0xb8) from [<c0512d7c>] (snd_pcm_release_substream.part.11+0xc/0x90)
[<c0512d7c>] (snd_pcm_release_substream.part.11+0xc/0x90) from [<c0512e48>] (snd_pcm_release+0x30/0x7c)
[<c0512e48>] (snd_pcm_release+0x30/0x7c) from [<c0108d1c>] (__fput+0xe8/0x1e4)

This patch uses spinlock to protect qtd init when do urb
enqueue to avoid race condition between queue and dequeue.

Change-Id: I88fac18530cd0a52a5d9b604880d162ff2793ca7
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
2017-11-21 17:17:13 +08:00
Wu Liang feng
93ddcde5f2 usb: dwc_otg_310: core: do not disable non-split periodic channels
The dwc2 programming guide section 3.5 'Halting a Channel'
says that the application can disable any channel by
programming the HCCHARn register with the HCCHARn.ChDis
and HCCHARn.ChEna bits set to 1'b1. This enables the
dwc_otg host to flush the posted requests (if any) and
generates a Channel Halted interrupt.

But it also requires that channel disable must not be
programmed for non-split periodic channels. At the end
of the next uframe/frame (in the worst case), the core
generates a channel halted and disables the channel
automatically.

If we disable non-spilt periodic channels to halt the
channels, it will easily to cause data transfer fail.
A typical case is take photo with usb camera or close
usb camera, Specifically, the observed order is:
1. uvc driver calls usb_kill_urb
2. usb_kill_urb calls urb_dequeue to cancel urb
3. urb_dequeue call dwc_otg_hc_halt to disable
   non-spilt periodic channels
4. usb core doesn't halt the non-spilt periodic
   channels immediately, and the application
   reallocates the channels for other transactions
   without waiting for the HCINTn.ChHltd interrupt.
5. uvc driver calls usb_set_interface to start
   control transfer, and gets a channel which used
   for non-spilt periodic transfer before. The core
   generates a channel halted and disables the channel
   automatically. This cause control transfer fail.

Change-Id: I9f951bbd19d3568d9342973a1a25dba469505154
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
2017-11-21 17:17:13 +08:00
Wu Liang feng
2c7ae82487 usb: dwc_otg_310: pcd: fix ep NULL pointer dereference in queue
err log:
Unable to handle kernel NULL pointer dereference at virtual address 00000011
pgd = c36f4000
[00000011] *pgd=00000000
Internal error: Oops: 5 [#1] PREEMPT SMP ARM
Modules linked in: mali rk30xxnand_ko(P)
CPU: 0 PID: 5270 Comm: FastMixer Tainted: P
task: db83b9c0 ti: cdf30000 task.ti: cdf30000
PC is at ep_queue+0x160/0x248
LR is at audio_send+0x21c/0x2ac
pc : [<c04eef2c>]    lr : [<c05181b4>]    psr: 600f0093
sp : cdf31e40  ip : 00000000  fp : 00200200
r10: c0cdab68  r9 : 00100100  r8 : 8d4fdf3b
r7 : 00000020  r6 : dea821d8  r5 : de99a000  r4 : d37d34c0
r3 : 000000b0  r2 : d7a7a600  r1 : 00000000  r0 : dea82000

Change-Id: I58ed928233acabc568689f9e9dc1f1fd2be28df0
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
2017-11-21 17:17:13 +08:00
Feng Mingli
f0d2f413f9 USB: dwc_otg_310: hcd: resume rh when handle disconnect or force mode
If the root hub is in suspend, we need to resume it when handle hcd
disconnect or force device mode,  otherwise the hub driver can't detect
the status change when port disconnect or mode change.
This issue always happens if connect with an usb device which supports
auto-suspend.

Test=Plug in an usb device which supports auto-suspend(such as: hub, usb
camera, etc.). Wait a few seconds until usb enter auto suspend, then
plug out the device or set force device mode, check wheather the device
disconnect from the usb bus or not.

Change-Id: I0f96bba1b9516b264e75d2d829f46fddc193fca7
Signed-off-by: Feng Mingli <fml@rock-chips.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
2017-11-21 17:17:13 +08:00
Feng Mingli
39415217b3 usb: dwc_otg_310: pcd: fix ep stop transfer bug
When dequeue a transfer request, dwc_otg_310 pcd driver
will call dwc_otg_pcd_ep_stop_transfer() function, it
set the whole depctl register value to 0. But actually
it should only set nak and disable ep, and do not change
ep type or mps information and so on, because these information
should only be setted by ep_enable() or ep_disable() functions.
If clear the whole depctl register in dwc_otg_pcd_ep_stop_transfer,
it will cause the current transfer failed during dequeue.

TEST: set usb gadget work as mtp mode, copy data from the PC to
the device, cancel it, and copy again. If don't use this patch,
the mtp driver will block in mtp_read until we're online.

Change-Id: I5fb6c1645c24eb69b339488f8f613e19af1933d0
Signed-off-by: Feng Mingli <fml@rock-chips.com>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
2017-11-21 17:17:13 +08:00
Wu Liang feng
677495f54c USB: dwc_otg_310: pcd: fix duplicate send EP0 IN ZLP
From v3.00a dwc2 controller add a new interrupt 'StsPhseRcvd'
(Status Phase Received For Control Write) in DOEPINT. Refer
to dwc_otg_databook_v3.10, this interrupt is valid only for
control OUT endpoints, it indicates to the application that
the host has switched from data phase to the status phase
of a control write transfer. The application can use this
interrupt to ACK or STALL the Status phase.
We use v3.10a dwc2 on rockchip soc, but actually we don't
need to send Zero-Length Packet for the IN status phase
in StsPhseRcvd int handler in DMA mode. The handle_ep0->
ep0_complete_request will call do_setup_in_status_phase to
send EP0 IN ZLP.
TEST=set gadget work as usb rndis and connect to ubuntu.

Change-Id: I5203248a687ddbac097c74bb0f856385776df6d9
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
2017-11-21 17:17:13 +08:00
Zheng Yang
fe10dc7aae drm/rockchip: hdmi: add hdmi output colorimetry property
This patch add hdmi_output_colorimetry to support modify
hdmi output colorimetry. It could be following value:
	- None
	- IUT_2020
Default value is None, which means normal hdmi outout
colorimetry.

Change-Id: Ib4883fd0553d9d4193c7295812d2c1433724fe63
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
2017-11-21 17:04:49 +08:00
Zheng Yang
d4d8a3a789 drm/rockchip: hdmi: support set eotf and colorimetry
HDMI will set vop eotf and color space according to display mode.

Change-Id: I469d03dd1f14a2bcd75ed5c8e3227cd1d34eb354
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
2017-11-21 17:04:23 +08:00
Jason Song
82b9b65c36 arm64: dts: rockchip: px5: do not verify system and vendor
in order to speed up boottime.

Change-Id: I826e46518994f8f94acb4e48928d21cdcc8cf935
Signed-off-by: Jason Song <sxj@rock-chips.com>
2017-11-21 17:00:48 +08:00
Alex Zhao
96f622feda net: wireless: rockchip_wlan: add WEXT support for wifi pcba test
Change-Id: Id340b4765f623415384129d7f031d322c8789187
Signed-off-by: Alex Zhao <zzc@rock-chips.com>
2017-11-21 16:58:11 +08:00
Jianqun Xu
9db3188abd ARM: dts: rk312x-android: fix for reserved memory
1. remove "linux,cma-default", which used by cma default region
2. use size=< > to define region size

Change-Id: Ie801b3ecebf7c8b4118700f83c4284c42337b0c2
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2017-11-21 16:57:01 +08:00
Wu Liangqing
6ea1fbc8be ARM: dts: rk312x: add power-domains for vop/rga/mipi
Change-Id: I7ec9e10a858c51b210842fec1e5b5a35ef2f27d8
Signed-off-by: Wu Liangqing <wlq@rock-chips.com>
2017-11-21 16:38:44 +08:00
Finley Xiao
07f4ab81bf ARM: dts: rk312x: Assign clock usb480m to usb480m_phy
Change-Id: Ia5d6310a1ea37d946c4459965e72bddfe7807aba
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2017-11-20 21:22:35 +08:00
Tao Huang
4eef96a320 rk_fiq_debugger: use kthread_run
Use kthread_run instead of kthread_create when create kconsole thread.
We should call wake_up_process after kthread_create, otherwise kconsole
will keep in TASK_UNINTERRUPTIBLE state when loglevel=0. Then kconsole
will become hung task, and will trigger hung task timeout.

Change-Id: I440f6bed4ace755d51d6a91600735aaa7ee5925d
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2017-11-20 16:42:44 +08:00
Tao Huang
3735237f41 rk_serial: use kthread_run
Use kthread_run instead of kthread_create when create kconsole thread.
We should call wake_up_process after kthread_create, otherwise kconsole
will keep in TASK_UNINTERRUPTIBLE state when loglevel=0. Then kconsole
will become hung task, and will trigger hung task timeout.

Change-Id: I6b9edfc60a96202b356d0fe519073ea4665ae32a
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2017-11-20 16:16:16 +08:00
Zhen Chen
1919e3d736 MALI Utgard: RK: fix some potential problems about pm_runtime
Including:
	not to call pm_runtime_suspend() in mali_runtime_idle();
	make it more strict to power off the GPU.

Change-Id: I8c49dd13f57826f28606fd7a4e451707978b2906
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
2017-11-20 14:23:36 +08:00
Xinhuang Li
ac1e80931c arm64: rockchip_defconfig: enable PHY_ROCKCHIP_INNO_HDMI_PHY
hdmi driver need enable PHY_ROCKCHIP_INNO_HDMI_PHY

Change-Id: Ib09230b277b37e19aa35f2444212bcebd1cdc40e
Signed-off-by: Xinhuang Li <buluess.li@rock-chips.com>
2017-11-20 14:00:36 +08:00
Sandy Huang
353f10ebe7 drm/rockchip: init color space and eotf for LVDS/DP/eDP/MIPI
Change-Id: Ic874e5a9aef5e1ce965a824502e5909d25e39529
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2017-11-17 18:11:29 +08:00
Sandy Huang
6d31d15507 drm/rockchip: vop: add more debug message
Change-Id: I7a6a3ae556c5c83c4f045c979bf2a0343df57675
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2017-11-17 18:11:19 +08:00
Sandy Huang
1d4084c945 drm/rockchip: vop: add support color space convert
the CSC path include:
	1. plane color space convert;
	2. post BCSH module color space convert.

Change-Id: Ibfa7bccdb7d57a09a8d0147db65658627326262a
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2017-11-17 18:11:13 +08:00
Finley Xiao
6ecf7915f6 clk: rockchip: rk3036: leave apll for core, mac and lcdc only
In order not to affect other clocks, remove the apll from the
parent list of other clocks and only core, mac and lcdc can
select apll as parent.

Change-Id: I58b995f8ccf69c6564f74b5823f618a186030d70
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2017-11-17 18:02:56 +08:00