Commit Graph

608784 Commits

Author SHA1 Message Date
Caesar Wang
6cdbb3d210 arm64: rockchip_linux_defconfig: enable the gt1x for linux
As the rk3326 board used panel with the gt1x tp for working,

Change-Id: Id46765922a6986b34100c20db0b218090b36aa07
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
2018-04-25 15:19:34 +08:00
Caesar Wang
23ad893d02 input: touchscreen: add the ABS_X and ABS_Y report for gt1x
As the linux platform used the udev/mdev userspace mechanisms,
It needed the ABS_X and ABS_Y when the input event as the touchscreen.
Otherswise the userspace will identify as the keyboard.

Change-Id: I892ed37252d49c5457fe1f25fdd14dabce6ff9cf
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
2018-04-25 15:19:34 +08:00
Caesar Wang
ebb63d2100 arm64: rockchip_linux_defconfig: enable BIFROST Mali for linux
In order to support the rk3326 mali on linux platform, enabling the
BIFROST Mali config for linux.

As the mali driver had supported for linux with the below commits[0].
And the linux platform didn't need to loade the mali module for working.

commits[0]:
2aee160 MALI: bifrost: RK:
    There are a few modifications in some 'Kbuild' and 'Kconfig' files.
e5ccb3a MALI: bifrost: RK:
    add separate src dir of Bifrost driver for RK Linux device

Change-Id: I1cbd8515aab8a7bd23ab31db1743a4b8c723d81d
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
2018-04-25 14:13:46 +08:00
Zhen Chen
7920ebfd62 arm: rockchip_defconfig: enable CONFIG_MALI_PWRSOFT_765 for midgard DDK r18
Change-Id: Ica3b4a1feef6acd9e2d0881091ced3dc086465d3
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
2018-04-25 11:57:54 +08:00
Xinhuang Li
5e3370fa00 clk: rockchip: rk3368: set true clk for spdif
the mux_spdif_8ch_p is composed of spdif_8ch_src not spdif_8ch_pre

Change-Id: I7dd40e35078b2d012af2c777de763d14e93c3d4e
Signed-off-by: Xinhuang Li <buluess.li@rock-chips.com>
2018-04-25 11:30:04 +08:00
Xing Zheng
25d06f4256 arm64: dts: rockchip: add headphone detection by codec for RK3308 EVB
This patch using codec detect headphone via simple-card on
RK3308 EVB, it needs add the default widgets "Headphones"
for registering soc-jack.

Change-Id: I9819aa05e8d186d32d9363cfe619782783c67dd0
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
2018-04-25 09:39:09 +08:00
Xing Zheng
837dedffc4 ASoC: rk3308_codec: clean up and add support headphone detection
Since this signal line is directly connected to the GIC,
it has not been processed by the logic gate. Therefore,
when the headphone is plugged in, the status register
will remain high and when pulled out, the status register
will be converted to a low level.

However, the GIC can only accept high and rising edge
triggers, so when the headset is plugged in, it needs to
poll (~2s) to detect whether plug the headphone.

Change-Id: I321cd363103127911c503a63008882ffbc9c3633
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
2018-04-25 09:39:07 +08:00
Xing Zheng
ebe374e9c4 HACK-TO-REVERT: ASoC: simple-card: add properties hp/mic via internal codec
Change-Id: I0f99d73c3bed2954710607b773a945c354867b61
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
2018-04-25 09:39:05 +08:00
Xing Zheng
8fcec45416 HACK-TO-REVERT: ASoC: simple-card: add support hp/mic detect for internal codec
This is a local patch, because our simple-card is too
backward from upstream. This will take more time on
the cherry-pick patch and verification.

In order to speed up the progress, I put this local
patch and please revert it after I merge the new
patches of simple-card.

Change-Id: If566cf66c69d3a4fccbffc423433e6b724a23c04
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
2018-04-25 09:38:35 +08:00
Xing Zheng
6530305c0d ASoC: rk3308_codec: add suppot 4ch/6ch recording for codec
Change-Id: I4d5dd2c7d0f81966db0faf226b130601dcfcd0cf
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
2018-04-24 19:28:41 +08:00
William Wu
654983e94d arm: rockchip_linux_config: enable scsi scan async
Enable CONFIG_SCSI_SCAN_ASYNC to probe device on
different buses in parallel, it can speed up the
USB 3.0 UAS disk enumeration on rockchip platform.

Change-Id: I0db76b9326b9ea2700f925ed9d79c2c9470228e7
Signed-off-by: William Wu <william.wu@rock-chips.com>
2018-04-24 19:09:31 +08:00
William Wu
6592d7f0ba arm64: rockchip_linux_defconfig: enable scsi scan async
Enable CONFIG_SCSI_SCAN_ASYNC to probe device on
different buses in parallel, it can speed up the
USB 3.0 UAS disk enumeration on rockchip platform.

Change-Id: I30afc13928c8ea6eac16e3a96ef1f79b6bda56ae
Signed-off-by: William Wu <william.wu@rock-chips.com>
2018-04-24 19:09:31 +08:00
Finley Xiao
c9a1d109bd clk: rockchip: rk3288: remove the flag ROCKCHIP_PLL_SYNC_RATE for GPLL
If pwm regulator is enabled in uboot, the rate of pclk_pwm can't be
changed, otherwise the voltage may be abnormal. The gpll is the parent
clock of pclk_pwm, its rate also can't be changed.

Change-Id: I493de867ec6d0f8308a03f5ad6fe2244bbae7d11
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2018-04-24 16:14:54 +08:00
Sandy Huang
cd54066dfb drm/rockchip: vop: ignore crtc close when crtc is disabled
when in suspend state, the crtc clock is disabled, if we do reboot
at this time, the following call will lead to system panic:

	->rockchip_drm_platform_shutdown()
		->vop_crtc_close()

Change-Id: I1989d0da4d033d608d59587385da288789d9c2c1
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2018-04-24 14:41:27 +08:00
Tony Xie
6e3ddcaf17 mfd: rk808: Set only resetting pmic register for 817&809.
If the system needs hold register values when system will reboot.
need to set only resetting pmic register for 817&809 forcedly.

Change-Id: Ib4b850c86ec3079cd7e374bc96460ee1532854a2
Signed-off-by: Tony Xie <tony.xie@rock-chips.com>
2018-04-24 11:37:19 +08:00
Tao Huang
cea2a68180 soc: rockchip: rk_fiq_debugger: better console thread print
- Print by message other than by byte.
  Make messages more readable.
- Sleep while block other than busy loop.
  Reduce cpu usage while print a lot of messages.
- Show how many messages dropped.
  Let people know that the messages are not complete.
- Wake up console_task when needed.
  Reduce unneeded call wake_up_process.

Change-Id: I508d2f5b6671695413b01bc167d768ec9b614934
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
2018-04-24 11:10:59 +08:00
Huicong Xu
09aeb6ebfb arm64: dts: rockchip: add hdmi hdcp2 node for rk3399
Change-Id: Ie78fbdc226d856a20c2da40e4166e7b23ed27aba
Signed-off-by: Huicong Xu <xhc@rock-chips.com>
2018-04-24 09:23:31 +08:00
lihuang
2aee160e20 MALI: bifrost: RK: There are a few modifications in some 'Kbuild' and 'Kconfig' files.
A new config MALI_BIFROST_FOR_LINUX is introduced to specify which directory of Birfrost to use.

Change-Id: I1f4a01e963073c68238b08f930b196aa799b8e17
Signed-off-by: Putin Lee <putin.li@rock-chips.com>
2018-04-23 15:49:26 +08:00
lihuang
e5ccb3a62b MALI: bifrost: RK: add separate src dir of Bifrost driver for RK Linux device
The version of Bifrost DDK used in RK Linux device is different from the one
    used in Android platforms.
    It might be convenient to have a separate src directory for it.

    The new directory drivers/gpu/arm/bifrost_for_linux is copied from
    drivers/gpu/arm/bifrost of commit 25c5dc5a92y.
    It's on DDK r8p0-01rel0

Change-Id: I3b8b4f071104faf988e56b9b61d41378831943bb
Signed-off-by: Putin Lee <putin.li@rock-chips.com>
2018-04-23 15:49:26 +08:00
Meng Dongyang
f71c468ab1 usb: fix error of reference count of ep
The reference count of endpoints is same with the interface
number in the quirk case of USB_QUIRK_AUTO_SUSPEND. This will
result in a break of unregister interface cycle. As a result,
the device only unregister the first interface when disconnect.
This patch use "j" instead of "i" to solve this problem.

Fixes: f092c995c3 ("USB: core: flush pending URBs for unusual USB3 core when disable device")
Change-Id: I7aba63c0d38768cb956394a702bb61ae3f3250ba
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
2018-04-23 11:57:29 +08:00
Xing Zheng
d0c026907f arm64: dts: rockchip: move acodec sound node to rk3308-evb-v10.dtsi
The acodec part is shared with the RK3308 EVB, so that users
can select an external sound card device as required.

Change-Id: I42c1de879ba14a693c161a401ecf5ba6a8d39cd0
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
2018-04-21 15:01:14 +08:00
Huicong Xu
2c20d416a6 ARM: dts: rockchip: add hdmi node for rk3128
Change-Id: I56437be5982740605052bc5d06e801996b198478
Signed-off-by: Huicong Xu <xhc@rock-chips.com>
2018-04-19 18:54:04 +08:00
shengfei Xu
2d0ae7baf8 arm64: dts: rockchip: update opp-table for rk3308
Analysis the data of different leakage, if the frequency is 1.2G,
then the voltage must be 1200mV.

Change-Id: I5160cf2ec7bab48172f549b138881656b9538cd3
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
2018-04-19 18:43:29 +08:00
Nickey Yang
bea3565063 rk: Makefile: CROSS_COMPILE use gcc-linaro-6.3.1-2017.05 if available on arm
Change-Id: I8e0a675615a3541e4e0996507ec8baf246991507
Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
2018-04-19 18:41:04 +08:00
Sandy Huang
f3ddf22d15 arm: dts: rockchip: add grf reference for vop
add grf reference for rk3288,rk3368,px30 vop

Change-Id: I89b620b2df45f83bdfc36dd64168107beee9b9fb
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2018-04-19 18:39:34 +08:00
Sandy Huang
c2b587fa35 drm/rockchip: vop: config dclk invert from grf register
Some platform like rk3288,rk3368,px30, we need to config grf
register to invert dclk polarity when connector is rgb or lvds.

Change-Id: I9ef9ce09f050ee42c0543d415a9baac1f50a0848
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2018-04-19 18:39:34 +08:00
Sandy Huang
04e6e5c7a0 drm/rockchip: vop: add support dclk invert config
Since some special hardware or panel need to invert dclk,
so we add dclk invert config at dts display timing node:

dts sample:

display-timings {
    timing0: timing0 {
        ...
        pixelclk-active = <1>;
        ...
    }
}

Change-Id: I64f053ecda0f607bdd6fd392a0922489502ac274
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
2018-04-19 18:39:34 +08:00
Rocky Hao
27e0c547c2 arm64: dts: rockchip: update pinctrl for px30
1 move pinctrl into board level dts file.
2 remove pinctrl for sleep state.
in sleep state we do not change pin control and keep the pin control
in otp state, which is used by atf as a flag to control pmic's state.

Change-Id: Ib68b20d4f4ba79d99255f1deb509ff8a741deef2
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
2018-04-19 18:35:39 +08:00
Finley Xiao
46d3be8026 Revert "arm64: dts: rockchip: rk3308-evb-v10: Add regulator-early-min-microvolt for core"
This reverts commit 602e4a0969.

Change-Id: If70202a1f8b6837c8804f054e0350b5a63c2e6c2
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2018-04-19 18:35:03 +08:00
Finley Xiao
a4e0323d13 regulator: of: Use regulator-init-microvolt as early minimum
Change-Id: If491089520b3228484357e08482ae0e955b1226a
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2018-04-19 18:34:36 +08:00
Finley Xiao
1c571cf228 regulator: core: Fix min_uV and max_uV error of regulator_release_early_min_volt
Fixes: 6882654464 ("regulator: core: Add support to limit min_uV during system startup")
Change-Id: Ie281f77d9e36cd8bc72b075bb7b18b9cb0eb7ec5
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2018-04-19 18:34:29 +08:00
Ziyuan Xu
64298fd57f arm64: dts: rockchip: assign 400KHz to i2c bus clock for rk3308-evb
Reduce about 8ms for led driver initialization time

before:
initcall is31fl32xx_driver_init+0x0/0x20 returned 0 after 14832 usecs

after:
initcall is31fl32xx_driver_init+0x0/0x20 returned 0 after 6270 usecs

Change-Id: I3154efa154a484ccf8f9974c8148ff9895b1f68a
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
2018-04-19 17:01:52 +08:00
Nickey Yang
1e9f9ce3af arm: dts: rockchip: force the bootargs for rk3288 linux
Force bootargs for bring up rk3288-linux with RKIMG_BOOT.

Change-Id: I43d03e51abddeb4c29fb4c94bbd2dba774b4abe5
Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
2018-04-19 17:01:25 +08:00
Zhangbin Tong
5c831a95a1 firmware: rockchip_sip: Export the sip_smc_vpu_reset API
Change-Id: Id5afcc8d9afc7e5e1cb188a5d4b7a8f1de3f46e8
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
2018-04-18 17:25:32 +08:00
lanshh
1b20f713f1 arm64: dts: rockchip: rk3326-evb-ai-va-v10
1. add lsensor and psensor
2. remove unused sensors
3. add unprepare-delay-ms up to 40 for panel device
4. add bt sco audio support

Change-Id: Iedde0567f0cf4eaa099f7323e812a58f88c58d1e
Signed-off-by: lanshh <lsh@rock-chips.com>
2018-04-18 17:24:20 +08:00
Finley Xiao
602e4a0969 arm64: dts: rockchip: rk3308-evb-v10: Add regulator-early-min-microvolt for core
Change-Id: I2938c0ab6cbf383d49a2f41a6013c1df2567c22c
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2018-04-18 17:22:03 +08:00
Finley Xiao
3cdb4852bc arm64: dts: rockchip: rk3308: Add dmc node
Change-Id: I50a9b7efaf1a1556bd4aed669a30477f292d06b8
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2018-04-18 17:22:03 +08:00
Finley Xiao
26b6eb8f9d arm64: dts: rockchip: rk3308: Change cpu opp-microvolt form one entry to three
Single entry is for target voltage and three entries are for
<target min max> voltages. Change cpu opp-microvolt form one entry to
three entries and set maximum acceptable voltage to a high value so that
regulator device can supply multiple consumers at the same time.

Change-Id: I72e2efb9828432ee29773c8e1939a59062127ff7
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2018-04-18 17:22:03 +08:00
Finley Xiao
b63f27bbc9 PM / devfreq: rockchip_dmc: Add support for rk3308
Change-Id: Iff7deff76a02360021aacaeaa0d509593f88fb2d
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2018-04-18 17:22:03 +08:00
Finley Xiao
7eedb273de PM / devfreq: rockchip_dmc: Adjust voltage according to opp table when probe
If dmc node doesn't contain 'system-status-freq' and auto-freq is disabled,
devfreq feature won't be added and only to adjust voltage according to opp
table.

Change-Id: Iaf9d9f61938babff2e08719e2285a8554cfa9389
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2018-04-18 17:22:03 +08:00
Finley Xiao
4f67042620 clk: rockchip: rk3308: Add sclk_ddrc
Change-Id: I5cbec62ab78623c1adcb79ac8990e3620223de23
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2018-04-18 17:22:03 +08:00
Finley Xiao
6882654464 regulator: core: Add support to limit min_uV during system startup
Now a regulator device can supply multiple consumers at the same time,
if a consumer starts and set a low voltage, another consumer doesn't
start in kernel but has been set a high frequency in bootloader will
abort.

This patch Adds support to limit min_uV during kernel startup to make
sure the voltage can suit the needs of all consumers.

Change-Id: Ibd16a8e44916798021e2470c90a8e3488df206f4
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
2018-04-18 17:22:03 +08:00
Xuhanrui
859175c093 ARM: dts: add secure drm buffer for rk3229
default disabled

Change-Id: Iea0bfa746de22ba59e356e9eb1f2f957fabcda50
Signed-off-by: Hery Xu <xhr@rock-chips.com>
2018-04-18 16:59:48 +08:00
Zhangbin Tong
440b073db3 ARM: dts: add dts files for rk3128h
Add initial device tree nodes for rk3128h SoC

Change-Id: If2e5e53e3b78ee6272b94be273b90f0b4861341a
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
2018-04-18 14:08:50 +08:00
Leo Wen
9770324ee5 arm64: dts: rockchip: support for rk3326 linux
Change-Id: Idb2133eb6f2d99eaa69def1909968cded6a9c215
Signed-off-by: Leo Wen <leo.wen@rock-chips.com>
2018-04-18 11:42:23 +08:00
Leo Wen
8363eaa39f arm64: rockchip_linux_defconfig: add some configs for rk3326 linux
Change-Id: I52bfb345e64cf8ae0bbd24ff737e50cbfbfb5861
Signed-off-by: Leo Wen <leo.wen@rock-chips.com>
2018-04-18 11:42:23 +08:00
Xing Zheng
ebe6ab37d9 ASoC: rk3308_codec: add hp-ctl and rename to spk-ctl gpio
Change-Id: I67a3c770b06c8f53afdac89bd3423ad776d6ec01
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
2018-04-17 20:54:17 +08:00
Xing Zheng
63ce58c3fa arm64: dts: rockchip: clean up output ctl gpios for rk3308
Add support hp-ctl gpio for amic board, and rename
to spk-ctl from dtsi file. Usually, we should assign
these output ctl gpios according to the specific
product type.

Change-Id: Icf0c29f61bed3c0f48069b9e38ddf47d921fed26
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
2018-04-17 20:54:17 +08:00
Xing Zheng
68e8641c53 ASoC: rk3308_codec: update and apply many advices from vendor
We need to configure each ADC in parallel as much as
possible. The infos from vendor, we add some new
registers to make effect better:

1/ optimize the flows for enable/disable ADC/DAC flows
2/ add support fade-out digital gains for de-pop
3/ many updates

Change-Id: I2e72451201010de96e7dc5c22ff3384ce71767ea
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
2018-04-17 20:54:17 +08:00
Qiang Wu
623da8f83a wifi: add marvell 88W8977 wifi module driver
Change-Id: Ia1e254e2c084621141d837be385d9198962be1cd
Signed-off-by: Qiang Wu <xianlee.wu@rock-chips.com>
2018-04-17 18:54:27 +08:00