This reverts commit 25de28e49e as it
conflicts with upstream kunit changes in 6.0-rc1.
If it is still needed, please submit it usptream as it is adding a new
user/kernel api for some unknown reason.
Bug: 231160619
Cc: Joe Fradley <joefradley@google.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
Change-Id: I12650bf4ca232cf416969c1b032003df80125ffc
This reverts commit 39f5348cf7 as it
conflicts with upstream kunit changes in 6.0-rc1.
If this is still needed, please submit upstream.
Bug: 231160619
Cc: Joe Fradley <joefradley@google.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
Change-Id: I17cc72883f87ab7647cc9e21e7770f79f5400a65
This export was removed by the upstream commit 6390383b67
("thermal/core: Remove unneeded EXPORT_SYMBOLS") since it's only used by
the thermal frameworks. Pixel 6 is using this symbol for it's external
thermal driver module and is needed for GKI testing.
Bug: 242078480
Signed-off-by: Will McVicker <willmcvicker@google.com>
Change-Id: I5f704055f53816c1e3fdfd776c2d253dffbdab72
The sched_blocked_reason tracepoint introduced in android common
in commit 1f52bb8bfd ("ANDROID: trace: sched: add sched
blocked tracepoint which dumps out context of sleep.") calls
get_wchan().
Unfortunately, get_wchan() was reworked upstream in commit
42a20f86dc ("sched: Add wrapper for get_wchan() to keep task
blocked"), such that it now takes the task pi_lock.
This causes a deadlock, as we are already holding the pi_lock
in try_to_wakeup() when we call trace_sched_blocked_reason().
This patch reworks the tracepoint so that it calls __get_wchan()
which does not take the lock, avoiding the deadlock.
Test: Manual: run perfetto with ftrace_events: "sched/sched_blocked_reason" in the config
Fixes: 1f52bb8bfd ("ANDROID: trace: sched: add sched blocked tracepoint which dumps out context of sleep.")
Signed-off-by: John Stultz <jstultz@google.com>
Change-Id: I94e4251418d709a7b9292b3301c6cadd8fa3fb23
- Remove pci_get_legacy_ide_irq(); use ATA_PRIMARY_IRQ() and
ATA_SECONDARY_IRQ() instead (Stafford Horne)
- Remove isa_dma_bridge_buggy, except for x86_32, the only place it's used
(Stafford Horne)
- Define ARCH_GENERIC_PCI_MMAP_RESOURCE for csky (Stafford Horne)
- Move common PCI definitions that arches sometimes override to
asm-generic/pci.h (Stafford Horne)
- Include <linux/isa-dma.h> for 'isa_dma_bridge_buggy' when needed
(bisection hole here) (Randy Dunlap)
* pci/header-cleanup-immutable:
PCI: Stub __pci_ioport_map() for arches that don't support it at all
x86/cyrix: include header linux/isa-dma.h
asm-generic: Add new pci.h and use it
csky: PCI: Define ARCH_GENERIC_PCI_MMAP_RESOURCE
PCI: Move isa_dma_bridge_buggy out of asm/dma.h
PCI: Remove pci_get_legacy_ide_irq() and asm-generic/pci.h
- Drop of_match_ptr() to avoid unused variables when CONFIG_OF is unset
(Bjorn Helgaas)
- Fix ARM pci_remap_iospace() when CONFIG_MMU unset to avoid build errors
(Pali Rohár)
* pci/misc:
PCI/ACPI: Update link to PCI firmware specification
PCI: Drop of_match_ptr() to avoid unused variables
- Convert to new *_PM_OPS macros to avoid need for "#ifdef CONFIG_PM_SLEEP"
or "__maybe_unused" (Bjorn Helgaas)
* pci/ctrl/pm-ops:
PCI: Convert to new *_PM_OPS macros
- Add DT binding and driver support for Versal CPM5 Gen5 Root Port (Bharat
Kumar Gogada)
* pci/ctrl/xilinx-cpm:
MAINTAINERS: Add Xilinx Versal CPM Root Port maintainers
PCI: xilinx-cpm: Add support for Versal CPM5 Root Port
dt-bindings: PCI: xilinx-cpm: Add Versal CPM5 Root Port
- Use devm_kasprintf() instead of simple kasprintf() (Subramanian Mohan)
- Add [8086:7D0B] and [8086:AD0B] devices to VMD driver (Francisco Munoz)
* pci/ctrl/vmd:
PCI: vmd: Add DID 8086:7D0B and 8086:AD0B for Intel MTL SKUs
PCI: vmd: Use devm_kasprintf() instead of simple kasprintf()
- Fix tegra_pcie_config_ep() power management in error path (Miaoqian Lin)
- Convert DT binding to json-schema (Vidya Sagar)
- Add DT bindings and driver support for Tegra234 Root Port and Endpoint
mode (Vidya Sagar)
- Disable MSI for Tegra234 Root Ports so they use INTx for all events (PCIe
doesn't allow mixing INTx and MSI/MSI-X) (Vidya Sagar)
- Search for Vendor-Specific RAS-DEC capability instead of hard-coding
offset (Vidya Sagar)
- Fix unintentional APPL_INTR_STATUS_L0 value overwrite in Root Port
interrupt handling (Vidya Sagar)
- Clear Bandwidth Management interrupt status bit to avoid interrupt storm
(Vidya Sagar)
- Set default Max Payload Size to 256 bytes (Vidya Sagar)
- Fix offset when clearing bit in Data Link Feature capability (Vidya
Sagar)
- Extend Endpoint mode support to devices beyond Controller-5 (Vidya Sagar)
* pci/ctrl/tegra194:
PCI: tegra194: Add Tegra234 PCIe support
PCI: tegra194: Extend Endpoint mode support
PCI: tegra194: Fix link up retry sequence
PCI: tegra194: Clean up the exit path for Endpoint mode
PCI: tegra194: Enable support for 256 Byte payload
PCI: tegra194: Clear bandwidth management status
PCI: tegra194: Fix Root Port interrupt handling
PCI: tegra194: Find RAS DES PCIe capability offset
Revert "PCI: tegra194: Rename tegra_pcie_dw to tegra194_pcie"
PCI: Disable MSI for Tegra234 Root Ports
dt-bindings: PCI: tegra234: Add schema for tegra234 Endpoint mode
dt-bindings: PCI: tegra234: Add schema for tegra234 Root Port mode
dt-bindings: PCI: tegra194: Convert to json-schema
PCI: tegra194: Fix PM error handling in tegra_pcie_config_ep()
# Conflicts:
# drivers/pci/controller/dwc/pcie-designware.h
# drivers/pci/controller/dwc/pcie-tegra194.c
- Add PHY clock source implementation (Dmitry Baryshkov)
- Use new clk_regmap_phy_mux_ops for gcc-sm8450 and gcc-sc7280 PCIe pipe
clocks (Dmitry Baryshkov)
- Set up rev 2.1.0 PARF_PHY before enabling clocks (Christian Marangi)
- Power on PHY before accessing IPQ8074 DBI registers to avoid boot hangs
(Robert Marko)
- Power on PHY before accessing DBI registers on all variants for
consistency (Robert Marko)
- Remove unnecessary pipe_clk handling since this is done in PHY drivers
(Dmitry Baryshkov)
- Drop manual pipe_clk_src handling (Dmitry Baryshkov)
- Move GEN3_RELATED DBI definitions to common dwc header (Baruch Siach)
- Define slot capabilities using generic PCI_EXP_SLTCAP_* macros (Baruch
Siach)
- Add IPQ60xx support (Selvam Sathappan Periakaruppan)
- Fix DT description typo (Baruch Siach)
- Fix DT "compatibles" typo (Johan Hovold)
- Allow ASPM L1 and substates for 2.7.0 (Krishna chaitanya chundru)
* pci/ctrl/qcom:
PCI: qcom: Allow ASPM L1 and substates for 2.7.0
dt-bindings: PCI: qcom: Fix reset conditional
dt-bindings: PCI: qcom: Fix description typo
PCI: qcom: Add IPQ60xx support
PCI: qcom: Define slot capabilities using PCI_EXP_SLTCAP_*
PCI: dwc: Move GEN3_RELATED DBI definitions to common header
PCI: qcom: Drop manual pipe_clk_src handling
PCI: qcom: Remove unnecessary pipe_clk handling
PCI: qcom: Power on PHY before DBI register accesses
PCI: qcom: Power on PHY before IPQ8074 DBI register accesses
PCI: qcom: Set up rev 2.1.0 PARF_PHY before enabling clocks
clk: qcom: gcc-sc7280: use new clk_regmap_phy_mux_ops for PCIe pipe clocks
clk: qcom: gcc-sm8450: use new clk_regmap_phy_mux_ops for PCIe pipe clocks
clk: qcom: regmap: add PHY clock source implementation
- Fix refcount leak in mtk_pcie_init_irq_domains() (Miaoqian Lin)
- Print decoded LTSSM state when the link doesn't come up (Jianjun Wang)
* pci/ctrl/mediatek-gen3:
PCI: mediatek-gen3: Print LTSSM state when PCIe link down
PCI: mediatek-gen3: Fix refcount leak in mtk_pcie_init_irq_domains()
- Add Airoha EN7532 to DT binding (John Crispin)
- Allow building of mediatek driver for ARCH_AIROHA (Felix Fietkau)
* pci/ctrl/mediatek:
PCI: mediatek: Allow building for ARCH_AIROHA
dt-bindings: PCI: mediatek: Add Airoha EN7532 support
- Wrap ARM64-specific MCFG quirks in #ifdef so Loongson can use the file
(Huacai Chen)
- Use generic (not 32-bit only) config accesses for LS2K/LS7A (Huacai Chen)
- Add ACPI and MCFG support for Loongson LS7A (Huacai Chen)
- Avoid config reads to non-existent LS2K/LS7A devices because a hardware
defect causes machine hangs (Huacai Chen)
- Work around LS7A integrated devices that report incorrect Interrupt Pin
values (Jianmin Lv)
* pci/ctrl/loongson:
PCI: loongson: Work around LS7A incorrect Interrupt Pin registers
PCI: loongson: Don't access non-existent devices
PCI: loongson: Add ACPI init support
PCI: loongson: Use generic 8/16/32-bit config ops on LS2K/LS7A
PCI/ACPI: Guard ARM64-specific mcfg_quirks
- Factor out ref clock disables to match enables (Bjorn Helgaas)
- Collect clock enables in imx6_pcie_clk_enable() (Richard Zhu)
- Propagate regulator and clock errors back to .host_init() caller (Richard
Zhu)
- Disable i.MX6QDL clock when disabling ref clocks (Richard Zhu)
- Call host init function directly in resume instead of duplicating the
code (Richard Zhu)
- Turn off regulators when suspending (Richard Zhu)
- Make link being down a non-fatal error so probe doesn't fail (Richard
Zhu)
- Start link in resume only if it was up before suspend to reduce resume
time (Richard Zhu)
- Move PHY init and power-on out of clock- and reset-related functions
(Richard Zhu)
- Rework suspend callback to be more symmetric with resume (Richard Zhu)
- Set PCIE_DBI_RO_WR_EN before writing DBI registers (Richard Zhu)
- Allow speeds faster than Gen2 (Richard Zhu)
* pci/ctrl/imx6:
PCI: imx6: Support more than Gen2 speed link mode
PCI: imx6: Set PCIE_DBI_RO_WR_EN before writing DBI registers
PCI: imx6: Reformat suspend callback to keep symmetric with resume
PCI: imx6: Move the imx6_pcie_ltssm_disable() earlier
PCI: imx6: Disable clocks in reverse order of enable
PCI: imx6: Do not hide PHY driver callbacks and refine the error handling
PCI: imx6: Reduce resume time by only starting link if it was up before suspend
PCI: imx6: Mark the link down as non-fatal error
PCI: imx6: Move regulator enable out of imx6_pcie_deassert_core_reset()
PCI: imx6: Turn off regulator when system is in suspend mode
PCI: imx6: Call host init function directly in resume
PCI: imx6: Disable i.MX6QDL clock when disabling ref clocks
PCI: imx6: Propagate .host_init() errors to caller
PCI: imx6: Collect clock enables in imx6_pcie_clk_enable()
PCI: imx6: Factor out ref clock disable to match enable
PCI: imx6: Move imx6_pcie_clk_disable() earlier
PCI: imx6: Move imx6_pcie_enable_ref_clk() earlier
PCI: imx6: Move PHY management functions together
PCI: imx6: Move imx6_pcie_grp_offset(), imx6_pcie_configure_type() earlier
PCI: imx6: Convert to NOIRQ_SYSTEM_SLEEP_PM_OPS()
- Move samsung phy-exynos-pcie init all to exynos5433_pcie_phy_init()
instead of splitting across phy_init() and phy_power_on() (Marek
Szyprowski)
- Call phy_init() before phy_power_on() for samsung phy-exynos-pcie, as
required by the PHY programming model (Marek Szyprowski)
* pci/ctrl/exynos:
PCI: exynos: Correct generic PHY usage
phy: samsung: phy-exynos-pcie: sanitize init/power_on callbacks
- Remove unused struct dw_edma_chip.irq (Frank Li)
- Move eDMA private data from struct dw_edma to struct dw_edma_chip (Frank
Li)
- Convert "struct dw_edma_region rg_region" to "void __iomem *reg_base"
since only the virtual address (not physical address or size) is used
(Frank Li)
- Rename "*_ch_cnt" to "ll_*_cnt" to reflect actual usage (Frank Li)
- Drop dma_slave_config.direction field usage (Serge Semin)
- Fix eDMA Rd/Wr-channels and DMA-direction semantics (Serge Semin)
- Add chip-specific DW_EDMA_CHIP_LOCAL flag to indicate that local eDMA
doesn't require generating MSIs to remote (Frank Li)
- Enable DMA tests for endpoints that support it (Frank Li)
* pci/ctrl/dwc-edma:
PCI: endpoint: Enable DMA tests for endpoints with DMA capabilities
dmaengine: dw-edma: Add support for chip-specific flags
dmaengine: dw-edma: Fix eDMA Rd/Wr-channels and DMA-direction semantics
dmaengine: dw-edma: Drop dma_slave_config.direction field usage
dmaengine: dw-edma: Rename wr(rd)_ch_cnt to ll_wr(rd)_cnt in struct dw_edma_chip
dmaengine: dw-edma: Change rg_region to reg_base in struct dw_edma_chip
dmaengine: dw-edma: Detach the private data and chip info structures
dmaengine: dw-edma: Remove unused irq field in struct dw_edma_chip
- Stop link on host_init errors and de-initialization (Serge Semin)
- Add support for unrolled iATU register space in dw_pcie_disable_atu()
(Serge Semin)
- Disable outbound windows only for controllers that use iATU (Serge Semin)
- Set INCREASE_REGION_SIZE flag based on limit address, not on the size,
since even a small size may cross a 4GB boundary (Serge Semin)
- Deallocate EPC memory on dw_pcie_ep_init() errors to avoid a leak (Serge
Semin)
- Always enable CDM check if "snps,enable-cdm-check" exists instead of
exiting early if the optional "num-lanes" was absent (Serge Semin)
- Simplify detection of whether we're using unrolled iATU registers (Serge
Semin)
- Make dw_pcie_link_up() more generic by using dw_pcie_readl_dbi() instead
of readl() (Serge Semin)
- Add dw_pcie_start_link() and dw_pcie_stop_link() wrappers to factor out
checks for ops being implemented (Serge Semin)
- Move io_cfg_atu_shared to struct pcie_port and rename to cfg0_io_shared,
since it's not used by dwc common code or dwc endpoint code (Serge Semin)
- Rename struct pcie_port to dw_pcie_rp to indicate that it's
DesignWare-specific (Serge Semin)
- Drop unused struct dw_plat_pcie regmap pointer (Serge Semin)
- Fix some coding style issues (Serge Semin)
- Log link speed and width if it comes up (Serge Semin)
- Save DWC IP core version in native format as read from
PORT_LOGIC.PCIE_VERSION_OFF register (Serge Semin)
- Read DWC IP core version from PORT_LOGIC.PCIE_VERSION_OFF (Serge Semin)
- Add macros to compare Synopsys IP core versions (Serge Semin)
- Drop manual DWC IP core version setup from intel-gw and tegra194 (Serge
Semin)
- Add dw_pcie_ops.host_deinit() callback (Serge Semin)
- Drop enum dw_pcie_as_type in favor of PCIE_ATU_TYPE_MEM/IO (Serge Semin)
- Drop enum dw_pcie_region_type in favor of PCIE_ATU_REGION_DIR_IB/OB
(Serge Semin)
- Simplify in/outbound iATU setup methods and reduce duplicated code (Serge
Semin)
- Detect iATU region size from hardware (Serge Semin)
- Validate iATU outbound mappings against hardware constraints (Serge
Semin)
- Check for errors in iATU setup (Serge Semin)
- Allocate a 32-bit DMA-able page to be MSI target instead of using a
driver data structure that may not be addressable with 32-bit address
(Will McVicker)
- Use the bitmap API to allocate bitmaps instead of open-coding it
(Christophe JAILLET)
- Correct dw_pcie_free_msi() checking for when to remove IRQ handler and
data (Dmitry Baryshkov)
- Split MSI init to new dw_pcie_msi_host_init() function (Dmitry Baryshkov)
- Convert struct pcie_port.msi_irq to an array so we can support more than
32 MSI interrupts (Dmitry Baryshkov)
- Handle MSIs routed to multiple GIC interrupts for Qualcomm platforms with
groups of 32 MSI vectors (Dmitry Baryshkov)
- Add additional MSI interrupts to qcom DT (Dmitry Baryshkov)
* pci/ctrl/dwc:
dt-bindings: PCI: qcom: Support additional MSI vectors
PCI: dwc: Handle MSIs routed to multiple GIC interrupts
PCI: dwc: Convert struct pcie_port.msi_irq to an array
PCI: dwc: Split MSI IRQ parsing/allocation to a separate function
PCI: dwc: Correct msi_irq condition in dw_pcie_free_msi()
PCI: dwc: Use the bitmap API to allocate bitmaps
PCI: dwc: Fix MSI msi_msg DMA mapping
PCI: dwc: Check iATU in/outbound range setup status
PCI: dwc: Validate iATU outbound mappings against hardware constraints
PCI: dwc: Add iATU regions size detection procedure
PCI: dwc: Simplify in/outbound iATU setup methods
PCI: dwc: Drop enum dw_pcie_region_type in favor of PCIE_ATU_REGION_DIR_IB/OB
PCI: dwc: Drop enum dw_pcie_as_type in favor of PCIE_ATU_TYPE_MEM/IO
PCI: dwc: Add dw_pcie_ops.host_deinit() callback
PCI: tegra194: Drop manual DW PCIe controller version setup
PCI: intel-gw: Drop manual DW PCIe controller version setup
PCI: dwc: Add macros to compare Synopsys IP core versions
PCI: dwc: Read DWC IP core version from register
PCI: dwc: Use native DWC IP core version representation
PCI: dwc: Detect iATU settings after getting "addr_space" resource
PCI: dwc: Log link speed and width if it comes up
PCI: dwc-plat: Drop dw_plat_pcie_of_match[] forward declaration
PCI: dwc-plat: Drop unused regmap pointer
PCI: dwc-plat: Simplify dw_plat_pcie_probe() return values
PCI: dwc: Rename struct pcie_port to dw_pcie_rp
PCI: dwc: Move io_cfg_atu_shared to struct pcie_port
PCI: dwc: Add start_link/stop_link inlines
PCI: dwc: Reuse local pointer to the resource data
PCI: dwc: Organize local variable usage
PCI: dwc: Convert dw_pcie_link_up() to use dw_pcie_readl_dbi()
PCI: dwc: Simplify unrolled iATU detection
PCI: dwc: Add newlines to log messages
PCI: dwc: Add braces to multi-line if-else statements
PCI: dwc: Always enable CDM check if "snps,enable-cdm-check" exists
PCI: dwc: Deallocate EPC memory on dw_pcie_ep_init() errors
PCI: dwc: Set INCREASE_REGION_SIZE flag based on limit address
PCI: dwc: Disable outbound windows only for controllers using iATU
PCI: dwc: Add unroll iATU space support to dw_pcie_disable_atu()
PCI: dwc: Stop link on host_init errors and de-initialization
- Remove unnecessary forward declarations (Jim Quinlan)
- Prevent config space access when link is down (Jim Quinlan)
- Split post-link up initialization to brcm_pcie_start_link() (Jim Quinlan)
- Enable child bus device regulators described under Root Ports in DT (Jim
Quinlan)
- Disable/enable regulators in suspend/resume (Jim Quinlan)
- Rename .map_bus() functions to end with 'map_bus' as they do in other
drivers (Jim Quinlan)
* pci/ctrl/brcmstb:
PCI: brcmstb: Rename .map_bus() functions to end with 'map_bus'
PCI: brcmstb: Disable/enable regulators in suspend/resume
PCI: brcmstb: Enable child bus device regulators from DT
PCI: brcmstb: Split post-link up initialization to brcm_pcie_start_link()
PCI: brcmstb: Prevent config space access when link is down
PCI: brcmstb: Remove unnecessary forward declarations
- Add support for AER capability on emulated bridge (Pali Rohár)
- Add support for Slot capability on emulated bridge (Pali Rohár)
* pci/ctrl/aardvark:
PCI: aardvark: Fix reporting Slot capabilities on emulated bridge
PCI: aardvark: Add support for AER registers on emulated bridge
- Replace sparc pci_mmap_page_range() wrapper. This still leaves a
sparc-specific pci_mmap_resource_range(), but it's only one interface
instead of two (Arnd Bergmann)
- Remove sparc-specific pci_mmap_resource_range() by implementing
pci_iobar_pfn(). This removes the ability to map the entire PCI I/O
space using /proc/bus/pci, but we believe that's already been broken
since v2.6.28 (Arnd Bergmann)
* pci/resource:
sparc: Use generic pci_mmap_resource_range()
PCI: Remove pci_mmap_page_range() wrapper
- Recognize disconnected devices so we don't bother trying to set them to
"frozen" or "normal" state (Christoph Hellwig)
- Clear PCI Status register during enumeration in case firmware left errors
logged (Kai-Heng Feng)
- Configure ECRC for every device, including hot-added ones (Stefan Roese)
- Keep AER error reporting enabled for switches (Stefan Roese)
- Enable error reporting for all devices that support AER (Stefan Roese)
- Iterate over error counters instead of error strings to avoid printing
junk in AER sysfs counters (Mohamed Khalfella)
* pci/err:
PCI/AER: Iterate over error counters instead of error strings
PCI/AER: Enable error reporting when AER is native
PCI/portdrv: Don't disable AER reporting in get_port_device_capability()
PCI/AER: Configure ECRC for every device
PCI: Clear PCI_STATUS when setting up device
PCI/ERR: Recognize disconnected devices in report_error_detected()
