With multi core patch it will be lack of core id at old combo
hardware probe process.
The error log is shown below on device probe:
mpp_vepu2 ff650000.vepu: can not attach device with same id 0
And also kernel crach on mpp library init.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: I92ea5fc3575dad9236878235a396d02da7a3fba5
make ARCH=arm64 rockchip_linux_defconfig rk3588_edge.config
Signed-off-by: Addy Ke <addy.ke@rock-chips.com>
Change-Id: Id7eb2364c0f65e4d3954eb4c7f66d4bfd8acdfcf
For support kernel logo, don't disable phy when phy probe.
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I04168e1374104480c1fa611539938f1374967bd7
The userspace transmits private data through request.signal,
vcnt event return it to userspace through vbl.userdata
Change-Id: I8295a3d4fd91430b3b9fac6c5b6b526e1f266f24
Signed-off-by: Ai ShaoXiang <aisx@rock-chips.com>
Add config option to modularize the DP interface support of DRM.
./ksize.sh drivers/gpu/drm/
before ksize: 536734 Bytes
after kszie: 487941 Bytes
save about: 48793 Bytes
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Change-Id: Ie2157fad13a71a3099b79085e0de40efe4b4ab34
Some times we only want use some of the module
of rockchip vop driver(et: rkmpp some times only
wat to use rockchip drm gem),
the real vop drivers is not needed to load.
Add a virtual vop driver let the rockchip drm launch.
Enabled by add following to you dts:
display_subsystem: display-subsystem {
compatible = "rockchip,display-subsystem";
}
Change-Id: Id6cd14a735eabaf8b4949330d56f77354e50c51c
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Here are 2 hdmi phy pll can use for video port dclk.
There are strategies of how to use hdmi phy pll as follow:
1. hdmi phy pll can be used for video port0/1/2 when output
format under 4K@60Hz;
2. When a video port connect both hdmi0 and hdmi1(may also
connect other output interface), it must hold the hdmi0
and hdmi1 phy pll, and other video port can't use it. if
request dclk is under 4K@60Hz, set the video port dlk parent
as hdmi0 phy pll.if hdmi0 or hdmi1 phy pll is used by other
video port, report a error.
3. When a video port(A) connect hdmi0(may also connect other
output interface but not hdmi1), it must hold the hdmi0
phy pll, and other video port can't use it. If both hdmi0
and hdmi1 phy pll is used by other video port, report a error.
If hdmi0 phy pll is used by another video port(B) and hdmi1
phy pll is free, set hdmi1 phy pll as video port(B) dclk parent
and video port(A) hold hdmi0 phy pll. If hdmi0 phy pll is free,
video port(A) hold hdmi0 pll. If video port(A) hold hdmi0 phy
pll and request dclk is under 4k@60Hz, set hdmi0 phy pll as
video port(A) dclk parent.
4. When a video port(A) connect hdmi1(may also connect other
output interface but not hdmi0), it must hold the hdmi1 phy
pll, and other video port can't use it. If both hdmi0 and hdmi1
phy pll is used by other video port, report a error. If hdmi1
phy pll is used by another video port(B) and hdmi0 phy pll is
free, set hdmi0 phy pll as video port(B) dclk parent and video
port(A) hold hdmi1 phy pll. If hdmi1 phy pll is free, video
port(A) hold hdmi1 pll. If video port(A) hold hdmi1 phy pll and
request dclk is under 4k@60Hz, set hdmi1 phy pll as video port(A)
dclk parent.
5. When a video port connect dp(0, 1, or both, may also connect
other output type but not hdmi0 and hdmi1). If the request dclk
is higher than 4K@60Hz or video port id is 2, do nothing. Otherwise
get a free hdmi phy pll as video port dclk parent. If no free hdmi
phy pll can be get, report a error.
Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: If412cc2418561315be8e2ad82384be085000a957
And fix bug in address calculation in 422p format.
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: Id0d7b3ad786dbec3774835f3a288448fe5107014
Enable CONFIG_VIDEO_FP5510 used for s5k3l6xx which found on
rk3588s tablet rk806 single board
Signed-off-by: Jianwei Fan <jianwei.fan@rock-chips.com>
Change-Id: If561e1feecf4cf3c7672594edbc156c2bf90533a
Interface functions may call by different threads, which may
access the same value at the same time. So we need add mutex
lock.
Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: I682820c0eb366d514e21cc54f9ab97d5039a0814
gpiod_get_value would take gpio active state into count. So
the default pattern should be like prsnt-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>
to indicate that 1 means no devices. If we need 0 to indicate no devices,
we should use GPIO_ACTIVE_HIGH instead.
Fixes: cca1a93b9e ("PCI: rockchip: dw: Add present IO detect")
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: Ic34debabfccdac357c52df427573decc65eea83f
When using user buffer, hardware crypto is used regardless of
whether the data length is greater than 32K.
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
Change-Id: I3228910def265765e772da1ab4eda3b54d9927cb
Cluster0_PD is a parent power domain for Cluster1/2/3_PD,
it should be power on first and power down last.
use list_for_each_entry_safe_reverse to make sure the
right order.
Fixes: 8684b9914503("drm/rockchip: vop2: power off all vop pd when enter
suspend mode")
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: I50a5d53de40131d4878b8e1d4a065ce2b96eb2c8
1. Fix dma_fd cannot be imported when only RGA2.
2. fix crash in fill mode.
Update driver version to 1.2.2
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: Ib71b381c9e784f9eee8be925e80cfb27f0be2563
According to the result of SI test, adjust the ssc, voltage
swing, pre-emphasis to improve the phy compatibility.
Different rates use different parameters. The rbr and hbr
use the same parameters. Note that Type-C port's parameters
and DP standard port's parameters are different when the
lane rate is rbr or hbr.
Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: I27a8a846a198c7feabf1aaf1459a7df056e4312a
When using DMA_fd, hardware crypto is used regardless of
whether the data length is greater than 32K.
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
Change-Id: Ifcc78bca17beb99ae7eae73f3def6ebf55f5cf1b
RK3588 has two OTG controllers, OTG0 is configured as
OTG mode, and OTG1 is configured as host mode. The OTG1
doesn't init the otg sm work, so it can only handle the
otg sm work if the func of the work is initialized.
This patch can fix the warning if the logic is power off
during deep sleep on RK3588 EVB2.
WARNING: CPU: 0 PID: 145 at kernel/workqueue.c:3057 __flush_work+0x26c/0x28c
Modules linked in:
CPU: 0 PID: 145 Comm: irq/106-rockchi Not tainted 5.10.66 #720
Hardware name: Rockchip RK3588 EVB2 LP4 V10 Board (DT)
pstate: 60c00009 (nZCv daif +PAN +UAO -TCO BTYPE=--)
pc : __flush_work+0x26c/0x28c
lr : __cancel_work_timer+0x11c/0x1c0
......
Call trace:
__flush_work+0x26c/0x28c
__cancel_work_timer+0x11c/0x1c0
cancel_delayed_work_sync+0x18/0x2c
rockchip_usb2phy_bvalid_irq+0xf4/0x144
rockchip_usb2phy_irq+0x368/0x384
irq_thread_fn+0x34/0x88
irq_thread+0x1a4/0x248
kthread+0x13c/0x344
ret_from_fork+0x10/0x30
Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: I42b5f6d22df3f7f94d54f05083694fb49e382620
Only dynamic OPPs can be removed by dev_pm_opp_remove.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I7362e7f58927ea9258c5abe761833e9fdc5e7656
Separate the process of device matching by the different SoC macro
definitions, which can reduce memory usage.
./ksize.sh drivers/gpu/drm/
before ksize: 565102 Bytes
after kszie: 526734 Bytes
save about: 38368 Bytes
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Change-Id: I6b3689b11598120aad16956235d1ee2bbdbe80e0
RV1106/3 is a highly integrated vision processor SoC
for IPC, especially for AI related application.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I77650867696ac94c0a9ab9ad3b6ddaeea6121169
Enable CONFIG_VIDEO_S5K3L6XX which found on rk3588s tablet
rk806 single board
Signed-off-by: Jianwei Fan <jianwei.fan@rock-chips.com>
Change-Id: If06becce1e3209feccff6d0975fdb17f81df26c1
The panic was triggered
by running "cat /sys/kernel/debug/mali0/ipa_current_power".
It is fixed by enlarging KBASE_IPA_BLOCK_TYPE_NUM according to the fact
that we set 4 clks for GPU in rk3588 dts.
Change-Id: I3a87f6f2d25cf296d95d033d3d98c51666ea482d
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
