The USB IP on the Stratix10 SoC needs the USB OCP(ecc) bit to get de-asserted
as well for the USB IP to work properly.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Pull "dts fixes for omaps for v4.16 merge window" from Tony Lindgren:
Few omap dts fixes and n9 volume keys update for v4.16 merge window
For now, we need to rely on dts alias for n900 lcd and tvout order
to prevent occasional blank lcd. And we need to reduce the shut down
temperature for dra7 for non-cpu thermal cases.
And looks like we're missing the n9 volume key mappings and there is
active work going happening for n9 at least for postmarketos. So let's
make sure the keys can be actually used as they are the only buttons
on n9 in addition to the power key.
* tag 'omap-for-v4.16/dt-pt3-signed' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: Nokia N9: add support for up/down keys in the dts
ARM: dts: dra7: Reduce shut down temperature of non-cpu thermal zones
ARM: dts: n900: Add aliases for lcd and tvout displays
Pull "Few omap interconnect dts fixes for v4.16 merge window" from
Tony Lindgren:
Now that we have the dts clocks for the clkctrl clock and the
interconnect binding, we need to update the existing ti-sysc
users according to the binding to make it usable for drivers.
Apologies for not being able to send this earlier but it took
me few revisions to get the smartreflex changes right and
tested with yet to be posted patches to make smartreflex probe
with dts and I wanted to have it sit in next for a while to make
sure we're not introducing regressions for legacy platform data
based booting.
Note that this is based on a merge with commit 20a2742e57
("dt-bindings: ti-sysc: Update binding for timers and capabilities")
to avoid a merge conflict with the binding changes.
* tag 'omap-for-v4.16/dt-clk-dts-signed' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: Update ti-sysc data for existing users
ARM: dts: Fix smartreflex compatible for omap3 shared mpu-iva instance
dt-bindings: ti-sysc: Update binding for timers and capabilities
The clcd device is lacking an interrupt-parent property, which makes
the interrupt unusable and shows up as a warning with the latest
dtc version:
arch/arm/boot/dts/ste-nomadik-s8815.dtb: Warning (interrupts_property): Missing interrupt-parent for /amba/clcd@10120000
arch/arm/boot/dts/ste-nomadik-nhk15.dtb: Warning (interrupts_property): Missing interrupt-parent for /amba/clcd@10120000
I looked up the old board files and found that this interrupt has
the same irqchip as all the other on-chip device, it just needs one
extra line.
Fixes: 17470b7da1 ("ARM: dts: add the CLCD LCD display to the NHK15")
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Cc: stable@vger.kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Pull "DTS changes to enable Ethernet on the Gemini boards" from Linus Walleij:
I realize it's late. Like really late. But Dmiller merged the ethernet
bindings and the driver for Gemini ethernet, and Gemini is all about
networking.
So for a late merge consideration here are the two patches giving
ethernet on Gemini, on top of what is already merged.
* tag 'gemini-dts-update-3' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: dts: Add ethernet to a bunch of platforms
ARM: dts: Add ethernet to the Gemini SoC
Pull "mvebu dt64 for 4.16 (part 3)" from Gregory CLEMENT:
Fix for the CP110 dt de-duplication series
* tag 'mvebu-dt64-4.16-3' of git://git.infradead.org/linux-mvebu:
arm64: dts: marvell: armada-80x0: Fix pinctrl compatible string
These platforms have the PHY defined already so we just
need to add a single device node to each of them to activate
the ethernet device.
The PHY skew/delay settings for pin control is known from a
few vendor trees and old OpenWRT patch sets.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Other platforms' device-tree files start with a platform prefix, such as
sun7i-a20-*.dts or at91-*.dts.
This naming scheme turns out to be handy when using multi-platform build
systems such as OpenWrt.
Prepend oxnas files with their platform prefix to comply with the naming
scheme already used for most other platforms.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The ohci-hcd node has an interrupt number but no interrupt-parent,
leading to a warning with current dtc versions:
arch/arm/boot/dts/s5pv210-aquila.dtb: Warning (interrupts_property): Missing interrupt-parent for /soc/ohci@ec300000
arch/arm/boot/dts/s5pv210-goni.dtb: Warning (interrupts_property): Missing interrupt-parent for /soc/ohci@ec300000
arch/arm/boot/dts/s5pv210-smdkc110.dtb: Warning (interrupts_property): Missing interrupt-parent for /soc/ohci@ec300000
arch/arm/boot/dts/s5pv210-smdkv210.dtb: Warning (interrupts_property): Missing interrupt-parent for /soc/ohci@ec300000
arch/arm/boot/dts/s5pv210-torbreck.dtb: Warning (interrupts_property): Missing interrupt-parent for /soc/ohci@ec300000
As seen from the related exynos dts files, the ohci and ehci controllers
always share one interrupt number, and the number is the same here as
well, so setting the same interrupt-parent is the reasonable solution
here.
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
dtc warns about obviously incorrect GPIO numbers for the audio codec
on both lpc32xx boards:
arch/arm/boot/dts/lpc3250-phy3250.dtb: Warning (gpios_property): reset-gpio property size (12) too small for cell size 3 in /ahb/apb/i2c@400A0000/uda1380@18
arch/arm/boot/dts/lpc3250-phy3250.dtb: Warning (gpios_property): power-gpio property size (12) too small for cell size 3 in /ahb/apb/i2c@400A0000/uda1380@18
arch/arm/boot/dts/lpc3250-ea3250.dtb: Warning (gpios_property): reset-gpio property size (12) too small for cell size 3 in /ahb/apb/i2c@400A0000/uda1380@18
arch/arm/boot/dts/lpc3250-ea3250.dtb: Warning (gpios_property): power-gpio property size (12) too small for cell size 3 in /ahb/apb/i2c@400A0000/uda1380@18
It looks like the nodes are written for a different binding that combines
the GPIO number into a single number rather than a bank/number pair.
I found the right numbers on stackexchange.com, so this patch fixes
the warning and has a reasonable chance of getting things to actually
work.
Cc: stable@vger.kernel.org
Link: https://unix.stackexchange.com/questions/59497/alsa-asoc-how-to-correctly-load-devices-drivers/62217#62217
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The GPIO polarity is missing in the hdmi,hpd-gpio property, this
fixes the following DT warnings:
arch/arm/boot/dts/stih410-b2120.dtb: Warning (gpios_property): hdmi,hpd-gpio property
size (8) too small for cell size 2 in /soc/sti-display-subsystem/sti-hdmi@8d04000
arch/arm/boot/dts/stih407-b2120.dtb: Warning (gpios_property): hdmi,hpd-gpio property
size (8) too small for cell size 2 in /soc/sti-display-subsystem/sti-hdmi@8d04000
arch/arm/boot/dts/stih410-b2260.dtb: Warning (gpios_property): hdmi,hpd-gpio property
size (8) too small for cell size 2 in /soc/sti-display-subsystem/sti-hdmi@8d04000
[arnd: marked Cc:stable since this warning shows up with the latest dtc
by default, and is more likely to actually cause problems than the
other patches from this series]
Cc: stable@vger.kernel.org
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
On dra7, as per TRM, the HW shutdown (TSHUT) temperature is hardcoded
to 123C and cannot be modified by SW. This means that when the temperature
reaches 123C HW asserts TSHUT output which signals a warm reset.
The reset is held until the temperature goes below the TSHUT low (105C).
While in SW, the thermal driver continuously monitors current temperature
and takes decisions based on whether it reached an alert or a critical point.
The intention of setting a SW critical point is to prevent force reset by HW
and instead do an orderly_poweroff(). But if the SW critical temperature is
greater than or equal to that of HW then it defeats the purpose. To address
this and let SW take action before HW does keep the SW critical temperature
less than HW TSHUT value.
The value for SW critical temperature was chosen as 120C just to ensure
we give SW sometime before HW catches up.
Document reference
SPRUI30C – DRA75x, DRA74x Technical Reference Manual - November 2016
SPRUHZ6H - AM572x Technical Reference Manual - November 2016
Tested on:
DRA75x PG 2.0 Rev H EVM
Signed-off-by: Ravikumar Kattekola <rk@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
When both lcd and tv are enabled, the order in which they will be probed is
unknown, so it might happen (and it happens in reality) that tv is
configured as display0 and lcd as display1, which results in nothing
displayed on lcd, as display1 is disabled by default.
Fix that by providing correct aliases for lcd and tv
Signed-off-by: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Let's update the existing users with features and clock data as
specified in the binding. This is currently the smartreflex for most
part, and also few omap4 modules with no child device driver like
mcasp, abe iss and gfx.
Note that we had few mistakes that did not get noticed as we're still
probing the SmartReflex driver with legacy platform data and using
"ti,hwmods" legacy property for ti-sysc driver.
So let's fix the omap4 and dra7 smartreflex registers as there is no
no revision register.
And on omap4, the mcasp module has a revision register according to
the TRM.
And for omap34xx we need a different configuration compared to 36xx.
And the smartreflex on 3517 we've always kept disabled so let's
remove any references to it.
Signed-off-by: Tony Lindgren <tony@atomide.com>
The smartreflex instance for mpu and iva is shared. Let's fix this as I've
already gotten confused myself few times wondering where the mpu instance
is. Note that we are still probing the driver using platform data so this
change is safe to do.
Signed-off-by: Tony Lindgren <tony@atomide.com>
When replacing the cpm by cp0 and cps by cp1 [1] not only the label and
the alias were replaced but also the compatible string which was wrong.
Due to this the pinctrl driver was no more probed.
This patch fix it by reverting this change for the pinctrl compatible
string on Armada 8K.
[1]: "arm64: dts: marvell: replace cpm by cp0, cps by cp1"
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
This fixes the following warning by also sending the flags argument for
gpio controllers:
Property 'cs-gpios', cell 6 is not a phandle reference in
/ahb/apb/spi@e0100000
Fixes: 8113ba917d ("ARM: SPEAr: DT: Update device nodes")
Cc: stable@vger.kernel.org # v3.8+
Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
The "dmas" cells for the designware DMA controller need to have only 3
properties apart from the phandle: request line, src master and
destination master. But the commit 6e8887f60f updated it incorrectly
while moving from platform code to DT. Fix it.
Cc: stable@vger.kernel.org # v3.10+
Fixes: 6e8887f60f ("ARM: SPEAr13xx: Pass generic DW DMAC platform data from DT")
Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
dtc complains about the lack of #coolin-cells properties for the
CPU nodes that are referred to as "cooling-device":
arch/arm64/boot/dts/mediatek/mt8173-evb.dtb: Warning (cooling_device_property): Missing property '#cooling-cells' in node /cpus/cpu@0 or bad phandle (referred from /thermal-zones/cpu_thermal/cooling-maps/map@0:cooling-device[0])
arch/arm64/boot/dts/mediatek/mt8173-evb.dtb: Warning (cooling_device_property): Missing property '#cooling-cells' in node /cpus/cpu@100 or bad phandle (referred from /thermal-zones/cpu_thermal/cooling-maps/map@1:cooling-device[0])
Apparently this property must be '<2>' to match the binding.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Tested-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Samsung DTS ARM64 changes for v4.16, part 2
1. Fix DTC warnings around unit addresses.
2. Add SPDX license identifiers.
* tag 'samsung-dt64-4.16-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: Add SPDX license identifiers
arm64: dts: exynos: Fix typo in MSCL clock controller unit address of Exynos5433
arm64: dts: exynos: Use lower case hex addresses in node unit addresses
Signed-off-by: Olof Johansson <olof@lixom.net>
Allwinner DT changes for 4.16, bis
A few improvements to our DT support, with:
- basic DRM support for the A83t
- simplefb support for the H3 and H5 SoCs
- One fix for the USB ethernet on the Orange Pi R1
* tag 'sunxi-dt-for-4.16-2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: dts: sun8i: a711: Enable the LCD
ARM: dts: sun8i: a83t: Add LVDS pins group
ARM: dts: sun8i: a83t: Enable the PWM
ARM: dts: sun8i: a83t: Add display pipeline
ARM: sunxi: h3/h5: add simplefb nodes
arm64: allwinner: h5: add compatible string for DE2 CCU
ARM: sun8i: h3/h5: add DE2 CCU device node for H3
dt-bindings: simplefb-sunxi: add pipelines for DE2
ARM: dts: sun8i: fix USB Ethernet of Orange Pi R1
Signed-off-by: Olof Johansson <olof@lixom.net>
Another round of 64-bit DT changes for the new Amlogic SoCs. These
include IR, SPI and ethernet MAC support for the new AXG family SoCs.
* tag 'amlogic-dt64-3' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
ARM64: dts: meson-axg: enable ethernet for A113D S400 board
ARM64: dts: meson-axg: add ethernet mac controller
ARM64: dts: meson-axg: add the SPICC controller
ARM64: dts: meson-axg: enable IR controller
arm64: dts: meson-axg: switch uart_ao clock to CLK81
clk: meson-axg: add clocks dt-bindings required header
dt-bindings: clock: add compatible variant for the Meson-AXG
Signed-off-by: Olof Johansson <olof@lixom.net>
According to the comment added to exynos_dt_pmu_match[] in commit
8b283c0254 ("ARM: exynos4/5: convert pmu wakeup to stacked domains"),
the RTC is not able to wake up the system through the PMU on Exynos5410,
unlike Exynos5420.
However, when the RTC DT node got added, it was a straight copy of
the Exynos5420 node, which now causes a warning from dtc.
This removes the incorrect interrupt-parent, which should get the
interrupt working and avoid the warning.
Fixes: e1e146b1b0 ("ARM: dts: exynos: Add RTC and I2C to Exynos5410")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This reverts commit 6737b08140.
Unlike on Exynos5420-family, on Exynos5410 the PMU is not an interrupt
controller so it should not handle interrupts of RTC. The DTC warning
(addressed by mentioned commit) should be fixed by not routing RTC
interrupts to PMU.
Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This is tested in the S400 dev board which use a RTL8211F PHY,
and the pins connect to the 'eth_rgmii_y_pins' group.
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add DT info for the stmmac ethernet MAC which found in
the Amlogic's Meson-AXG SoC, also describe the ethernet
pinctrl & clock information here.
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Enable IR remote controller which found in Amlogic's Meson-AXG SoCs.
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add axg compatible string and device tree bindings
* tag 'meson-clk-headers-for-v4.16-2' of git://github.com/BayLibre/clk-meson:
clk: meson-axg: add clocks dt-bindings required header
dt-bindings: clock: add compatible variant for the Meson-AXG
Pull "mvebu dt64 for 4.16 (part 2)" from Gregory CLEMENT:
The main change here are the series of commits doing the Armada 7K/8K
CP110 DT de-duplication, they include the de-duplication itself and
small fixes in the device tree files.
Besides them there are 2 other patches:
- One adding the crypto support for Armada 37xx SoCs
- An other adding Ethernet aliases on A7K/A8K base boards
* tag 'mvebu-dt64-4.16-2' of git://git.infradead.org/linux-mvebu:
arm64: dts: marvell: add Ethernet aliases
arm64: dts: marvell: replace cpm by cp0, cps by cp1
arm64: dts: marvell: de-duplicate CP110 description
arm64: dts: marvell: use aliases for SPI busses on Armada 7K/8K
arm64: dts: marvell: use mvebu-icu.h where possible
arm64: dts: marvell: fix compatible string list for Armada CP110 slave NAND
arm64: dts: marvell: fix typos in comment describing the NAND controller
arm64: dts: marvell: use lower case for unit address and reg property
arm64: dts: marvell: fix watchdog unit address in Armada AP806
arm64: dts: marvell: armada-37xx: add a crypto node
ARM64: dts: marvell: armada-cp110: Fix clock resources for various node
ARM: dts: kirkwood: fix pin-muxing of MPP7 on OpenBlocks A7
Pull "Freescale arm64 device tree updates for 4.16" from Shawn Guo:
- LS1088A updates: add device support for DCFG, qoriq-mc, and USB.
- Add power monitor device INA220 for ls208xa-rdb board.
* tag 'imx-dt64-4.16' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
arm64: dts: ls208xa: add power monitor chip node
arm64: dts: ls1088a: Add USB support
arm64: dts: ls1088a: add fsl-mc hardware resource manager node
arm64: dts: ls1088a: Added dcfg node in ls1088a dtsi
Pull "i.MX device tree changes for 4.16" from Shawn Guo:
- A few random updates for vf610-zii board: correct switch EEPROM size,
enable edma1, correct GPIO expander interrupt, add PHYs for switch2
device.
- LS1021A device tree updates: add reboot and QSPI device nodes, label
USB controllers, specify interrupt-affinity for PMU, fix TMR_FIPER1
setting, enable esdhc device, add Moxa UC-8410A board support.
- A bunch of patches from Fabio: fix reg - unit address mismatches,
remove leading zero in unit address, move regulators out of
simple-bus, move nodes with no reg property out of bus, remove extra
clock cell, add missing phy-cells to usb-nop-xceiv, etc.
- A couple series from Hummingboard developers: re-organise device tree
files for better handling various board versions, and then add the
new hummingboard2 board support on top of that.
- Disable AC'97 input pins pad and add support for powering off for
imx6qdl-udoo board.
- Convert from fbdev to drm bindings for imx6sx-sdb and imx6sl-evk
board.
- Add device tree for Variscite DART-MX6 SoM and Carrier-board support.
- Add new board support of TS-4600 and TS-7970 from Technologic
Systems.
- A series from Stefan to update imx7-colibri device tree and then add
new version of Toradex Colibri iMX7D board with eMMC support.
- Other random updates on various board support.
* tag 'imx-dt-4.16' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (126 commits)
ARM: dts: imx7s: Avoid using label in unit address and reg
ARM: dts: imx51-zii-rdu1: Add missing #phy-cells to usb-nop-xceiv
ARM: dts: imx6qdl-hummingboard2: Remove leading zero in unit address
ARM: dts: ls1021a: add support for Moxa UC-8410A open platform
ARM: dts: imx51-babbage: Fix the 26MHz clock modelling
ARM: dts: vf610-zii-dev-rev-b: add PHYs for switch2
ARM: dts: vf610-zii-dev-rev-b: fix interrupt for GPIO expander
ARM: dts: vf610-zii-dev: enable edma1
ARM: dts: ls1021a-twr: Remove extra clock cell
ARM: dts: ls1021a-qds: Remove extra clock cell
ARM: dts: imx53: add srtc node
dt-bindings: imx-gpcv2: Fix the unit address
ARM: imx: dts: Use lower case for bindings notation
ARM: dts: imx6q-h100: use usdhc2 VSELECT
ARM: dts: imx6sx: Add support for PCI power domain
ARM: dts: imx6sx: Fix PCI non-prefetchable memory range
ARM: dts: imx6qdl-hummingboard2: rename regulators to match schematic
ARM: dts: imx6qdl-hummingboard2: add v1.5 som with eMMC
ARM: dts: imx6qdl-hummingboard2: add v1.5 som without eMMC
ARM: dts: imx6qdl-hummingboard2: add PWM3 support
...
Pull "ASPEED device tree updates for 4.16" from Joel Stanley:
Clock driver support:
Rework all platforms to use proper clock bindings. Linux should now boot
upstream kernels on ast2400 and ast2500 platforms without out of tree
patches.
New systems:
Witherspoon: OpenPower Power9 server manufactured by IBM that uses the ASPEED ast2500
Zaius: OpenPower Power9 server manufactured by Invatech that uses the ASPEED ast2500
Q71L: Intel Xeon server manufactured by Qanta that uses the ASPEED ast2400
We also see updates to the Palmetto and Romulus systems to bring them in
line with the functionality of those above.
The systems take advantage of recently added drivers for LPC Snoop
device and the PWM/Tachometer fan controller.
OpenBMC flash layout:
The flash layout used OpenBMC systems is added and the device trees now
use it.
* tag 'aspeed-4.16-devicetree' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/joel/aspeed:
ARM: dts: aspeed-evb: Add unit name to memory node
ARM: dts: aspeed-plametto: Add flash layout and fix memory node
ARM: dts: aspeed-romulus: Update Romulus system
ARM: dts: aspeed: Add Qanta Q71L BMC machine
ARM: dts: aspeed: Add Ingrasys Zaius BMC machine
ARM: dts: aspeed: Add Witherspoon BMC machine
ARM: dts: aspeed: Sort ASPEED entries in makefile
ARM: dts: Add OpenBMC flash layout
ARM: dts: aspeed: Update license headers
ARM: dts: aspeed: Remove skeleton.dtsi
ARM: dts: aspeed: Add LPC Snoop device
ARM: dts: aspeed: Add PWM and tachometer node
ARM: dts: aspeed: Add clock phandle to GPIO
ARM: dts: aspeed: Add flash controller clocks
ARM: dts: aspeed: Add watchdog clocks
ARM: dts: aspeed: Add MAC clocks
ARM: dts: aspeed: Add proper clock references
ARM: dts: aspeed: Add LPC and child devices
dt-bindings: gpio: Add ASPEED constants
dt-bindings: clock: Add ASPEED constants
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This patch adds Ethernet aliases in the Marvell Armada 7040 DB, 8040 DB
and 8040 mcbin device trees so that the bootloader setup the MAC
addresses correctly.
Signed-off-by: Yan Markman <ymarkman@marvell.com>
[Antoine: commit message, small fixes]
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
In preparation for the introduction of more than 2 CPs in upcoming
SoCs, it makes sense to move away from the "CP master" (cpm) and "CP
slave" (cps) naming, and use instead cp0/cp1.
This commit is the result of:
sed 's%cpm%cp0g%' arch/arm64/boot/dts/marvell/*
sed 's%cps%cp1g%' arch/arm64/boot/dts/marvell/*
So it is a purely mechaninal change.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Suggested-by: Hanna Hawa <hannah@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
One concept of Marvell Armada 7K/8K SoCs is that they are made of HW
blocks composed of a variety of IPs (network, PCIe, SATA, XOR, SPI,
I2C, etc.), and those HW blocks can be duplicated several times within
a given SoC. The Armada 7K SoC has a single CP110 (so no duplication),
while the Armada 8K SoC has two CP110. In the future, SoCs with more
than 2 CP110s will be introduced.
In current kernel versions, the master CP110 is described in
armada-cp110-master.dtsi and the slave CP110 is described in
armada-cp110-slave.dtsi. Those files are basically exactly the same,
since they describe the same hardware. They only have a few
differences:
- Base address of the registers is different for the "config-space"
- Base address of the PCIe registers, MEM, CONF and IO areas were
different
- Labels (and phandles pointing to them) of the nodes were different
("cpm" prefix in the master CP, "cps" prefix in the slave CP)
This duplication issue has been discussed at the DT workshop [1] in
Prague last October, and we presented on this topic [2]. The solution
of using the C pre-processor to avoid this duplication has been
validated by the people present in this DT workshop, and this patch
simply implements what has been presented.
We handle differences between the master CP and slave CP description
using the C pre-processor, by defining a set of macros with different
values armada-cp110.dtsi is included to instantiate one of the master
or slave CP110.
There are a few aspects that deserve additional explanations:
- PCIe needs to be handled separately because it is not part of the
config-space {...} node, since it has registers outside of the
range covered by config-space {...}.
- We need to defined CP110_BASE, CP110_PCIEx_BASE without 0x, because
they are used for the unit address part of some DT nodes. But since
they are also used for the "reg" property of the same nodes, we
have an ADDRESSIFY() macro that prepends 0x to those values.
We compared the resulting .dtb for armada-8040-db.dtb before and after
this patch is applied, and the result is exactly the same, except for
a few differences:
- the SDHCI controller that was only described in the master CP110 is
now also described in the slave CP110. Even though the SDHCI
controller from the slave CP110 is indeed not usable (as it isn't
wired to the outside world) it is technically part of the silicon,
and therefore it is reasonable to also describe it to be part of
the slave CP110. In addition, if we wanted to get this correct for
the SDHCI controller, we should also do it for the NAND controller,
for which the situation is even more complicated: in a single CP110
configuration (Armada 7K), the usable NAND controller is in the
master CP110, while in a dual CP110 configuration (Armada 8K), the
usable NAND controller is in the slave CP110. Since that would add
a lot of additional complexity for no good reason, and since the IP
blocks are in fact really present in both CPs, we simply describe
them in both CPs at the DT level.
- the cp110-master and cp110-slave nodes are now named cpm and
cps. We could have kept cp110-master and cp110-slave, but that
would have required adding another CP110_xyz define, which didn't
seem very useful.
Note that this commit also gets rid of the armada-cp110-master.dtsi
and armada-cp110-slave.dtsi files, as future SoCs will have more than
2 CPs. Instead, we instantiate the CPs directly from the SoC-specific
.dtsi files, i.e armada-70x0.dtsi and armada-80x0.dtsi.
[1] https://elinux.org/Device_tree_kernel_summit_2017_etherpad
[2] https://elinux.org/images/1/14/DTWorkshop2017-duplicate-data.pdf
[gregory.clement@free-electrons.com: add back the "ARM64: dts: marvell:
Fix clock resources for various node" commit]
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
We are currently using the cell-index DT property to assign SPI bus
numbers. This property is specific to the spi-orion driver, and
requires each SPI controller to have a unique ID defined in the Device
Tree.
As we are about to merge armada-cp110-master.dtsi and
armada-cp110-slave.dtsi into a single file, those cell-index
properties that differ between the master CP110 and the slave CP110
are a difference that would have to be handled.
In order to avoid this, we switch to using the "aliases" DT node to
assign a unique number to each SPI controller. This is more generic,
and directly handled by the SPI core.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Back when the ICU Device Tree binding was introduced, we could not use
mvebu-icu.h from the Device Tree files, because the DT files and
mvebu-icu.h were following different merge routes towards Linus
tree. Now that both have been merged, we can switch the Marvell Armada
CP110 Device Tree files to use the mvebu-icu.h header instead of
duplicating the ICU_GRP_NSR definition.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The Armada CP110 slave NAND controller Device Tree description lists
the compatible string in the wrong order: marvell,armada-8k-nand
should come first. This commit alignes the slave CP110 description
with the master CP110 description from that respect.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
