From the final function
ENTRY(__dma_unmap_area)
cmp w2, #DMA_TO_DEVICE
b.ne __dma_inv_area
ret
ENDPIPROC(__dma_unmap_area)
if the direction isn't DMA_TO_DEVICE, it will do __dma_inv_area. So
directly return if the dir is DMA_TO_DEVICE.
Change-Id: I9ec2affddb8efb431a165100d78afca7fe6b2a45
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
The cpufreq cooling doesn't support calculating static power in 5.10
and the cpu and gpu opp table are changed.
Change-Id: Ia1abaf6d7614b874081159db7cc41e910bf47462
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
The power model node must be the child node of the device node.
Change-Id: Ib16e37c31e573f183ea304b072d2a7912e155197
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
if rkcif_dvp & rkcif_mipi_all registered,
close rkcif_dvp streams alone can't reset rkcif,
only rkcif_dvp & mipi dev all close can do reset.
Signed-off-by: Wang Panzhenzhuan <randy.wang@rock-chips.com>
Change-Id: I103ca247a0866629d351699f752293af028d29d5
To dynamically configure eDP to different VP ports, clear flags.
Signed-off-by: Lei Chen <lei.chen@rock-chips.com>
Change-Id: I68a9eb32f860e791e68d73fa2c083d0ce5bafb8d
When set property hdmi_quant_range, quant range was changed immediately.
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: Ib8c14404cc3dde645012399b6155d047b4e9609a
1. Remove the useless code about the coordinate after rotation in
the src1 channel.
2. Remove 4 alignment of the src1 channel.
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: Ib780c0143a76e4bfc50c0be95e483c503525ab9f
Set sensor in stream off state by default,
to avoid sending abnormal data in the early stage.
Signed-off-by: Wang Panzhenzhuan <randy.wang@rock-chips.com>
Change-Id: Iaae2fd3be95a5fcac05ebaf39a68614b7b807d4a
config wait-line to ispp virtual device dts node,
or ispp debug node before open ispp video.
/sys/module/video_rkispp/parameters/wait_line
for example: output is 2688x1520, config
wait-line to 768 (128 align), vb2 buffer
will done when poll image processing greater
than 768, wait-line less than (height - 128) is valid.
Change-Id: I4a448cc6baffbb5794eef91965e4b2bc349aa5ed
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
config wait-line to isp virtual device dts node,
or echo value to debug node before open isp video.
/sys/module/video_rkisp/parameters/wait_line
Change-Id: I5c73c90117455663620b4c025e78aa6233ca40b9
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
This is special feature at rk356x, the cluster layer only can support
afbc format and can't support linear format;
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Ic8efc26c07a088c246969622fcf2973b00abd9c2
THUNDER_BOOT_ISP is used for snapshot first frame in risc-v, it's
useless for most of products.
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Change-Id: Id64c514f9d21671dfae43b7eff927cae861ce733
The nandc's DMA only supports 32bits. When the DDR capacity exceeds 4GB,
It need to configure DMA mask to 32bits and use API dma_map_single to
get the physical address.
Change-Id: I1510f7bbe2779ea20ff83a93e3a4dabb941263e3
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Clear irq status first then handle the udma interrupt.
Change-Id: I3638524b7bd09ad21a431bfebd3ba0b5bfbe7b8e
Signed-off-by: Simon Xue <xxm@rock-chips.com>
RK3568 USB DWC3 controllers require to disable receiver detection
in P3 for correct detection of USB devices. And this quirk to set
the GUSB3PIPECTL.DISRXDETINP3, then the DWC3 core will change the
PHY power state to P2 and then perform receiver detection. After
receiver detection, the DWC3 core will change the PHY power state
to P3 state.
Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: Iaad3f7ce2c4dee1788539781e3bcfbb39458f5d6
When do uvc hotplug test on RV1126 EVB, it may crash in the
uvc_v4l2_streamon() with the following error log. Because
it tries to enable the video stream after usb disconnect.
[ 1748.947755] configfs-gadget gadget: uvc_function_disable
[ 1748.947947] android_work: sent uevent USB_STATE=DISCONNECTED
[ 1748.955347] Unable to handle kernel NULL pointer dereference at virtual address 00000003
[ 1748.956158] pgd = ef2a7e72
[ 1748.956550] [00000003] *pgd=6dde7835
[ 1748.956893] Internal error: Oops: 17 [#1] PREEMPT SMP ARM
[ 1748.957381] Modules linked in: galcore(O) bcmdhd
[ 1748.957819] CPU: 3 PID: 2706 Comm: uvc_gadget_pthr Tainted: G W O 4.19.111 #9
[ 1748.958567] Hardware name: Generic DT based system
[ 1748.959218] PC is at uvcg_video_enable+0xb8/0x228
[ 1748.959775] LR is at vb2_core_streamon+0x11c/0x15c
......
[ 1749.041063] [<b056a2cc>] (uvcg_video_enable) from [<b0569968>] (uvc_v4l2_streamon+0x28/0x70)
[ 1749.041906] [<b0569968>] (uvc_v4l2_streamon) from [<b0590b54>] (__video_do_ioctl+0x1c8/0x3a0)
[ 1749.042681] [<b0590b54>] (__video_do_ioctl) from [<b0594288>] (video_usercopy+0x200/0x494)
[ 1749.043475] [<b0594288>] (video_usercopy) from [<b0220c38>] (do_vfs_ioctl+0xac/0x798)
[ 1749.044178] [<b0220c38>] (do_vfs_ioctl) from [<b0221358>] (ksys_ioctl+0x34/0x58)
[ 1749.044843] [<b0221358>] (ksys_ioctl) from [<b0101000>] (ret_fast_syscall+0x0/0x4c)
Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: I6bb58133aaade0ff389fa4af2cfc05fe598de250
Some linux display framework will set display area out of display mode,
this is incorrect config and will lead vop iommu pagefault, we add this
commit to avoid vop pagefault and output error info.
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I50f9c93d807858b8939038aae9915b4895fe35e2
RK3568 usb phy0 and phy1 linestate irq can be set as
wakeup source, but the default linestate filter time
is based on the usb phy grf pclk 100MHz. So it needs
to reconfigure the linestate filter time base on 32KHz
clk when enter deep sleep.
In addition, it needs to enable the host port (usb3
host1 and usb2 host1) wakeup irq because of legacy
reason.
Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: I9151d49721e8e9d917fdb51228f3ca2627090156
This value is better to be 0x10 instead of 0x16 by new test report
to keep all RK356x work consistently.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: I87a22f6e02a6206981fe484db353613ac9a3ede6
Since the MMU base is not shifted forward, when the sync/async mode
is called together, the same memory is used to store the page table,
resulting in data errors.
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
Change-Id: If4807da8159e98a8d807cc24b4d6533793eeefa8
