PD#SWPL-1885
Problem:
We need a function to statistics drop frame.
Solution:
Add a function to statistics drop frame.
Verify:
Verified U212
Change-Id: I30b429c2f3710c5c8d0da6ec083060c9cc3e61ad
Signed-off-by: Peng Yixin <yixin.peng@amlogic.com>
PD#SWPL-4932
Problem:
The vd/osd blend ctrl is not correct when disable video
Solution:
Refresh the vd/osd blend ctrl for that case
Verify:
Verified on tl1
Change-Id: I6a7bfc58c810279cdfbf55f3d6a51e94890b4899
Signed-off-by: Brian Zhu <brian.zhu@amlogic.com>
PD#SWPL-2367
Problem:
building err and issue of compatibility.
Solution:
1. fixed building err without merging media_modules
2. add a new api tee_load_video_fw_swap
Verify:
p212,u212
Change-Id: Ifeedf2f3fa04b2427dccf2ac3940bad6860362d6
Signed-off-by: Nanxin Qin <nanxin.qin@amlogic.com>
PD#SWPL-2367
Problem:
can not playback hevc after update video fw.
Solution:
add swapping of the fw for the tee loading.
Verify:
p212,u212
Change-Id: I698e43ba8e71060f85be4b468c4c61d625f46d4a
Signed-off-by: Nanxin Qin <nanxin.qin@amlogic.com>
PD#SWPL-5148
Problem:
bootvideo stuck when starting to play
Solution:
wait hw vsync for afbc when phy_addr==0 only before chip g12A
Verify:
tl1
Change-Id: I883c8f6699729854a852fc70c22b5629aa025c60
Signed-off-by: Pengcheng Chen <pengcheng.chen@amlogic.com>
PD#SWPL-4900
Problem:
printk_prefix() passes NULL buf to print_time() to get the length of
the time prefix; when printk times are enable, the current code just
return "snprint(NULL, 0, "[%5lu.000000]", (unsigned long)ts)"
but in the SMP case, we add cpu core id at the end of time prefix, the
format is "[%5lu, %06lu@%d]", this gives a wrong size(shorter).
this will make buf get out of boundary, when run dmesg.
Solution:
replace [%5lu.000000] with [%5lu.000000@0]
Verify:
g12a-u200
Change-Id: Ic74b9f466b5af5aac7e6569a1afc7a46d9594050
Signed-off-by: Jianxiong Pan <jianxiong.pan@amlogic.com>
PD#SWPL-3744
Problem:
For the previous Amlogic CPU series(before TXLX), the CPU booting vector
locates at physical address starting from 0x00. To avoid influencing cpu
booting procedure, we have to reserve the first 1MB physical memory. But
it has changed since TXLX, the normal text section can safely use 0~1M
physical address. So it's no need to reserve the first 1MB in DTS.
Solution:
Change the starting address of usable memory from 0x100000 to 0x0 for CPU
series coming after TXLX.
Verify:
Locally on W400
Change-Id: I2df7859a38feca48abd58459e8b231ee15ada9e2
Signed-off-by: changqing.gao <changqing.gao@amlogic.com>
Signed-off-by: Luan Yuan <luan.yuan@amlogic.com>
Conflicts:
arch/arm/boot/dts/amlogic/txlx_t962x_r311_1g.dts
arch/arm64/boot/dts/amlogic/tl1_t962x2_t309.dts
arch/arm64/boot/dts/amlogic/tl1_t962x2_x301.dts
PD#SWPL-2456
Problem:
Lack the latency info of RX
Solution:
Add the latency info of RX
Verify:
T962E/R321
Change-Id: I480398466753dd93ca6e908d39157acadff6879f
Signed-off-by: Zongdong Jiao <zongdong.jiao@amlogic.com>
PD#TV-1565
Problem:
After g12a chip, vpp post dummy reg was changed. The
test_screen/rgb_screen sysfs did not work.
Solution:
Use the correct vpp post dummy reg for those chip
Verify:
Verified on X301 and W400
Change-Id: I1cb718a1f7040804b63d0197de0bb6aafe233357
Signed-off-by: Brian Zhu <brian.zhu@amlogic.com>
PD#SWPL-3907
Problem:
PDM controls are dynamically added or removed.
This will bring in panic.
Solution:
Remove the unused controls.
Verify:
Need stress test.
Change-Id: I69f63a0516e0812e9abb86e42f091ecb496004d4
Signed-off-by: Shuai Li <shuai.li@amlogic.com>
PD#SWPL-4673
Problem:
userspace can't access perf monitor cnt with "mrc ... c9,c13,0"
Solution:
actually userspace should check perf monitor cnt access permissions first
before use, so this is a workround.
enable pmuserenr with "mcr ... c9,c14,0" in several places:
1, perf probe
2, cpu idle (state>0) exit
3, cpu online
4, system resume after suspend
Verify:
u212
Change-Id: Ib09682d1d47545dfef8b088283ddbbf390630d3e
Signed-off-by: Hanjie Lin <hanjie.lin@amlogic.com>
PD#TV-2331
Problem:
SR insert unnecessary scale up to make scale down ratio
too larger.
Solution:
disable SR core0 which is before pps when mif vskip is > 2
Verify:
Locally on X301
Change-Id: I810fbae20f337e6eeb0a8e88d9758f78ad224254
Signed-off-by: Brian Zhu <brian.zhu@amlogic.com>
PD#SWPL-4617
Problem:
CONFIG_CC_STACKPROTECTOR_STRONG will increase stack size for some large
functions and may cause stack overflow problems or increase real stack
usage after we have enabled VMAP STACK config. But direct remove it
from defconfig will cause CTS fail.
Solution:
using CONFIG_CC_STACKPROTECTOR_STRONG_AMLOGIC for real stack protect
config
Verify:
p212
Change-Id: I1ccba2ef6ab5ea6f2987af2986e0cf222da1a7c7
Signed-off-by: Tao Zeng <tao.zeng@amlogic.com>
PD#SWPL-4857
Problem:
fixdiv calc Affect the use of other chips
Solution:
Adjust the usage conditions for the fixdiv calc func, witch
pdata->calc_f from dts.
Verify:
verify by g12b
Change-Id: I9598e2a24f76c76f4312c2694029fe4bb0f534d4
Signed-off-by: Nan Li <nan.li@amlogic.com>
PD#SWPL-5113
Problem:
SR core0 enable switch register is latched as default. It
will cause the screen flicker when operating this bit in vsync.
Because the frame size will be out of sync with back-end module.
Solution:
1. For g12a, no latch ctrl. So did not disable sr core2 enable bit.
2. For g12b/tl1, disable the latch function.
Verify:
Verified on U212/w400/x301
Change-Id: I54027b71ef8a6066004b3bd32ed1633b4bfa351c
Signed-off-by: Brian Zhu <brian.zhu@amlogic.com>
PD#SWPL-5020
Problem:
need 1.9G for A53 core in g12b RevB.
Solution:
add 1.9G frequency for A53 core in RevB dts.
Verify:
local test.
Change-Id: Ic4085c05b3b9d18f759720e3d268d5e4629faba7
Signed-off-by: pan.yang <pan.yang@amlogic.com>
PD#SWPL-4582
Problem:
g12 verA has a hardware bug.Therefore,dv cores
must keep working even if under sdr mode
Solution:
g12B verB has fixed this bug, so remove this chip id
Verify:
verify by g12b revb
Change-Id: Ice1aa1364319fa12d5a896fdfd106450f1a04d3d
Signed-off-by: Yi Zhou <yi.zhou@amlogic.com>
PD#SWPL-4582
Problem:
Need to check Soc rev to distinguish G12B revB.
Solution:
Check Soc rev set version and phy-interface for g12b revB.
Test: make w400 bootimage
Verify:
pass on W400
Change-Id: I338d7f0eed7bb61660625343404f756f0edf0d54
Signed-off-by: he.he <he.he@amlogic.com>
PD#SWPL-4582
Problem:
Need api to distinguish G12B revB
Solution:
Add rev A/B/C api
Verify:
W400
Change-Id: I5cf82fcfc513f621513914cf83d18fe5c5ec081d
Signed-off-by: Qiufang Dai <qiufang.dai@amlogic.com>
PD#172587
Problem:
screen blank after boot logo
Solution:
correct default display information
Verify:
verified on tl1 ref board
Change-Id: I94237b5241eacee6965bfe4ea0426bb8e9f494f1
Signed-off-by: Jian Cao <jian.cao@amlogic.com>
osd: tl1 hold line fix needn't shift workaround [1/1]
PD#172587
Problem:
tl1 hold line fix needn't shift workaround.
Solution:
remove shift workaround int tl1
Verify:
verified by x301
Change-Id: I96d99758ba6f93622c34a8e69c4a3f769fdfad49
Signed-off-by: pengcheng chen <pengcheng.chen@amlogic.com>
usb: bringup usb for tl1 [1/1]
PD#172587
Problem:
bringup usb for tl1
Solution:
bringup usb for tl1.
disable usb device sof interrupt for tl1.
Verify:
verify on tl1 skt.
Change-Id: Ifbcd3b406145ac39709ff2df795544086277f00e
Signed-off-by: Yue Wang <yue.wang@amlogic.com>
Signed-off-by: Luan Yuan <luan.yuan@amlogic.com>
Conflicts:
arch/arm/boot/dts/amlogic/mesontl1.dtsi
PD#SWPL-4035
Problem:
cpu driver need read efuse data
Solution:
add interface to read data
Verify:
g12a_skt
Change-Id: Ia5d74c3fa057d06426b4277652e508714400a30f
Signed-off-by: Shunzhou Jiang <shunzhou.jiang@amlogic.com>
PD#SWPL-4354
Problem:
alloc flag is not correct when free dma buffer
Solution:
reset alloc flag when free dma buffer
Verify:
test pass on g12a-u200
Change-Id: Idfc0be5b394d18799232f6239b3f6c6df9181ce0
Signed-off-by: Jian Cao <jian.cao@amlogic.com>
PD#SWPL-4354
Problem:
alloc flag is not correct when free dma buffer
Solution:
reset alloc flag when free dma buffer
Verify:
test pass on g12a-u200
Change-Id: I4aea27f38ebda72cfe77183423600c918b836d7c
Signed-off-by: Jian Cao <jian.cao@amlogic.com>
PD#SWPL-3381
Problem:
vd2 used postblend as default after g12a chip
Solution:
force vd2 using preblend when playing mvc
Verify:
Locally on u212
Change-Id: Ia7fab8ad70ed1e58b7ade241828afab288b94bec
Signed-off-by: Brian Zhu <brian.zhu@amlogic.com>
PD#SWPL-3088
Problem:
g12b big-little cluster is different from other SoC with pmu
interrupts and registers.
software modifications must adapt to the difference.
Solution:
modify
Verify:
u200 w400
Change-Id: If9217c1025dff5c17d51790f8c216e31b7d6532b
Signed-off-by: Hanjie Lin <hanjie.lin@amlogic.com>
Signed-off-by: Luan Yuan <luan.yuan@amlogic.com>
PD#SWPL-915
Problem:
DOLBY only sets the enhancement for the first frame ->
Vd sets cur_dispubf2 according to enhance ->
codec_mm keeps the last frame according to cur_dispbuf2,
so it fails -> AFBC2 access to the released content causes the trigger.
Solution:
close afbc2
Verify:
r321
Change-Id: I03c431a6ea11b8aabf97b1f0b21f717024be2f62
Signed-off-by: Yi Zhou <yi.zhou@amlogic.com>
PD#SWPL-4320
Problem:
The meson8b and arm64_a32 are both selected in Kconfig,
which is quite misleading
Solution:
Disable meson8b when arm64_a32 is selected
Verify:
Locally passed for Ampere
Change-Id: I93f55239ea90bf8cf6b96e108b6fd4a239de32b4
Signed-off-by: Jiamin Ma <jiamin.ma@amlogic.com>
PD#SWPL-4876
Problem:
32bit will operate led-trigger cpu0 in cpu idle enter/exit causing
system led flashing.
Solution:
give up using led-trigger cpu0.
Verify:
g12a_u211 g12a_u212
Change-Id: I106a4fe0e35923919f5bbc34113fa73a4ca28577
Signed-off-by: Bichao Zheng <bichao.zheng@amlogic.com>
Signed-off-by: Luan Yuan <luan.yuan@amlogic.com>
Conflicts:
arch/arm64/boot/dts/amlogic/g12b_a311x_w411_buildroot.dts
PD#SWPL-3359
Problem:
the bt656 clocks were missing
Solution:
1.add bt656 clocks
2.fix several errors for media clocks
Verify:
test passed on u200
Change-Id: Iff69e790c78335930d6b2ea54f7544aca464e1fb
Signed-off-by: Jian Hu <jian.hu@amlogic.com>
