The virtual address of allocated __GFP_HIGHMEM pages is not mapped,
Using kmap_atomic to build it, or it will failed like:
Unable to handle kernel NULL pointer dereference at virtual address 00000000
pgd = 50ec00c8
[00000000] *pgd=00000000
Internal error: Oops: 817 [#1] PREEMPT SMP ARM
Modules linked in:
CPU: 3 PID: 67 Comm: rkflash Not tainted 4.19.111 #67
Hardware name: Generic DT based system
PC is at memcpy+0x50/0x330
LR is at 0x61640a68
Change-Id: I0cde9012d29e49d9ba751cb019ccfa784c01b7c7
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Fixes: 266443eda9 ("media: i2c: sc200ai support get config from cmdline for thunderboot")
Signed-off-by: Yongzhen <yuyz@rock-chips.com>
Change-Id: I9624bd9f36795e1fd6802990b17173c68be63bb7
The RK3588 USB2 PHY provides CLK12MOHCI and CLK48MOHCI to
OHCI controllers, and the two clocks are turned off upon
PHY reset, therefore it shouldn't access OHCI Controller
if USB2 PHY in reset. However, during the system PM resume,
the current USB2 PHY power on sequence with PHY reset
operation has potential risk that reset PHY accidentally
when OHCI platform resume access OHCI Controller, and
cause system hung.
The reason is EHCI/OHCI controllers resume ordering on
RK3588. In outline form, the hcd_bus_resume() of EHCI
and the ohci_resume() of OHCI operating concurrently on
different CPUs perform the following actions:
CPU 0 CPU 1
---------------------------- ---------------------------------
async_resume()
usb_resume()
hcd_bus_resume() -- EHCI
usb_phy_roothub_resume()
phy_power_on()
rockchip_usb2phy_power_on() ohci_platform_resume()
rockchip_usb2phy_reset() ohci_resume()
assert phy reset ...
udelay(10); ohci_readl or ohci_writel
This patch fixes USB2 PHY reset during power on for RK3588,
only do USB2 PHY reset for RK3588 USB OTG0 and OTG1, because
their 'common_on_n' bit can be set to 1'b1 (aka REFCLK_LOGIC,
Bias, and PLL blocks are powered down) in PM runtime process.
And keep the 'common_on_n' to 1'b0 for RK3588 USB2 HOST0 and
HOST1, thus we don't need to do PHY reset during power on for
them.
This patch doesn't increase the USB2 PHY power consumption,
because the USB2 HOST0 and HOST1 don't support PM runtime
management, so actually the PHY PLL blocks of USB2 HOST0 and
HOST1 are always powered on.
Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: Ia0121a7c49bef4f0f3a1fb11a810e4ef95b29982
diff rv1103g_bat_ipc_demo_v11 with rv1103g_bat_ipc_demo_v10
1. camera sensor use SC3338
2. remove WiFi's PA
3. control lux_en(GPIO3_A2) inversely
Signed-off-by: Weiwen Chen <cww@rock-chips.com>
Change-Id: I57b9dd35a7cddc5869d385412d47112c3b9a6222
Make sure do drop the reference taken to the companion device
during probe/remove/resume.
Fixes: 68850661b5 ("usb: host: ehci-platform: Add device_link between the ehci and companion")
Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: I0bbfe77987a1c11bfaa5006d98a56480ff16224f
This introduces specific definitions for vendor Rockchip and its
associated tiled format modifier. This modifier is used for the
output format of the Video/JPEG Decoder, that can be imported
directly with the VOP2.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I03c1a51af5fd8bc0702209ae216c4706b4101c49
The layout about meta has been changed and defined in
rv1106-thunder-boot.dtsi.
Signed-off-by: Wang Xiaobin <xb.wang@rock-chips.com>
Change-Id: Ia05c9020dd52b5c6a0e9c94b1e7d799fd65d9d76
Add DT property 'analogix,force-stream-valid' to DTS node
if want to support vrr.
Fixes: 2abd3af02c ("drm/bridge: analogix_dp: Use video format information from register")
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: Ic4624e4ca3a03322f1d9520a7e3cee0d054c36ee
Except spi2m2 which is used for pmic. all spi change from 33ohm to 40ohm
to avoid overcharge.
Change-Id: Ib1f613b19c1ca9f978c11a7d26422ff66b4b910c
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Reach controller register in user space by mmap operation, And only do spi
transmission in user space.
Change-Id: I37e22ad04813c2cd10d97324339afc5a11da59bd
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
The GPIO2A2 GPIO2A3 GPIO2C0 GPIO3B2 GPIO3B3 have 3 bits for pinmux, and
have a extra bit to select 2bits or 3bits.
The Rockchip downstream has a soc_data_init to choice 3bits mode, but
the upstream uses 2bits mode.
This patch removes the soc_data_init/re_init and set the soc data init
directly during probe.
Fixes: ae7b9050a3 ("UPSTREAM: pinctrl: rockchip: fix RK3308 pinmux bits")
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I57b88c776f86a37e34a38cd7b81e422e0cce2e03
Test code of embedded DMA design based on dwc controller.
Show the controller registered with dmatest, and you can assigned the
correspond test_dev for test:
echo show > ./sys/module/pcie_dw_dmatest/parameters/dmatest
Check the value of the current parameter:
grep -H . /sys/module/pcie_dw_dmatest/parameters/*
Fix parameter and run the dmatest:
echo 0 > ./sys/module/pcie_dw_dmatest/parameters/test_dev
echo 1 > ./sys/module/pcie_dw_dmatest/parameters/chn_en
echo 1 > ./sys/module/pcie_dw_dmatest/parameters/rw_test
echo 0x100 > ./sys/module/pcie_dw_dmatest/parameters/size
echo 0x1 > ./sys/module/pcie_dw_dmatest/parameters/cycles_count
echo 0x3c000000 > ./sys/module/pcie_dw_dmatest/parameters/local_addr
echo 0x3c000000 > ./sys/module/pcie_dw_dmatest/parameters/bus_addr
echo run > ./sys/module/pcie_dw_dmatest/parameters/dmatest
Change-Id: I1b48f849e5e37baec27bc62d2a8cf4945fb40cbc
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
1.Optimize DMA hook to support multiple independent DMA channels
2.Add interrupt callback to support multiple independent DMA channels
Change-Id: I42a638a4cb9fa61ebc1cd51d4e9f6d6942715fd1
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
This patch can save 0.6mA for PMUIO2(3V3).
Tested on RK3588_EVB1_LP4_V10 platform.
Change-Id: If9298b7de5859e8bfd28baf3e1022b71efd78218
Signed-off-by: Liang Chen <cl@rock-chips.com>
Some NVR product want skip-ref-fb, destroy logo
fb after some delay to make sure the plane is
disabled.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Change-Id: Ia257a510ea2382b5ee6aa4f65b2fef856687b0bc
