For next Soc VOP only vopb win1 support AFBDC, so we need
add afbdc feature for every win.
Change-Id: Icbe5e26189d2147a6b81f2f75d0b855b2c35fd26
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
CTA-861-G defined Hybrid Log-Gamma (HLG) based on ITU-R
BT.2100-0.
Change-Id: Ieb18284265529ee8d76b250d8bb5b3752425814a
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
CABC(Content Adaptive Backlight Control) is used to
increase the contrast of such LCD-screens the backlight
can be (globally) dimmed when the image to be displayed
is dark (i.e. not comprising high intensity image data)
while the image data is numerically corrected and adapted
to the reduced backlight intensity.
Change-Id: I0bd84375264675943f1b601f0cac8b843567087d
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Patch based on a previous series by Shashank Sharma.
This introduces optional properties to enable color correction at the
pipe level. It relies on 3 transformations applied to every pixels
displayed. First a lookup into a degamma table, then a multiplication
of the rgb components by a 3x3 matrix and finally another lookup into
a gamma table.
The following properties can be added to a pipe :
- DEGAMMA_LUT : blob containing degamma LUT
- DEGAMMA_LUT_SIZE : number of elements in DEGAMMA_LUT
- CTM : transformation matrix applied after the degamma LUT
- GAMMA_LUT : blob containing gamma LUT
- GAMMA_LUT_SIZE : number of elements in GAMMA_LUT
DEGAMMA_LUT_SIZE and GAMMA_LUT_SIZE are read only properties, set by
the driver to tell userspace applications what sizes should be the
lookup tables in DEGAMMA_LUT and GAMMA_LUT.
A helper is also provided so legacy gamma correction is redirected
through these new properties.
v2: Register LUT size properties as range
v3: Fix round in drm_color_lut_get_value() helper
More docs on how degamma/gamma properties are used
v4: Update contributors
v5: Rename CTM_MATRIX property to CTM (Doh!)
Add legacy gamma_set atomic helper
Describe CTM/LUT acronyms in the kernel doc
v6: Fix missing blob unref in drm_atomic_helper_crtc_reset
Signed-off-by: Kumar, Kiran S <kiran.s.kumar@intel.com>
Signed-off-by: Kausal Malladi <kausalmalladi@gmail.com>
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Acked-by: Rob Bradford <robert.bradford@intel.com>
[danvet: CrOS maintainers are also happy with the userspacde side:
https://codereview.chromium.org/1182063002/ ]
Reviewed-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1456506302-640-4-git-send-email-lionel.g.landwerlin@intel.com
(cherry picked from commit 5488dc16fd)
Change-Id: I8952fa72998b669cf6d8a7e120a72ffb225b1ba1
Signed-off-by: Shashank Sharma <shashank.sharma@intel.com>
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
With the atomic API, it is possible that a single commit affects
multiple crtcs. If the user requests an event with that commit, one
event will be sent for each CRTC, but it is not possible to distinguish
which crtc an event is for in user space. To solve this, the reserved
field in struct drm_vblank_event is repurposed to include the crtc_id
which the event is for.
The DRM_CAP_CRTC_IN_VBLANK_EVENT is added to allow userspace to query if
the crtc field will be set properly.
[daniels: Rebased, using Maarten's forward-port.]
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Signed-off-by: Daniel Stone <daniels@collabora.com>
Cc: Maarten Lankhorst <maarten.lankhorst@intel.com>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
(am from https://patchwork.kernel.org/patch/9662099/)
Change-Id: Ibe6949782e5df5363d4eaa3e98b3ff413239cf26
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
The buffer have been accessed by CPU needs to be synced
for the device to see the most up-to-date.
So introduce a flag here to see if a buffer need flush cache.
Change-Id: I68457aa528d04acc6f92dfa2171d8c807ab657a6
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
When doing a atomic commit affecting multiple crtc's, multiple events
are generated. The user_data member does not allow you to distinguish,
because they all have the same pointer.
I've chosen to use crtc_id, because using pipe would create ambiguity
when pipe = 0. A test for != 0 is easier to implement, and crtc_id
will never be 0.
Change-Id: Ie2daba50f711f298872f15498b8d46dedb38c0ff
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: David Airlie <airlied@linux.ie>
Cc: Daniel Stone <daniels@collabora.com>
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
(am from https://patchwork.kernel.org/patch/9272895/)
Since bits[19:22] have been used for picture aspect ratio
in upstream patch 876f43c073.
We define YCbCr420 flag to the subsequent bits.
Change-Id: I2eff8b51227fc7beb4f587e90bc070ae865ba9d4
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
HDMI 2.0 introduces a new sampling mode called YCbCr 4:2:0.
According to the spec the EDID may contain two blocks that
signal this sampling mode:
- YCbCr 4:2:0 Video Data Block
- YCbCr 4:2:0 Video Capability Map Data Block
The video data block contains the list of vic's were
only YCbCr 4:2:0 sampling mode shall be used while the
video capability map data block contains a mask were
YCbCr 4:2:0 sampling mode may be used.
This RFC patch adds support for parsing these two new blocks
and introduces new flags to signal the drivers if the
mode is 4:2:0'only or 4:2:0'able.
The reason this is still a RFC is because there is no
reference in kernel for this new sampling mode (specially in
AVI infoframe part), so, I was hoping to hear some feedback
first.
Tested in a HDMI 2.0 compliance scenario.
Signed-off-by: Jose Abreu <joabreu@synopsys.com>
Cc: Carlos Palminha <palminha@synopsys.com>
Cc: Daniel Vetter <daniel.vetter@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Sean Paul <seanpaul@chromium.org>
Cc: David Airlie <airlied@linux.ie>
Cc: dri-devel@lists.freedesktop.org
Cc: linux-kernel@vger.kernel.org
(am from https://patchwork.kernel.org/patch/9495175)
Change-Id: I7c9e331b5bf5f1fbcefd4368bc4b82ff180eb91e
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
drm_format_plane_cpp use byte size, not works for 10bit
format, use drm_format_plane_bpp instead.
Change-Id: If1a6ca1c286747fdc868184cebe75eb0af0a746d
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
AFBC is arm vendor format, it's a compressed format.
The AFBC format is supported by rk3399 vop big.
We know little about AFBC layout, hope to some guys can
fixme about the afbc comment.
Change-Id: I9b3edaeb8cc7ffb792820c2f9a60d91fd0c6c28b
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
(am from https://patchwork.kernel.org/patch/9324667/)
The plane hardware is used when the display scanout run into plane active
scanout, that means we can reuse the plane hardware resources on plane
non-active scanout.
Because resource share, There are some limit on share plane: one group
of share planes need use same zpos, can't not overlap, etc.
We assume share plane is a universal plane with some limit flags.
people who use the share plane need know the limit, should call the ioctl
DRM_CLIENT_CAP_SHARE_PLANES, and judge the planes limit before use it.
Change-Id: Iecc3d8e7f1ce29d567cdbad689ba4dbad3d594e1
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Rockchip RGA is a separate 2D raster graphic acceleration unit. It
accelerates 2D graphics operations, such as point/line drawing, image
scaling, rotation, BitBLT, alpha blending and image blur/sharpness.
Change-Id: I9be8d683ea04802affb973b8b1ada646afe411d7
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
These ioctls can be used to synchronize CPU/GPU access to a buffer.
BUG=chrome-os-partner:33438
TEST=add CONFIG_DRM_DMA_SYNC=y, in conjunction with xf86-video-armsoc change,\
run any X application, like xev
Change-Id: I8065ec465ebd0cb6abe128a3e7d92a8f74a88928
Signed-off-by: Dominik Behr <dbehr@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/229441
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Conflicts:
drivers/gpu/drm/rockchip/rockchip_drm_drv.c
drivers/gpu/drm/rockchip/rockchip_drm_drv.h
drivers/gpu/drm/rockchip/rockchip_drm_gem.c
(cherry picked from cros/chromeos-3.14 commit a847e1f492cbd186116c01a3f56575320dc87152)
Signed-off-by: ZhengShunQian <zhengsq@rock-chips.com>
Rockchip Socs have GPU, we need allocate GPU accelerated buffers.
So add special ioctls GEM_CREATE/GEM_MAP_OFFSET to support
accelerated buffers.
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
BUG=chromium:399935
TEST=With rest of patch set, can boot to UI on eDP
Change-Id: Ia4b13798aac97d16214da7a75a2479e6e334313e
Reviewed-on: https://chromium-review.googlesource.com/222153
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Tested-by: Daniel Kurtz <djkurtz@chromium.org>
Commit-Queue: Daniel Kurtz <djkurtz@chromium.org>
Conflicts:
drivers/gpu/drm/rockchip/rockchip_drm_drv.c
(cherry picked from cros/chromeos-3.14 commit c29c5a3037e18815937d8af664738e499ada94d1)
Signed-off-by: ZhengShunQian <zhengsq@rock-chips.com>
Thoes file were introduced by Commit bdafdac384
(rk3288 chromium: drm grafic fb support for x11 mali gpu), for now we have the
mainline rockchip drm code, no need those old head files, let's removed them.
Change-Id: I325a5b7981ac5478349f276f8811b1b51e40c564
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Single fix for uapi.
* tag 'topic/drm-fixes-2015-11-11' of git://anongit.freedesktop.org/drm-intel:
drm: Use userspace compatible type in fourcc_mod_code macro
No longer required in a lot of cases, as objects are identified over NVIF
via an alternate mechanism since the rework.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
More amdgpu and radeon stuff for drm-next. Stoney support is the big change.
The rest is just bug fixes and code cleanups. The Stoney stuff is pretty
low impact with respect to existing chips.
* 'drm-next-4.4' of git://people.freedesktop.org/~agd5f/linux:
drm/amdgpu: change VM size default to 64GB
drm/amdgpu: add Stoney pci ids
drm/amdgpu: update the core VI support for Stoney
drm/amdgpu: add VCE support for Stoney (v2)
drm/amdgpu: add UVD support for Stoney
drm/amdgpu: add GFX support for Stoney (v2)
drm/amdgpu: add SDMA support for Stoney (v2)
drm/amdgpu: add DCE support for Stoney
drm/amdgpu: Update SMC/DPM for Stoney
drm/amdgpu: add GMC support for Stoney
drm/amdgpu: add Stoney chip family
drm/amdgpu: fix the broken vm->mutex V2
drm/amdgpu: remove the unnecessary parameter adev for amdgpu_fence_wait_any()
drm/amdgpu: remove the exclusive lock
drm/amdgpu: remove old lockup detection infrastructure
drm: fix trivial typos
drm/amdgpu/dce: simplify suspend/resume
drm/amdgpu/gfx8: set TC_WB_ACTION_EN in RELEASE_MEM packet
drm/radeon: Use rdev->gem.mutex to protect hyperz/cmask owners
More drm-misc for 4.4.
- fb refcount fix in atomic fbdev
- various locking reworks to reduce drm_global_mutex and dev->struct_mutex
- rename docbook to gpu.tmpl and include vga_switcheroo stuff, plus more
vga_switcheroo (Lukas Wunner)
- viewport check fixes for atomic drivers from Ville
- DRM_DEBUG_VBL from Ville
- non-contentious header fixes from Mikko Rapeli
- small things all over
* tag 'topic/drm-misc-2015-10-19' of git://anongit.freedesktop.org/drm-intel: (31 commits)
drm/fb-helper: Fix fb refcounting in pan_display_atomic
drm/fb-helper: Set plane rotation directly
drm: fix mutex leak in drm_dp_get_mst_branch_device
drm: Check plane src coordinates correctly during page flip for atomic drivers
drm: Check crtc viewport correctly with rotated primary plane on atomic drivers
drm: Refactor plane src coordinate checks
drm: Swap w/h when converting the mode to src coordidates for a rotated primary plane
drm: Don't leak fb when plane crtc coodinates are bad
ALSA: hda - Spell vga_switcheroo consistently
drm/gem: Use kref_get_unless_zero for the weak mmap references
drm/vgem: Drop vgem_drm_gem_mmap
drm: Fix return value of drm_framebuffer_init()
drm/gem: Use container_of in drm_gem_object_free
drm/gem: Check locking in drm_gem_object_unreference
drm/gem: Drop struct_mutex requirement from drm_gem_mmap_obj
drm/i810_drm.h: include drm/drm.h
r128_drm.h: include drm/drm.h
savage_drm.h: include <drm/drm.h>
gpu/doc: Convert to markdown harder
gpu/doc: Add vga_switcheroo documentation
...
- dmc fixes from Animesh (not yet all) for deeper sleep states
- piles of prep patches from Ville to make mmio functions type-safe
- more fbc work from Paulo all over
- w/a shuffling from Arun Siluvery
- first part of atomic watermark updates from Matt and Ville (later parts had to
be dropped again unfortunately)
- lots of patches to prepare bxt dsi support ( Shashank Sharma)
- userptr fixes from Chris
- audio rate interface between i915/snd_hda plus kerneldoc (Libin Yang)
- shrinker improvements and fixes (Chris Wilson)
- lots and lots of small patches all over
* tag 'drm-intel-next-2015-10-10' of git://anongit.freedesktop.org/drm-intel: (134 commits)
drm/i915: Update DRIVER_DATE to 20151010
drm/i915: Partial revert of atomic watermark series
drm/i915: Early exit from semaphore_waits_for for execlist mode.
drm/i915: Remove wrong warning from i915_gem_context_clean
drm/i915: Determine the stolen memory base address on gen2
drm/i915: fix FBC buffer size checks
drm/i915: fix CFB size calculation
drm/i915: remove pre-atomic check from SKL update_primary_plane
drm/i915: don't allocate fbcon from stolen memory if it's too big
Revert "drm/i915: Call encoder hotplug for init and resume cases"
Revert "drm/i915: Add hot_plug hook for hdmi encoder"
drm/i915: use error path
drm/i915/irq: Fix misspelled word register in kernel-doc
drm/i915/irq: Fix kernel-doc warnings
drm/i915: Hook up ring workaround writes at context creation time on Gen6-7.
drm/i915: Don't warn if the workaround list is empty.
drm/i915: Resurrect golden context on gen6/7
drm/i915/chv: remove pre-production hardware workarounds
drm/i915/snb: remove pre-production hardware workaround
drm/i915/bxt: Set time interval unit to 0.833us
...
Add 3D support to the virtio-gpu.
* 'virtio-gpu-for-drm-next' of git://git.kraxel.org/linux:
virtio-gpu: add page flip support
virtio-gpu: mark as a render gpu
virtio-gpu: add basic prime support
virtio-gpu: add 3d/virgl support
virtio-gpu: don't free things on ttm_bo_init failure
virtio-gpu: wait for cursor updates finish
virtio-gpu: add & use virtio_gpu_queue_fenced_ctrl_buffer
virtio-gpu: add virtio_gpu_queue_ctrl_buffer_locked
Fixes userspace compilation error:
error: array type has incomplete element type
struct drm_clip_rect boxes[I810_NR_SAREA_CLIPRECTS];
Signed-off-by: Mikko Rapeli <mikko.rapeli@iki.fi>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Fixes compile error:
drm/r128_drm.h:156:23: error: array type has incomplete element type
struct drm_clip_rect boxes[R128_NR_SAREA_CLIPRECTS];
Signed-off-by: Mikko Rapeli <mikko.rapeli@iki.fi>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Fixes compiler error:
drm/savage_drm.h:50:24: error: array type has incomplete element type
struct drm_tex_region texList[SAVAGE_NR_TEX_HEAPS][SAVAGE_NR_TEX_REGIONS +
Signed-off-by: Mikko Rapeli <mikko.rapeli@iki.fi>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
There are some allocations that must be only referenced by 32-bit
offsets. To limit the chances of having the first 4GB already full,
objects not requiring this workaround use DRM_MM_SEARCH_BELOW/
DRM_MM_CREATE_TOP flags
In specific, any resource used with flat/heapless (0x00000000-0xfffff000)
General State Heap (GSH) or Instruction State Heap (ISH) must be in a
32-bit range, because the General State Offset and Instruction State
Offset are limited to 32-bits.
Objects must have EXEC_OBJECT_SUPPORTS_48B_ADDRESS flag to indicate if
they can be allocated above the 32-bit address range. To limit the
chances of having the first 4GB already full, objects will use
DRM_MM_SEARCH_BELOW + DRM_MM_CREATE_TOP flags when possible.
The libdrm user of the EXEC_OBJECT_SUPPORTS_48B_ADDRESS flag is here:
http://lists.freedesktop.org/archives/intel-gfx/2015-September/075836.html
v2: Changed flag logic from neeeds_32b, to supports_48b.
v3: Moved 48-bit support flag back to exec_object. (Chris, Daniel)
v4: Split pin flags into PIN_ZONE_4G and PIN_HIGH; update PIN_OFFSET_MASK
to use last PIN_ defined instead of hard-coded value; use correct limit
check in eb_vma_misplaced. (Chris)
v5: Don't touch PIN_OFFSET_MASK and update workaround comment (Chris)
v6: Apply pin-high for ggtt too (Chris)
v7: Handle simultaneous pin-high and pin-mappable end correctly (Akash)
Fix check for entries currently using +4GB addresses, use min_t and
other polish in object_bind_to_vm (Chris)
v8: Commit message updated to point to libdrm patch.
v9: vmas are allocated in the correct ozone, so only check flag when the
vma has not been allocated. (Chris)
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> (v4)
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Backmerge Linux 4.3-rc2 because of conflicts in the dp helper code
between bugfixes and new code. Just adjacent lines really.
On top of that there's a silent conflict in the new fsl-dcu driver
merged into 4.3 and
commit 844f9111f6
Author: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Date: Wed Sep 2 10:42:40 2015 +0200
drm/atomic: Make prepare_fb/cleanup_fb only take state, v3.
which Thierry Reding spotted and provided a fixup for.
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Since this already confused me once when adding addfb2.1, let's clean up
the header to split params one per line.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
