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Author SHA1 Message Date
Bjorn Andersson
c9ec155b59 arm64: dts: qcom: msm8998-mtp: Add alias for blsp1_uart3 
The msm_serial driver has a predefined set of uart ports defined, which
is allocated either by reading aliases or if no match is found a simple
counter, starting at index 0. But there's no logic in place to prevent
these two allocation mechanism from colliding. As a result either none
or all of the active msm_serial instances must be listed as aliases.

Define blsp1_uart3 as "serial1" to mitigate this problem.

Fixes: 4cffb9f2c7 ("arm64: dts: qcom: msm8998-mtp: Enable bluetooth")
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
Link: https://lore.kernel.org/r/20191119011823.379100-1-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2020-01-07 15:17:03 -08:00
Rajeshwari
2552c123e8 arm64: dts: qcom: sc7180: Add critical interrupt and cooling maps for TSENS in SC7180 
Added critical interrupt support in TSENS node and cooling maps in Thermal-zones node.

Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Rajeshwari <rkambl@codeaurora.org>
Link: https://lore.kernel.org/r/1578317369-16045-2-git-send-email-rkambl@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2020-01-06 21:39:03 -08:00
Stanimir Varbanov
277a13b5f8 arm64: dts: qcom: msm8996: Fix venus iommu nodename error 
Fix the following error/warn seen with make dtbs_check

arm,smmu-venus@d40000: $nodename:0: 'arm,smmu-venus@d40000' does not match '^iommu@[0-9a-f]*'
arm,smmu-venus@d40000: clock-names:0: 'bus' was expected
arm,smmu-venus@d40000: clock-names:1: 'iface' was expected

by rename nodename to "iommu".

Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
Link: https://lore.kernel.org/r/20200106102305.27059-1-stanimir.varbanov@linaro.org
[bjorn: Added padding of address to 8 digits]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2020-01-06 11:10:59 -08:00
Vinod Koul
a8aa481a5d arm64: dts: qcom: sdm845: add the ufs reset 
Add the core UFS reset for sdm845

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20200106070826.147064-4-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2020-01-05 23:33:59 -08:00
Vinod Koul
c79ec8911e arm64: dts: qcom: sm8150: Fix UFS phy register size 
UFS phy register space size is 0x1c0. so update it

Reported-by: Can Guo <cang@codeaurora.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20200106070826.147064-3-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2020-01-05 23:33:55 -08:00
Vinod Koul
7c785435ba arm64: dts: qcom: sm8150-mtp: Add UFS gpio reset 
Add the reset-gpio for UFS for sm8150-mtp.

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20200106070826.147064-2-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2020-01-05 23:33:50 -08:00
Niklas Cassel
04aadcaadd arm64: dts: qcom: qcs404: Add CPR and populate OPP table 
Add CPR and populate OPP table.

Co-developed-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Link: https://lore.kernel.org/r/20191129213917.1301110-4-niklas.cassel@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2020-01-04 23:57:32 -08:00
Jorge Ramirez-Ortiz
cbccc6bcdf arm64: dts: qcom: qcs404: Add DVFS support 
Support dynamic voltage and frequency scaling on qcs404.

CPUFreq will soon be superseded by Core Power Reduction (CPR, a form
of Adaptive Voltage Scaling found on some Qualcomm SoCs like the
qcs404).

Due to the CPR upstreaming already being in progress - and some
commits already merged -  the following commit will need to be
reverted to enable CPUFreq support

   Author: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
   Date:   Thu Jul 25 12:41:36 2019 +0200
       cpufreq: Add qcs404 to cpufreq-dt-platdev blacklist

Co-developed-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20191125142511.681149-5-niklas.cassel@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2020-01-04 23:56:53 -08:00
Jorge Ramirez-Ortiz
01163a2001 arm64: dts: qcom: qcs404: Add the clocks for APCS mux/divider 
Specify the clocks that feed the APCS mux/divider instead of using
default hardcoded values in the source code.

Co-developed-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20191125142511.681149-4-niklas.cassel@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2020-01-04 23:56:45 -08:00
Jorge Ramirez-Ortiz
40b3d94043 arm64: dts: qcom: qcs404: Add HFPLL node 
The high frequency pll functionality is required to enable CPU
frequency scaling operation.

Co-developed-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20191125142511.681149-3-niklas.cassel@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2020-01-04 23:56:42 -08:00
Jorge Ramirez-Ortiz
118764988c arm64: dts: qcom: msm8916: Add the clocks for the APCS mux/divider 
Specify the clocks that feed the APCS mux/divider instead of using
default hardcoded values in the source code.

The driver still supports the previous bindings; however with this
update it we allow the msm8916 to access the parent clock names
required by the driver operation using the device tree node.

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20191125142511.681149-2-niklas.cassel@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2020-01-04 23:56:17 -08:00
Sibi Sankar
a16f862f60 arm64: dts: qcom: sc7180: Add rpmh power-domain node 
Add the DT node for the rpmhpd power controller on SC7180 SoCs.

Reviewed-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20191220064823.6115-3-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2020-01-04 23:54:03 -08:00
AngeloGioacchino Del Regno
268b4cdfff arm64: dts: pm8004: Add SPMI regulator and add phandles to lsids 
Add the SPMI regulator node in the PM8004 LSID5 (as there is where
it resides basically 99% of the times) and set the nodes to be
disabled by default, as not all boards have both or one of the
lsids specified in this generic pm8004 DT.

While at it, also add nice phandles to the lsids specified in this
DT to allow configuration in specific board dts in a more human
readable fashion.

Signed-off-by: AngeloGioacchino Del Regno <kholk11@gmail.com>
Link: https://lore.kernel.org/r/20191031111645.34777-3-kholk11@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2020-01-03 12:56:36 -08:00
Amit Kucheria
f0b888af53 arm64: dts: msm8998: thermal: Add critical interrupt support 
Register critical interrupts for each of the two tsens controllers

Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Link: https://lore.kernel.org/r/3ef309a98ca6445c1982ec3ff1a70db39b18f415.1575349416.git.amit.kucheria@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2019-12-28 22:25:53 -08:00
Amit Kucheria
1246f78297 arm64: dts: msm8996: thermal: Add critical interrupt support 
Register critical interrupts for each of the two tsens controllers

Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Link: https://lore.kernel.org/r/53d8f7b922ec889ed11380896c2a367ae0998db2.1575349416.git.amit.kucheria@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2019-12-28 22:25:34 -08:00
Bjorn Andersson
82b1cc447a arm64: dts: qcom: db845c: Move remoteproc firmware to sdm845 
The redistributable firmware should work on any engineering device, so
lets push this to qcom/sdm845, rather than qcom/db845c. Also specify the
path for the modem firmware.

Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20191113203951.3704428-1-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2019-12-26 21:03:35 -08:00
Bjorn Andersson
6cbdec2d3c arm64: dts: qcom: msm8996: Introduce IFC6640 
Introduce a base dts for the Inforce 6640 Single Board Computer. This
initial commit boots to console on the uart and provides UFS and SD card
storage support.

Acked-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2019-12-26 16:24:10 -08:00
Bjorn Andersson
83d9ed4342 arm64: dts: qcom: db820c: Use regulator names from schematics 
Update the regulator names in db820c.dtsi to use the names from the
schematics, instead of the made up genric names.

Acked-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2019-12-26 16:24:10 -08:00
Bjorn Andersson
50aa72ccb3 arm64: dts: qcom: msm8996: Sort all nodes in msm8996.dtsi 
Sort all the nodes by unit address, then name.

Acked-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2019-12-26 16:24:10 -08:00
Bjorn Andersson
86f6d6225e arm64: dts: qcom: msm8996: Pad addresses 
Pad all addresses in msm8996.dtsi to 8 digits, in order to make it
easier to ensure ordering when adding new nodes.

Acked-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2019-12-26 16:24:09 -08:00
Bjorn Andersson
88264f1f6b arm64: dts: qcom: db820c: Remove pin specific files 
Rather than scattering pinctrl definitions in various files, merge the
nodes into db820c.dtsi to make it easier to navigate.

Acked-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2019-12-26 16:24:09 -08:00
Bjorn Andersson
d5f4ac865a arm64: dts: qcom: db820c: Sort all nodes 
Sort all nodes in db820c.dtsi based on address, then name.

Acked-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2019-12-26 16:24:09 -08:00
Bjorn Andersson
7b494cc41e arm64: dts: qcom: db820c: Group root nodes 
Prior refactoring have left a few root nodes scattered throughout
db820c.dtsi, group these at the top of the file.

Acked-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2019-12-26 16:24:08 -08:00
Bjorn Andersson
c61a5658e8 arm64: dts: qcom: msm8996: Move regulators to db820c 
As the definition of available PMICs and the names of their outputs are
board specifc move this to db820c.dtsi

Acked-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2019-12-26 16:24:08 -08:00
Bjorn Andersson
8088443143 arm64: dts: qcom: msm8996: Move regulator consumers to db820c 
Supplies for the various components in the SoC depends on board layout,
so move the supply definitions to db820c.dtsi instead of carrying them
in the platform dtsi.

Acked-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2019-12-26 16:24:08 -08:00
Bjorn Andersson
75b77d6492 arm64: dts: qcom: msm8996: Use node references in db820c 
Instead of mimicing the structure of the platform, reference nodes by
their label in apq8096-db820c.dtsi. Add labels in msm8996.dtsi where
necessary.

Acked-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2019-12-26 16:24:08 -08:00
Bjorn Andersson
f978d45b4a arm64: dts: qcom: db820c: Move non-soc entries out of /soc 
The USB id pins and wlan regulator are not platform devices, so move
them out of /soc

Acked-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2019-12-26 16:24:07 -08:00
Bjorn Andersson
2e198c395a arm64: dts: qcom: db845c: Enable ath10k 8bit host-cap quirk 
The WiFi firmware used on db845c implements the 8bit host-capability
message, so enable the quirk for this.

Reviewed-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20191113232245.4039932-1-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2019-12-21 13:06:04 -08:00
Douglas Anderson
276bb28c29 arm64: dts: qcom: sdm845: Rename gic-its node to msi-controller 
This is just like commit ac00546a67 ("arm64: dts: qcom: sc7180:
Rename gic-its node to msi-controller") but for sdm845.  This fixes
all arm64/qcom device trees that I could find.

Reviewed-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20191216222021.1.I684f124a05a1c3f0b113c8d06d5f9da5d69b801e@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2019-12-21 12:12:45 -08:00
Sibi Sankar
a9ee66deec arm64: dts: qcom: msm8998: Add ADSP, MPSS and SLPI nodes 
This patch adds ADSP, MPSS and SLPI nodes for MSM8998 SoCs.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20191218132217.28141-6-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2019-12-20 10:02:45 -08:00
Sibi Sankar
fda8fba668 arm64: dts: qcom: msm8998: Update reserved memory map 
Update existing and add missing regions to the reserved memory map, as
described in version 7.1

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20191218132217.28141-5-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2019-12-20 10:02:43 -08:00
Sibi Sankar
f5ab220d16 arm64: dts: qcom: sc7180: Add remoteproc enablers 
Add scm, smem, smp2p, aoss-qmp, aoss-cc and pdc-global device nodes
to SC7180 SoCs.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20191218143332.29107-1-sibis@codeaurora.org
[bjorn: Updated subject]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2019-12-19 18:14:55 -08:00
Sibi Sankar
fea8930bd5 arm64: dts: qcom: sm8150: Add cpufreq HW device node 
Add cpufreq HW device node to scale 4-Silver/3-Gold/1-Gold+ cores
on SM8150 SoCs.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20191219120633.20723-1-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2019-12-19 16:41:56 -08:00
Sai Prakash Ranjan
9692d9ffa8 arm64: dts: qcom: qcs404: Update the compatible for watchdog timer 
Update the compatible for QCS404 watchdog timer with proper
SoC specific compatible.

Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/757995875cc12d3f5a8f5fd5659b04653950970a.1576211720.git.saiprakash.ranjan@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2019-12-19 16:37:44 -08:00
Douglas Anderson
29c5cb641b arm64: dts: qcom: sc7180: Fix I2C/UART numbers 2, 4, 7, and 9 
Commit f4a73f5e26 ("pinctrl: qcom: sc7180: Add new qup functions")
has landed which means that we absolutely need to use the proper names
for the pinmuxing for I2C/UART numbers 2, 4, 7, and 9.  Let's do it.

For reference:
- If you get only one of this commit and the pinctrl commit then none
  of I2C/UART 2, 4, 7, and 9 will work.
- If you get neither of these commits then I2C 2, 4, 7, and 9 will
  work but not UART.

...but despite the above it should be fine for this commit to land in
the Qualcomm tree because sc7180.dtsi only exists there (it hasn't
made it to mainline).

Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Rajendra Nayak <rnayak@codeaurora.org>
Fixes: ba3fc64963 ("arm64: dts: sc7180: Add qupv3_0 and qupv3_1")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20191217130352.1.Id8562de45e8441cac34699047e25e7424281e9d4@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2019-12-18 09:57:34 -08:00
Jeffrey Hugo
28d647fd83 arm64: dts: msm8998-clamshell: Add pm8005_s1 regulator 
The pm8005_s1 is VDD_GFX, and needs to be on to enable the GPU.
This should be hooked up to the GPU CPR, but we don't have support for that
yet, so until then, just turn on the regulator and keep it on so that we
can focus on basic GPU bringup.

Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
Link: https://lore.kernel.org/r/20191217170249.5280-1-jeffrey.l.hugo@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2019-12-17 22:23:11 -08:00
Maulik Shah
456d677c4e arm64: dts: qcom: sc7180: Add wakeup parent for TLMM 
Specify wakeup parent irqchip for sc7180 TLMM.

Reviewed-by: Lina Iyer <ilina@codeaurora.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Link: https://lore.kernel.org/r/1572419178-5750-3-git-send-email-mkshah@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2019-12-17 22:20:13 -08:00
Sibi Sankar
49076351a2 arm64: dts: qcom: sm8150: Add ADSP, CDSP, MPSS and SLPI remoteprocs 
Add ADSP, CDSP, MPSS and SLPI device tree nodes for SM8150 SoC.

Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20191217092503.10699-1-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2019-12-17 22:18:58 -08:00
Matthias Kaehlcke
7cee5c7428 arm64: dts: qcom: sc7180: Fix node order 
The SC7180 device tree nodes should be ordered by address. Re-shuffle
some nodes which currently don't follow this convention.

Since we are already moving it add a missing leading zero to the
address in the 'reg' property of the 'interrupt-controller@b220000'
node.

Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20191212170824.v2.1.I55198466344789267ed1eb5ec555fd890c9fc6e1@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2019-12-17 21:35:44 -08:00
Jeffrey Hugo
8529728f25 arm64: dts: qcom: msm8998: Fixup uart3 gpio config for bluetooth 
It turns out that the wcn3990 can float the gpio lines during bootup, etc
which will result in the uart core thinking there is incoming data.  This
results in the bluetooth stack getting garbage.  By applying a bias to
match what wcn3990 would drive, the issue is corrected.

Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
Link: https://lore.kernel.org/r/20191021161921.31825-1-jeffrey.l.hugo@gmail.com
[bjorn: Moved board specific pinctrl states to the end]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2019-12-17 21:26:58 -08:00
Stephen Boyd
39523c56b6 arm64: dts: qcom: sdm845-cheza: Add cr50 spi node 
Add the cr50 device to the spi controller it is attached to. This
enables /dev/tpm0 and some login things on Cheza.

Reviewed-by: Douglas Anderson <dianders@chromium.org>
Cc: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20191216234204.190769-1-swboyd@chromium.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2019-12-16 19:10:11 -08:00
Sibi Sankar
61025b815e arm64: dts: qcom: sm8150: Add ADSP, CDSP, MPSS and SLPI smp2p 
Add the SMP2P nodes for the remoteproc states for ADSP, CDSP, MPSS and
SLPI remoteprocs.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/0101016e80793dfa-9d0f6e93-01db-4c95-a226-d64bb50238cb-000000@us-west-2.amazonses.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2019-12-16 15:45:57 -08:00
Douglas Anderson
fd91651664 arm64: dts: qcom: sc7180: Avoid "phy" for USB QMP PHY wrapper 
The bindings for the QMP PHY are truly strange.  I believe (?) that
they may have originated because with PCIe each lane is treated as a
different PHY and the same PHY driver is used for a whole bunch of
things (incluidng PCIe).

In any case, now that we have "make dtbs_check", we find that having
the outer node named "phy" triggers the
"schemas/phy/phy-provider.yaml" schema, yelling about:

  phy@88e9000: '#phy-cells' is a required property

Let's call the outer node the "phy-wrapper" and the inner node the
"phy" to make dtbs_check happy.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Fixes: 0b766e7fe5 ("arm64: dts: qcom: sc7180: Add USB related nodes")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20191212113540.6.Iec10b23bb000186b36b8bacfb6789d8233de04a7@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2019-12-12 15:18:41 -08:00
Douglas Anderson
3f155dbebf arm64: dts: qcom: pm6150: Remove macro from unit name of adc-chan 
This is just like commit e77cc85ee3 ("arm64: dts: qcom: sdm845:
remove macro from unit name").  It fixes the error in 'make
dtbs_check':

arch/arm64/boot/dts/qcom/sc7180-idp.dt.yaml: adc@3100: 'adc-chan@0x06' does not match any of the regexes: ...

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Fixes: a727ec1232 ("arm64: dts: qcom: pm6150: Add PM6150/PM6150L PMIC peripherals")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20191212113540.4.I5f67a5ed7665f658c95447a837cbd0021e1dc689@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2019-12-12 15:15:23 -08:00
Douglas Anderson
6e3697279e arm64: dts: qcom: sc7180: Add "#clock-cells" property to usb_1_ssphy 
Running "dtbs_check" yells:
  '#clock-cells' is a dependency of 'clock-output-names'

...and sure enough the bindings say we should have "#clock-cells".
Add it.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Fixes: 0b766e7fe5 ("arm64: dts: qcom: sc7180: Add USB related nodes")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20191212113540.3.Ia530e4065ca81f55ac8f89a400f6a0a084ff6712@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2019-12-12 15:15:17 -08:00
Douglas Anderson
ac00546a67 arm64: dts: qcom: sc7180: Rename gic-its node to msi-controller 
Running `make dtbs_check` yells:

  arch/arm64/boot/dts/qcom/sc7180-idp.dt.yaml: interrupt-controller@17a00000: gic-its@17a40000: False schema

From "arm,gic-v3.yaml" we can grok that this is explained by the
comment "msi-controller is preferred".  Switch to the preferred name
so that dtbs_check stops yelling.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Fixes: 90db71e480 ("arm64: dts: sc7180: Add minimal dts/dtsi files for SC7180 soc")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20191212113540.2.Ibad7d3b0bea02957e89047942c61cc6c0aa61715@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2019-12-12 15:15:08 -08:00
Douglas Anderson
d8c5133583 arm64: dts: qcom: sc7180: Add SoC name to compatible 
Running `make dtbs_check` yells because qcom.yaml says that we should
have:

- items:
    - enum:
        - qcom,sc7180-idp
    - const: qcom,sc7180

...but we're missing "qcom,sc7180".  Add it.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Fixes: 90db71e480 ("arm64: dts: sc7180: Add minimal dts/dtsi files for SC7180 soc")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20191212113540.1.I158061c65974bf0f653ceb79b442b76a1fd64868@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2019-12-12 15:14:59 -08:00
Sibi Sankar
017e7856ed arm64: dts: sm8150: Add rpmh power-domain node 
Add the DT node for the rpmhpd power controller.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/0101016e7f99eab9-35efa01f-8ed3-4a77-87e1-09c381173121-000000@us-west-2.amazonses.com
[bjorn: Use constant for opp6, until include lands]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2019-12-11 23:33:46 -08:00
Rajendra Nayak
9868a31c31 arm64: dts: sc7180: Add aliases for all i2c and spi devices 
Add aliases for all i2c and spi nodes

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Link: https://lore.kernel.org/r/0101016ef3cded0a-f85e1f98-f3be-4f6f-805f-82f8b6a83e14-000000@us-west-2.amazonses.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2019-12-11 22:51:16 -08:00
Rajendra Nayak
d8b076b891 arm64: dts: sc7180: Remove additional spi chip select muxes 
remove the additional CS muxes that were added by default for
spi so every board using sc7180 does not have to override it.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Link: https://lore.kernel.org/r/0101016ef3cdad4a-cbfbc482-1f74-4cb7-88fc-b4b6ed7e7543-000000@us-west-2.amazonses.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
 2019-12-11 22:51:04 -08:00