There is some hardware bug for VOP win CSC, so we ignore this function
and use the default CSC matrix.
Change-Id: I5a498bbba98563ccb5f37ebffa50b274e8422c73
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
rk3128 have ebc, but rk3126b/c have no ebc, so we need
manage compatibility for them.
Change-Id: I683f292b40603fe31a5eb4cee4e78a2d5d152626
Signed-off-by: Liang Chen <cl@rock-chips.com>
Both dwc2 and dwc_otg_310 driver are existed in the system since
commit c3c4fa0, and we use dwc_otg_310 driver for RK3368 android
platform, so only keep one compatible to fit for the driver.
Change-Id: Iee001ef057dcc63b723faf21fec94d5a4b592868
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
According to the design guide of dwc2, the application must flush
all FIFOs after reallocating the FIFO data RAM and the phy is
required to keep power on when flush FIFO. But on some rockchip
platforms, the usb phy will be powered off when the usb otg/gadget
disconnect, in this case if the application call the function
dwc2_hsotg_udc_start() to start udc, it will result in the error
as below:
dwc2_hsotg_init_fifo: timeout flushing fifos (GRSTCTL=80000430)
dwc2_core_reset() HANG! Soft Reset GRSTCTL=80000001
bound driver configfs-gadget
dwc2_core_reset() HANG! Soft Reset GRSTCTL=80000001
This patch make the dwc2 driver to manage the power of phy in
udc start and stop function both in otg and peripheral mode. Make
sure that the usb phy is powered on when udc start, and then the
usb phy driver can manage the phy power dynamically.
Change-Id: I15d3cb5313fc157b58a37c9e15f191d7cb966217
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
some boards do not define the power pin such as power18/power33
for tc358749x
Change-Id: I36914dc005e465c290f71df2483d1969f6d101ef
Signed-off-by: Xinhuang Li <buluess.li@rock-chips.com>
The Dynamic Range and Mastering InfoFrame carries data such as
the EOTF and the Static Metadata associated with the dynamic
range of the video stream.
This function is introduced in the 2.11a version.
Change-Id: I279cc0665e34d75209774013882ccc8946ce6da5
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
For some display device, max_tmds_clock is 0, we think
max_tmds_clock is 340MHz. If tmdsclock > max_tmds_clock,
depth should fall back to 8bit. And If display mode support
YCBCR420, output format is YCBCR420.
Because max tmds clk of RK3368 is 340MHz, hdmi output policy
is same as mentioned above.
It is need to check tmds clock rate at the last. So we move
depth checking into dw_hdmi_rockchip_select_output.
Change-Id: I27e029fc0171b175ddbfa453ed12854ab6a7432b
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
There are two different encodings used for nec32:
- The ir-nec-decoder.c decoder treats it as 32 bit msb first.
- The img-ir decoder/encoder, winbond wakeup, dib0700, ir-ctl userspace,
treat nec32 analogous to necx and nec: 4 bytes, each lsb first. So this
format reverses the 4 bytes.
There are arguments to be had for both formats, but we should not use
different formats in different parts of the kernel. Selecting the second
format introduces the least code churn. It does mean that the TiVo keymap
needs updating.
This change was submitted before as "18bc174 [media] media: rc: change
32bit NEC scancode format", which was reverted because it was unclear
what scancode rc drivers produce. There are now more examples of drivers
which produce nec32 in lsb format.
The TiVo keymap is verified against the Nero Liquid TiVo remote. The
keymap is not for the Tivo DVR remote, which uses rc-5.
Signed-off-by: Sean Young <sean@mess.org>
Cc: James Hogan <james.hogan@imgtec.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
(cherry picked from commit 6eae57e9d5)
Change-Id: Ib722e0116fe0b590e3fb96d8c7ff1e3a384a0b55
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
According to the documentation, a timeout of 0 turns off timeouts,
which is not the case.
Signed-off-by: Sean Young <sean@mess.org>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
(cherry picked from commit ee5310e66e)
Change-Id: If6edb518e2c14478d13b9e0bf99a0ef8cd03b579
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Many decoders require a trailing space (period without IR illumination)
to be delivered before completing a decode.
Since the gpio-ir-recv driver only delivers events on gpio transitions,
a single IR symbol (caused by a quick touch on an IR remote) will not
be properly decoded without the use of a timer to flush the tail end
state of the IR receiver.
This patch initializes and uses a timer and the timeout field of rcdev
to complete the stream and allow decode.
The timeout can be overridden through the use of the LIRC_SET_REC_TIMEOUT
ioctl.
Signed-off-by: Eric Nelson <eric@nelint.com>
Acked-by: Sean Young <sean@mess.org>
Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
(cherry picked from commit 3fb136f339)
Change-Id: Ice220af0199cf848bb907c9a419dd079efd94834
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
A default timeout value of 125 ms should work for all decoders.
Declare a constant to help standardize its' use.
Signed-off-by: Eric Nelson <eric@nelint.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
(cherry picked from commit c8e1bbc52d)
Change-Id: I672091f1902c3a91c9746dbfd8438896f7c9433d
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
As is the case for a number of other architectures that have a 32-bit
compat mode, enable KEYS_COMPAT if both COMPAT and KEYS are enabled.
This allows AArch32 programs to use the keyctl() system call when
running on an AArch64 kernel.
Signed-off-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
(cherry picked from commit 5c2a625937)
Change-Id: I100b99f6c2262da5b7c7ea660c47ffedfa6a1297
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Enable CONFIG_USB_DWC2 and CONFIG_PHY_ROCKCHIP_INNO_USB3 driver
for rockchip_defconfig.
Change-Id: Ic22cc450e5f139935dc54ffb798413edff7df3cb
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
set 3.4v interrupt signal assert when suspend, set 3.0v shutdown
signal assert when resume.
Change-Id: Id15b721bbdc9665a18cf9946b92c435a23f1666c
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
set 3.4v interrupt signal assert when suspend, set 3.0v shutdown
signal assert when resume.
Change-Id: Ie91d8ce6a79e5ea50b654ea52c3ed8acf047f8fb
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
When detect the usb peripheral disconnect from PC usb
host port or usb charger, we need to reinit the charge
state immediately, then it can do usb battery charge
detect work to get correct charge type if usb re-plug
in again in a short time.
Change-Id: I187f1d23a11b00f57e0a3699b6174cd7a59be3f1
Signed-off-by: William Wu <william.wu@rock-chips.com>
This patch adds NoC (Network on Chip) Probe driver which provides
the primitive values to get the performance data. For example, RK3399
has multiple NoC probes to monitor traffic statistics for analyzing
the transaction flow.
Change-Id: I66f6708f0d244488ca08f0f1f1cb36b19c7a2d0a
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
The handle_xfercomp_isoc_split_in() use two conditions
to check if the isoc in csplit transcation is done:
- the actual xfer length of the current frame is zero
- the total xfer length of the frames equals to the
request length of the frames
But in some case, we find that the two conditions are
not enough, e.g. on rockchip platforms, connect the usb
audio card with the FE1.1 HUB, the audio is setted to
44100 2ch 16 bits, the csplit transcation sequence is:
- CSPLIT IN transcation
- MDATA packet [176 bytes]
- CSPLIT IN transcation
- DATA0 packet [No data]
In this case, the total actual xfer length of frames is
less than the request length of frames, so the current
code will not update the status of frame and the qtd
isoc_frame_index, this cause usb audio data corrupted.
According to the USB 2.0 spec "Figure 11-85. Isochronous
IN Complete-split Transaction Sequence", we can use DATA0
to check if the transaction is last data. So use DATA0
instead of zero length transaction to check if the csplit
transcation is done.
Change-Id: I55cfa3f7b93ed6bfba3ecec5820d7b534c05ba34
Signed-off-by: William Wu <william.wu@rock-chips.com>
According to DWC2 Programming Guide, if a host channel is
used for non-split periodic transfer, we must not disable
the channel if we want to halt it, and at the end of the
next uframe/frame (in the worst case), the core generates
a channel halted and disables the channel automatically.
But some specil usb device, like usb audio (VID = 0x0572,
PID = 0x1494, Manufacturer: Conexant Systems INC), we
need to halt the channel immediately when do close usb
audio operation. Otherwise, the host may still start a
new transaction after usb audio close, and cause to set
usb interface failed when open usb audio next time.
This patch introduces a new quirk to force host channel
halt even if it's used for a non-split periodic transfer.
Change-Id: I2911ad8f68bb3738691ac683b0b64330d3428213
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
In the current urb enqueue process, it doesn't use
spinlock protect qtd init, this may cause urb dequeue
to access the qtd unexpectedly and cause kernel panic
with the following log:
Unable to handle kernel NULL pointer dereference at virtual address 00000024
pgd = c0004000
[00000024] *pgd=00000000
Internal error: Oops: 817 [#1] PREEMPT SMP ARM
Modules linked in: drmboot(PO)
CPU: 1 PID: 623 Comm: wakeWordAgent Tainted: P O 3.10.104 #64
task: cee05f80 ti: cefaa000 task.ti: cefaa000
PC is at dwc_otg_hcd_urb_dequeue+0x90/0x12c
LR is at urb_dequeue+0x70/0xb8
...
[<c0447af8>] (dwc_otg_hcd_urb_dequeue+0x90/0x12c) from [<c04497c4>] (urb_dequeue+0x70/0xb8)
[<c04497c4>] (urb_dequeue+0x70/0xb8) from [<c0417144>] (usb_hcd_unlink_urb+0x84/0xa4)
[<c0417144>] (usb_hcd_unlink_urb+0x84/0xa4) from [<c051dedc>] (deactivate_urbs+0xa4/0xc8)
[<c051dedc>] (deactivate_urbs+0xa4/0xc8) from [<c051eeb0>] (snd_usb_endpoint_stop+0x2c/0x3c)
[<c051eeb0>] (snd_usb_endpoint_stop+0x2c/0x3c) from [<c0525c78>] (stop_endpoints+0x48/0x64)
[<c0525c78>] (stop_endpoints+0x48/0x64) from [<c0525ce0>] (snd_usb_substream_capture_trigger+0x4c/0xa0)
[<c0525ce0>] (snd_usb_substream_capture_trigger+0x4c/0xa0) from [<c05128b8>] (snd_pcm_do_stop+0x4c/0x54)
[<c05128b8>] (snd_pcm_do_stop+0x4c/0x54) from [<c0512190>] (snd_pcm_action_single+0x38/0x64)
[<c0512190>] (snd_pcm_action_single+0x38/0x64) from [<c0512360>] (snd_pcm_drop+0x68/0xb8)
[<c0512360>] (snd_pcm_drop+0x68/0xb8) from [<c0512d7c>] (snd_pcm_release_substream.part.11+0xc/0x90)
[<c0512d7c>] (snd_pcm_release_substream.part.11+0xc/0x90) from [<c0512e48>] (snd_pcm_release+0x30/0x7c)
[<c0512e48>] (snd_pcm_release+0x30/0x7c) from [<c0108d1c>] (__fput+0xe8/0x1e4)
This patch uses spinlock to protect qtd init when do urb
enqueue to avoid race condition between queue and dequeue.
Change-Id: I88fac18530cd0a52a5d9b604880d162ff2793ca7
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
The dwc2 programming guide section 3.5 'Halting a Channel'
says that the application can disable any channel by
programming the HCCHARn register with the HCCHARn.ChDis
and HCCHARn.ChEna bits set to 1'b1. This enables the
dwc_otg host to flush the posted requests (if any) and
generates a Channel Halted interrupt.
But it also requires that channel disable must not be
programmed for non-split periodic channels. At the end
of the next uframe/frame (in the worst case), the core
generates a channel halted and disables the channel
automatically.
If we disable non-spilt periodic channels to halt the
channels, it will easily to cause data transfer fail.
A typical case is take photo with usb camera or close
usb camera, Specifically, the observed order is:
1. uvc driver calls usb_kill_urb
2. usb_kill_urb calls urb_dequeue to cancel urb
3. urb_dequeue call dwc_otg_hc_halt to disable
non-spilt periodic channels
4. usb core doesn't halt the non-spilt periodic
channels immediately, and the application
reallocates the channels for other transactions
without waiting for the HCINTn.ChHltd interrupt.
5. uvc driver calls usb_set_interface to start
control transfer, and gets a channel which used
for non-spilt periodic transfer before. The core
generates a channel halted and disables the channel
automatically. This cause control transfer fail.
Change-Id: I9f951bbd19d3568d9342973a1a25dba469505154
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
If the root hub is in suspend, we need to resume it when handle hcd
disconnect or force device mode, otherwise the hub driver can't detect
the status change when port disconnect or mode change.
This issue always happens if connect with an usb device which supports
auto-suspend.
Test=Plug in an usb device which supports auto-suspend(such as: hub, usb
camera, etc.). Wait a few seconds until usb enter auto suspend, then
plug out the device or set force device mode, check wheather the device
disconnect from the usb bus or not.
Change-Id: I0f96bba1b9516b264e75d2d829f46fddc193fca7
Signed-off-by: Feng Mingli <fml@rock-chips.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
When dequeue a transfer request, dwc_otg_310 pcd driver
will call dwc_otg_pcd_ep_stop_transfer() function, it
set the whole depctl register value to 0. But actually
it should only set nak and disable ep, and do not change
ep type or mps information and so on, because these information
should only be setted by ep_enable() or ep_disable() functions.
If clear the whole depctl register in dwc_otg_pcd_ep_stop_transfer,
it will cause the current transfer failed during dequeue.
TEST: set usb gadget work as mtp mode, copy data from the PC to
the device, cancel it, and copy again. If don't use this patch,
the mtp driver will block in mtp_read until we're online.
Change-Id: I5fb6c1645c24eb69b339488f8f613e19af1933d0
Signed-off-by: Feng Mingli <fml@rock-chips.com>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
From v3.00a dwc2 controller add a new interrupt 'StsPhseRcvd'
(Status Phase Received For Control Write) in DOEPINT. Refer
to dwc_otg_databook_v3.10, this interrupt is valid only for
control OUT endpoints, it indicates to the application that
the host has switched from data phase to the status phase
of a control write transfer. The application can use this
interrupt to ACK or STALL the Status phase.
We use v3.10a dwc2 on rockchip soc, but actually we don't
need to send Zero-Length Packet for the IN status phase
in StsPhseRcvd int handler in DMA mode. The handle_ep0->
ep0_complete_request will call do_setup_in_status_phase to
send EP0 IN ZLP.
TEST=set gadget work as usb rndis and connect to ubuntu.
Change-Id: I5203248a687ddbac097c74bb0f856385776df6d9
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
This patch add hdmi_output_colorimetry to support modify
hdmi output colorimetry. It could be following value:
- None
- IUT_2020
Default value is None, which means normal hdmi outout
colorimetry.
Change-Id: Ib4883fd0553d9d4193c7295812d2c1433724fe63
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
HDMI will set vop eotf and color space according to display mode.
Change-Id: I469d03dd1f14a2bcd75ed5c8e3227cd1d34eb354
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
1. remove "linux,cma-default", which used by cma default region
2. use size=< > to define region size
Change-Id: Ie801b3ecebf7c8b4118700f83c4284c42337b0c2
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Use kthread_run instead of kthread_create when create kconsole thread.
We should call wake_up_process after kthread_create, otherwise kconsole
will keep in TASK_UNINTERRUPTIBLE state when loglevel=0. Then kconsole
will become hung task, and will trigger hung task timeout.
Change-Id: I440f6bed4ace755d51d6a91600735aaa7ee5925d
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Use kthread_run instead of kthread_create when create kconsole thread.
We should call wake_up_process after kthread_create, otherwise kconsole
will keep in TASK_UNINTERRUPTIBLE state when loglevel=0. Then kconsole
will become hung task, and will trigger hung task timeout.
Change-Id: I6b9edfc60a96202b356d0fe519073ea4665ae32a
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Including:
not to call pm_runtime_suspend() in mali_runtime_idle();
make it more strict to power off the GPU.
Change-Id: I8c49dd13f57826f28606fd7a4e451707978b2906
Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
