set 1 if the regulator is enabled in system suspend, 0 if not.
Change-Id: I8d51ac685bbd2417f440842d010fe47946c9f567
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
42019da52a ("android: base-cfg: turn off /dev/mem and /dev/kmem")
Change-Id: I2d34d76b6ed85fbd590be2e0c445c19f253bc2c4
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
42019da52a ("android: base-cfg: turn off /dev/mem and /dev/kmem")
870f86b79c85 ("Unsetting DEVPORT from marlin configurations.")
Change-Id: I03610d55f3af2e9398b02e36d1d6c05a2eda9657
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Due to hardware issue, boost and otg switch must be conctrolled
with special timing carefully by rk816 battery driver. Otherwise
boost maybe burn off.
Change-Id: Id28208c5b9757e1ff0e57ec5d26f1ac0afb88ad5
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Due to different irq_reg_stride of register, add individual
irq chip for battery.
Change-Id: Ic37b136ebc543d4f7bd22d5748b59df73526ccbe
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Due to hardware design, "Vdelta = (R_sample + R_other) * I_avg"
will be included into TS1 adc value. We must subtract it to get
correct adc value.
Change-Id: I71eb0b53d1a9ef14efb2c4a798f4cf8c8b49e950
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Due to 32k clock jitter, tsadc will wrongly report a very
high temperature, that is a temperature-jump. This may lead
to an abnormal OS reboot. A filter function is added to
predict the true temperature.
Change-Id: I5b5641efe8e64b4058a604f274350b1e94584fa6
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
when power invert and power on:
->loader_protect[on]->disable regulator(ref count is 0)
-> panel_simple_prepare[on]->disable regulator(ref count is 0)
->loader_protect[off]->enable regulator(ref count is 1)
->suspend->enable regulator(ref count is 2)
->resume->disable regulator faild(ref count is 1)
Fixes: 7a91ba36d80 ("drm/panel: panel: add power-invert for some special hardwre")
Change-Id: I43f1cef2410316faec24238cd3f8d2bc1fe38335
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Previous atomic commit force wait for old commit finish, it
would make performance bad, if we have two outputs committing
at the same time, the two commit will block each other, make
things bad.
with this patch, difference output commits can be independent,
they can commit at the same time.
TEST: before this patch: HDMI + MIPI: 40-55fps
after this patch: HDMI + MIPI: 60fps
Change-Id: Ie6c80f908080a40986d0193af5aff52f1bead455
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
To facilitate easier reviewing this is split out from the overall
nonblocking commit rework. It just rolls out the helper functions
and uses them in the main drm_atomic_helper_commit() function
to make it clear where in the flow they're used.
The next patch will actually split drm_atomic_helper_commit() into
2 pieces, with the tail being run asynchronously from a worker.
v2: Improve kerneldocs (Maarten).
v3: Don't convert ERESTARTSYS to EINTR (Maarten). Also don't fail if
the wait succeed in stall_check - we need to convert that case (it
returns the remaining jiffies) to 0 for success.
v4: Switch to long for wait_for_completion_timeout return value
everywhere (Maarten).
v5: Fix miscaped function in kerneldoc (Maarten).
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Tested-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Tomeu Vizoso <tomeu.vizoso@gmail.com>
Cc: Daniel Stone <daniels@collabora.com>
Tested-by: Liviu Dudau <Liviu.Dudau@arm.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1465398936-22305-1-git-send-email-daniel.vetter@ffwll.ch
(cherry picked from commit a095caa7f5)
Change-Id: I116ef7f1196534159dd75d75e9bfa712ca869249
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
We found that some usb cameras(e.g. Manufacturer: HD Camera
Manufacturer, idVendor=05a3, idProduct=9230) can't support
auto-suspend well on rockchip platforms. With auto-suspend,
these usb cameras MJPEG will display abnormally on all usb
controllers(DWC2/DWC3/EHCI). So we need to disable auto
suspend for these special usb cameras.
Change-Id: Ibf50ed77edff0012a112dc42f09e022055908829
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
the maximam frequece supported of rk3229 is 125Mhz, so we change
the emmc mode from hs200 to ddr 52Mhz.
Change-Id: I9d6f2a4bc7651cea897f0ff63de571f5492f6c1e
Signed-off-by: Wenping Zhang <wenping.zhang@rock-chips.com>
So all the variant boards will benefit from it and no need
to copy and paste this everywhere.
Change-Id: Id27355bb6f780ead76b8661693c32a452d3f8e61
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
In order to save power and improve the performance, we can add the opp
table for rk3036 SoCs.
Also, make sure the codec works happily, we should ensure the arm/logic
voltage is greater than 1v.
Change-Id: I9aa17be547eb21e5a83c09780356436c3075bae6
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
As the rk3036 supported the cpu opp table, we need add the related
frequency rates.
Change-Id: If50ed0fc02d3c8d0971d99bf392210616f1748c0
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
The clock hevc core will be used to drive the hevc decoder.
Change-Id: Ic1298ce1edd07f86e5c243e3a2c9876481f4cba9
Signed-off-by: Randy Li <randy.li@rock-chips.com>
In order to support the ap6212 module with rockchip wlan driver,
the kylin dts has to change the below for working.
1) We should add the 'supports-sdio' property for mmc tuning,
that's the rockchip private property, not on the upstream.
2) We should add the wifi power control pin and wifi/bt data for dts,
Maybe the history issue, they like the old driver for power
contronlling, the upstream didn't need these for working. we should
remove it in the future.
Change-Id: Id49de7ad77b8658a551a07659a8a2ddc9691874c
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
As the inno-hdmi driver introduced this clock, add it for dts supporting.
Change-Id: I43328a25f0ac72d5a5b7631cc8ff6ce98b78669a
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
The aclk_vio is the vio noc, the HDMI accessed the register need this clock
enabled first.
Change-Id: Ib3073b73020e46c7d31b09225dd2bd39a289a4cc
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
FUSB302 default cc status is UFP. If we reset the UFP system,
the UFP PD status would be reset, but the DPF can't detecte
the disconnection since cc status did not changed. Reset UFP
would send hardreset to DPF due to wait power caps timeout.
And that would cause the power reset.
So, let's use softreset instead of hardreset in this case.
Change-Id: Ic896597569adb125bea3bf145c5c93712fa77539
Signed-off-by: zain wang <wzz@rock-chips.com>
If the gmac-m1 optimization(bit10) is selected, the gpio function
of gmac pins is not valid. We may use the rmii mode for gmac interface,
the pins such as rx_d2, rx_d3, which the rgmii mode used, but rmii not
used could be taken as gpio function. So gmac_rxd0m1 selects the bit2,
and gmac_rxd0m3 select bit10 is more correct.
Change-Id: I781bd29f2ce64ba0e8c1b139ac117fe124410d87
Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The offset of gpio0 and gpio1 bank drive strength is 0x8, not 0x4.
But the mux is 0x4, we couldn't use the IOMUX_WIDTH_4BIT flag, so
we give them actual offset.
Change-Id: I8371c6432330bd73422c2e5c7a0719f4636eabae
Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Fix DP drivers can't get the HPD signal changed when DP mode is on.
Change-Id: I0e8eefadb677e956cca4f62a4befa9ee47e7e013
Signed-off-by: zain wang <wzz@rock-chips.com>
