Commit Graph

592810 Commits

Author SHA1 Message Date
Chris Zhong
f0df56476f UPSTREAM: clk: rockchip: switch PLLs to slow mode before reboot for rk3288
We've been seeing some crashes at reboot test on rk3288-based systems,
which boards have not reset pin connected to NPOR, they reboot by
setting 0xfdb9 to RK3288_GLB_SRST_FST register. If the APLL works in
a high frequency mode, some IPs might hang during soft reset.
It appears that we can fix the problem by switching to slow mode before
reboot, just like what we did before suspend.

Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit 1d33929e2a)

Change-Id: Ic01f80e6f33ae84cc87e954aae35f26b6f1a5434
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
2016-03-15 17:20:14 +08:00
Frank Wang
eaef8b16af ARM64: dts: rockchip: rk3366: add usb2.0 phy node
Change-Id: Ib1bc0add32d99de9ed78e70c29526cef926c7cad
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
2016-03-15 17:00:11 +08:00
Frank Wang
bf011cb752 phy: rockchip-usb: support InnoSilicon usb2.0 phy
For InnoSilicon usb2.0 phy, there is no siddq bit for operating,
what is more, when we control usb phy to suspend, its Plls will
not be affected. So we can operate resume/suspend bits directly
when it is going to power on/off.

Change-Id: I6bfe6b1a90b1bdcb0b0d5b670d579a625b22c0ba
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
2016-03-15 16:59:43 +08:00
Frank Wang
a441e07982 Documentation: bindings: add compatible entry for Rockchip USB2.0 PHY
Compatible "rockchip,rk336x-usb-phy" support to RK3368 & RK3366.

Change-Id: I435ecd0a9f1c2a50836f7e3c44b6089ba49d728a
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
2016-03-15 16:59:17 +08:00
Xing Zheng
331fd8c032 UPSTREAM: clk: rockchip: add a COMPOSITE_FRACMUX_NOGATE type
Because there are some frac clock mux nodes don't have a gate node on
the RK3399.

Change-Id: I4791b90a08faab286743a5cba30738cfb046594c
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git.kernel.org mmind/linux-rockchip.git v4.7-clk/next
 commit ffd9d4d39ef7ff90364d3abd6c39919e6582b605)
2016-03-14 15:45:56 +08:00
Feng Xiao
e69848b3a5 clk: rockchip: add clock ids for mpll_src and 32k on RK3366
Set the newly added id for mpll_src and 32k, so that they can be called
in other parts.

Change-Id: Ief82231215a147b62abcfbb5565054470fc9ea37
Signed-off-by: Feng Xiao <xf@rock-chips.com>
2016-03-14 15:40:06 +08:00
Caesar Wang
a04db15f5a ARM64: dts: rockchip: enable the tsadc for rk3399 chrome
This patch enables the tsadc for rk3399 evb board.

The rk3399 evb board uses the gpio to reset the chip since it connects the
PMIC to work, and TSHUT is low active on evb board.

Change-Id: Ibd4fc2c752fe1f34cc231385ee314e4b9a32e970
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
2016-03-14 11:16:08 +08:00
Caesar Wang
ca96c1efd9 ARM64: dts: rockchip: add the thermal main info found on rk3399
This patch adds the thermal needed main information for rk3399 SoCS.

Basically has the following content:

1) TSADC controller:
    Add the needed attributes for rk3399 TSADC controller.
    Especially for the TSHUT, in some cases if we are unable to shut it down
    in orderly fashion (says: kernel is stuck holding a lock or similar), then
    hardware TSHUT will reset it.
    If the temperature is over 95C over a period of time the thermal shutdown
    of the tsadc is invoked with can either reset the entire chip via the CRU,
    or notify the PMIC via a GPIO. This should be set in the specific board.

2) Thermal zones:
    Add the needed device mode for thermal generic framework.
    Detail in Documentation/devicetree/bindings/thermal/thermal.txt.

Change-Id: I1361beeb85e6d4a134b4640c16440452aa950e16
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
2016-03-14 11:16:00 +08:00
Huang Jiachai
d4a6147e3d video: rockchip: lcdc: 3366: add support power domain control
Change-Id: Ibb9d15e6e2a84a1847f4cfbbc8e75bca54e1782b
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
2016-03-14 11:04:58 +08:00
Elaine Zhang
65fa879a39 dt/bindings: power: add RK3399 SoCs header for power-domain
According to a description from TRM, add all the power domains

Change-Id: Ibbf17fb1edc125358760db8acd99dd681913cd3c
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
2016-03-14 10:08:07 +08:00
Sugar Zhang
03d5440241 ARM64: dts: rk3399: add pinctrl for i2s spdif
Change-Id: I12ae87196180efadb6a8b16787b4815c42223970
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
2016-03-11 17:51:47 +08:00
Huang Jiachai
4638791f1e dtsi: screen-timing: lcd-tv080wum-mipi: update CABC lut
Get the gamma value from screen vendor and use the following
algorithm to get the cabc lut

	for(i=0;i<256;i++)
		cabc_lut[i] = pow((256.0/(i + 256)), gamma_val) * 65536 + 0.5;

Change-Id: I8500cc84869d2693ce6af4e116b2140b3d3a16fc
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
2016-03-11 14:11:41 +08:00
Huang Jiachai
0a49e8e7c0 video: rockchip: lcdc: 3366: update for CABC
Change-Id: I75fd4deb02f3f131a7258f5529a8cb68fb55dca6
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
2016-03-11 14:11:18 +08:00
Huibin Hong
2c1485536d UPSTREAM: spi/rockchip: Make sure spi clk is on in rockchip_spi_set_cs
Rockchip_spi_set_cs could be called by spi_setup, but
spi_setup may be called by device driver after runtime suspend.
Then the spi clock is closed, rockchip_spi_set_cs may access the
spi registers, which causes cpu block in some socs.

Change-Id: I58915aee30cfbd3098eb137e3d9046b59ad9476c
Fixes: 64e36824b3 ("spi/rockchip: add driver for Rockchip RK3xxx")
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from git.kernel.org broonie/spi.git for-next
 commit b920cc3191)
2016-03-11 12:12:46 +08:00
Xu Jianqun
d27a992f2e UPSTREAM: spi: rockchip: add bindings for rk3399 spi
Add devicetree bindings for Rockchip rk3399 spi which found on
Rockchip rk3399 SoCs.

Change-Id: Ib43ec4ce8970359f660311fce35017843f8998df
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from git.kernel.org broonie/spi.git for-next
 commit 9b7a562215)
2016-03-11 12:00:16 +08:00
Caesar Wang
10b4f36ddd UPSTREAM: arm64: dts: rockchip: Add the thermal data found on RK3368
This patchset add the thermal for RK3368 dts,
Since the two CPU clusters, with four CPU core for each cluster,
one cluster is optimized for high-performance(big cluster) and the othe
is optimized for low power(little cluster).

This patch adds the second order for thermal throttle, and the critical
temperature for thermal over-tempeature protection on Software.

Change-Id: I9491287695768530c557511097f79ad6188adf1b
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Acked-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit c68bb56efb)
2016-03-11 10:07:40 +08:00
Feng Xiao
3ff47d2363 ARM64: dts: rk3366: use operating-points-v2 for gpu dvfs
Change-Id: Ia68197273e278f25320a4afe64c35c070f1737cc
Signed-off-by: Feng Xiao <xf@rock-chips.com>
2016-03-10 21:19:19 +08:00
Huang Jiachai
6fa79f50a9 video: rockchip: lcdc: 3366: fix timing reg take effect time
rk3366 timing reg config change to frame effect,
so we need config done after update timing.

Change-Id: I7279fc03a066357cb8a0ed452e9182f92bf90f01
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
2016-03-10 19:39:08 +08:00
Huang Jiachai
3cd14ddb22 ARM64: dts: rockchip: rk3366-tb: add hdmi support
Change-Id: Id278ca8f4ecc2e835d65653d72ae83de74cd9f91
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
2016-03-10 18:31:47 +08:00
Huang Jiachai
4222a78712 video: rockchip: fb: update for extend vop fb info
like rk3366 vop0 is different from vop1, so fb[rk_fb->num_fb >> 1]
is not correct for extend vop fb info.

Change-Id: Ie7ed0614a5cb32fcb22707c88aa70be45cb243d7
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
2016-03-10 18:30:51 +08:00
Feng Xiao
b078772d30 arm64: configs: rockchip_defconfig add DEVFREQ Governors
Change-Id: Iea6985da7a0f080b9949715a55326a9ece8f0ed9
Signed-off-by: Feng Xiao <xf@rock-chips.com>
2016-03-10 16:53:01 +08:00
CMY
1dea5fb1c2 lowmemorykiller: calculator free pages exclude CMA's free
Change-Id: I51a08cd9c9ef8d37fd0a5f649c5d2843a8b7d9ff
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
2016-03-10 14:43:42 +08:00
Feng Xiao
b3a7f415a1 clk: rockchip: add clock ids for isp of RK3366 SoCs
Change-Id: Ia1c1ef34eebcaa8f29d537b291c45654252444b8
Signed-off-by: Feng Xiao <xf@rock-chips.com>
2016-03-10 14:40:58 +08:00
wzq
74b38d3bd0 ARM64: dts: rk3366-tb: Enable rga device
Change-Id: I935033613e52edce6a479651fe0bc3ed2db5fb9c
Signed-off-by: Zhiqin Wei <wzq@rock-chips.com>
2016-03-10 11:50:23 +08:00
Xu Jianqun
e396b3a38a ARM64: dts: rockchip: add dts file for rk3399 chromebook
Change-Id: I17589cef588958601448ff7e3615b84ef95dd506
Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>
2016-03-10 11:42:55 +08:00
Huang, Tao
9663333f31 arm64: configs: update rockchip_defconfig by savedefconfig
Change-Id: I057bdbe89ed484f15295a0184f94f8a5acac8483
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
2016-03-10 11:37:52 +08:00
Huang, Tao
c61cf05de3 video: rockchip: reorder config
Change-Id: Ie9e0f2e8a69c456f52003dd3f956ff0a44b981cd
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
2016-03-10 11:36:17 +08:00
Huang, Tao
f2b7d4dfd8 video: rockchip: iep: do not default enable
Change-Id: I48747ec133f05ec6b1fa6d70187c4c641fed7ccd
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
2016-03-10 11:19:07 +08:00
sayon.chen
0056b0505b ARM64: rockchip_defconfig: enable VCODEC
add CONFIG_RK_VCODEC=y

Change-Id: Ida687dceeb36488c8ddbbf02bd273dec2991993b
Signed-off-by: sayon.chen <sayon.chen@rock-chips.com>
2016-03-10 11:10:20 +08:00
sayon.chen
1a14c128f2 ARM64: dts: rk3366: add iep device
add iep device

Change-Id: Ie3c60a79aaddf308847f84b3acd55d529e22f352
Signed-off-by: sayon.chen <sayon.chen@rock-chips.com>
2016-03-10 11:09:38 +08:00
sayon.chen
b3b083153b ARM64: dts: rk3366: enable iep mmu
enable iep mmu

Change-Id: Ia70422fbdf60d5cea8deaa2695913ccf32b580a3
Signed-off-by: sayon.chen <sayon.chen@rock-chips.com>
2016-03-10 11:08:57 +08:00
sayon.chen
b7039db241 ARM64: dts: rk3366: add vpu device
add vpu_service and rkvdec device

Change-Id: I53dea4053fa61bd0cd4f6313d9ea7e87673f2ce4
Signed-off-by: sayon.chen <sayon.chen@rock-chips.com>
2016-03-10 11:08:12 +08:00
sayon.chen
a1c0066df1 ARM64: dts: rk3366: enable vpu mmu
enable vpu mmu

Change-Id: I07d0c0e251d726b76110ecab0f3276ba4e97ee33
Signed-off-by: sayon.chen <sayon.chen@rock-chips.com>
2016-03-10 10:59:08 +08:00
sayon.chen
0e6af837fe video: rockchip: vcodec: add vpu codec drivers
move vpu codec code to drivers/video/rockchip

Change-Id: Idf4100181200cf28a18990da7088bee495f10fcb
Signed-off-by: sayon.chen <sayon.chen@rock-chips.com>
2016-03-10 10:26:04 +08:00
Feng Xiao
ab7887703b ARM64: dts: rockchip: rk3366: modify the initial rate of wifi pll
There is a div2 behind wifi pll, so the initial rate should be 960MHz.

Change-Id: Ib90457a0b17907c3056adf58edd623ae462b06a3
Signed-off-by: Feng Xiao <xf@rock-chips.com>
2016-03-10 09:04:24 +08:00
xiaoyao
b01b93bf4e mmc: sdio: call mmc_power_cycle before re-init sdio devices
Change-Id: I4ae9bb385c9235eb184de0f3bf06719b056f4842
Signed-off-by: xiaoyao <xiaoyao@rock-chips.com>
2016-03-09 19:46:47 +08:00
xubilv
2faaab0815 video: screen-timeing: sdk mipi: The frame rate increased from 44 to 55
Change-Id: Id5fec461e1785b8cb713c7bb686deb2bb38973d9
Signed-off-by: xubilv <xbl@rock-chips.com>
2016-03-09 19:45:02 +08:00
Huang, Tao
7755a74444 Revert "ARM64: dts: rockchip: add emmc, sdio and sdmmc node for rk3399"
This reverts commit d3e94b6309.

ERROR (reg_format): "reg" property in /phy has invalid length (8 bytes) (#address-cells == 2, #size-cells == 2)

Change-Id: I92c498906248c08aade2e36967f896fdd1094abc
2016-03-09 19:11:57 +08:00
Feng Xiao
123d41d1dd clk: rockchip: add video noc clk to the list of rk3366 critical clocks
The clocks of VPU NOC and RKVEDC NOC interact with each other.
If one of VPU and RKVDEC is working, they all must be opened.

Change-Id: I966df107ae72fbbb99f1e660a79bfd07476e8539
Signed-off-by: Feng Xiao <xf@rock-chips.com>
2016-03-09 19:04:06 +08:00
sayon.chen
b685e88e61 ARM64: rockchip_defconfig: enable IEP
enable IPE

Change-Id: Id4f8f8a91106269b6d8e4f0e0dc7ec1d499c2ce2
Signed-off-by: sayon.chen <sayon.chen@rock-chips.com>
2016-03-09 18:42:20 +08:00
sayon.chen
23e9578703 video: rockchip: iep: iep code modify
fix iep code compile fail in kernel-4.4

Change-Id: Iba105baecff5fe474cd0d9c02dc9b7970e9c9990
Signed-off-by: sayon.chen <sayon.chen@rock-chips.com>
2016-03-09 18:41:34 +08:00
chenzhen
e7438c1518 MALI: add midgard src dir
Change-Id: I9938fe0377fc57e030c9e5109c216d6c62dbeef0
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
2016-03-09 16:51:03 +08:00
chenzhen
d82d3c4def arm64: configs: rockchip_defconfig enable configs for MALI midgard.
Change-Id: Idec65015b7dfd73926e713a74daf15f46ea409eb
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
2016-03-09 16:09:30 +08:00
chenzhen
770f0de976 arm64: dts: rk3366: add node of GPU.
Change-Id: Id545de4b7a2747e6b2c46cbedfdc160c3552c105
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
2016-03-09 15:50:45 +08:00
chenzhen
2b339dd153 MALI: rockchip: not to use sg_dma_len.
When CONFIG_NEED_SG_DMA_LENGTH is enabled,
sg_dma_len is defined as follow :
"#define sg_dma_len(sg)             ((sg)->dma_length)"
But, dma_length is not used by the framework indeed.

Change-Id: Ibfd3223b38b96701f839cdc91207a49f20789fec
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
2016-03-09 15:26:53 +08:00
Rocky Hao
9f751bed52 ARM64: dts: rockchip: add watchdog node for rk3366
Change-Id: I44f6fc21d9b55f2229fef0fd8fe0091367c2a8fa
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
2016-03-09 14:30:38 +08:00
Sugar Zhang
fb2723796e ASoC: rt5640: fix rt5640_i2c_probe fail sometimes
if the codec is not initialized completely, i2c transfer will be
failed, so we just return PROBE_DEFER to let codec have chance to
be probed later.

Change-Id: I68922ffa7ddf048ebe3f95be9349d38b7b059982
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
2016-03-09 14:27:37 +08:00
xiaoyao
91270fe3f5 ARM64: dts: rk3366-tb: Add wifi node and enable it
Change-Id: I7e76d78439828a21cdc2d936ee22eab7789a50e6
Signed-off-by: xiaoyao <xiaoyao@rock-chips.com>
2016-03-09 13:07:56 +08:00
xiaoyao
dbf5c5c4cd ARM64: dts: rk3366-tb: add sdio_pwrseq for sdio wifi
Change-Id: I0490827fa88a680cc449c367772bbc337ebe507e
Signed-off-by: xiaoyao <xiaoyao@rock-chips.com>
2016-03-09 13:06:14 +08:00
xiaoyao
f0d60cd9b0 arm64: configs: rockchip_defconfig enable wireless devices
Change-Id: Icc4126588bd69e6e7b09fe051a719d182ad9b087
Signed-off-by: xiaoyao <xiaoyao@rock-chips.com>
2016-03-09 12:14:32 +08:00