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Author SHA1 Message Date
Zefa Chen
f31433ff94 phy: rockchip: csi2-dphy: support rv1106 
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: I8381b75f2d404470510606e307524b097796a140
 2022-03-10 14:17:28 +08:00
Zhijun Xie
af9c3f34cd arm64: dts: rockchip: rk3588-linux: add TEE support for linux 
Change-Id: I4b1977454c8488872ae8c5881b4bf2947203d2b5
Signed-off-by: Zhijun Xie <xzj@rock-chips.com>
 2022-03-10 14:17:12 +08:00
Sugar Zhang
a0019992e1 fiq_debugger_arm: Replace %pF with %pS to print Symbols or Function 
%pS and %ps are now the preferred conversion specifiers to print function
names. The functionality is equivalent; remove the old, deprecated %pF
and %pf support.

[1] 9af7706492 ("lib/vsprintf: Remove support for %pF and %pf in favour of %pS and %ps")

Before:

debug> bt
pid: 0  comm: swapper/0
 r0 00000000  r1 00014590  r2 eef00418  r3 b01191c0
 r4 ffffe000  r5 b0e04f14  r6 b0e04f50  r7 00000001
 r8 b0e04ec8  r9 00000000 r10 b0d54af0 r11 00000000  mode SVC
 ip b0e05018  sp b0e01f58  lr b010777c  pc b0107780 cpsr 600d0013
  pc: b0107780 (ad65a2fd), lr b010777c (f187b55b), sp b0e01f58, fp 00000000
  pc: b0918f30 (0c9cfd0c), lr b0918f30 (0c9cfd0c), sp b0e01f60, fp 00000000
  pc: b01518b0 (71d36883), lr b01518b0 (71d36883), sp b0e01f68, fp 00000000
  pc: b0151c30 (cd1f0787), lr b0151c30 (cd1f0787), sp b0e01fa8, fp b0d36254
  pc: b0d00e40 (c723bc9c), lr b0d00e40 (c723bc9c), sp b0e01fb0, fp b0d36254

After this patch:

debug> bt
pid: 0  comm: swapper/0
 r0 00000000  r1 0000f7d4  r2 eef00418  r3 b01191c0
 r4 ffffe000  r5 b0e04f14  r6 b0e04f50  r7 00000001
 r8 b0e04ec8  r9 00000000 r10 b0d54af0 r11 00000000  mode SVC
 ip 3e1aa000  sp b0e01f58  lr b010777c  pc b0107780 cpsr 600d0013
  pc: b0107780 (arch_cpu_idle+0x38/0x3c), lr b010777c (arch_cpu_idle+0x34/0x3c), sp b0e01f58, fp 00000000
  pc: b0918f30 (default_idle_call+0x2c/0x3c), lr b0918f30 (default_idle_call+0x2c/0x3c), sp b0e01f60, fp 00000000
  pc: b01518b0 (do_idle+0x1f8/0x284), lr b01518b0 (do_idle+0x1f8/0x284), sp b0e01f68, fp 00000000
  pc: b0151c30 (cpu_startup_entry+0x18/0x20), lr b0151c30 (cpu_startup_entry+0x18/0x20), sp b0e01fa8, fp b0d36254
  pc: b0d00e40 (start_kernel+0x4f4/0x520), lr b0d00e40 (start_kernel+0x4f4/0x520), sp b0e01fb0, fp b0d36254

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I5e6e66cba5f094bad98a275b5fabd196997406e8
 2022-03-10 14:16:52 +08:00
Finley Xiao
3e0f904b83 PM / devfreq: rockchip-dfi: build depends on CPU config 
This optimizes the size of rockchip-otp.o, details as follows.

./scripts/bloat-o-meter rockchip-dfi-old.o rockchip-dfi.o
add/remove: 0/20 grow/shrink: 0/1 up/down: 0/-3564 (-3564)
Function                                     old     new   delta
rk3368_dfi_set_event                           8       -      -8
rk3288_dfi_set_event                           8       -      -8
rk3128_dfi_set_event                           8       -      -8
rk3368_dfi_ops                                20       -     -20
rk3288_dfi_ops                                20       -     -20
rk3128_dfi_ops                                20       -     -20
rk3368_dfi_disable                            36       -     -36
rk3288_dfi_disable                            36       -     -36
rk3128_dfi_disable                            36       -     -36
rk3368_dfi_enable                             40       -     -40
rk3288_dfi_enable                             40       -     -40
rk3128_dfi_enable                             40       -     -40
rk3368_dfi_init                               76       -     -76
rk3128_dfi_init                               76       -     -76
rk3328_dfi_init                              212       -    -212
rk3128_dfi_get_event                         212       -    -212
rk3288_dfi_init                              240       -    -240
rockchip_dfi_init                            256       -    -256
rk3368_dfi_get_event                         260       -    -260
rk3288_dfi_get_event                         352       -    -352
rockchip_dfi_id_match                       1960     392   -1568
Total: Before=5144, After=1580, chg -69.28%

Change-Id: Ibb2b001fb9afdcb6fec5db9d075c71b3abb6fbf3
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
 2022-03-10 11:42:20 +08:00
Finley Xiao
9867d6e0e6 nvmem: rockchip-otp: build depends on CPU config 
This optimizes the size of rockchip-otp.o, details as follows.

./scripts/bloat-o-meter rockchip-otp-old.o rockchip-otp.o
add/remove: 0/9 grow/shrink: 0/1 up/down: 0/-2224 (-2224)
Function                                     old     new   delta
px30_otp_clocks                               12       -     -12
rk3568_otp_clocks                             16       -     -16
rk3568_data                                   24       -     -24
px30_data                                     24       -     -24
rockchip_otp_reset                           128       -    -128
px30_otp_ecc_enable                          164       -    -164
px30_otp_wait_status                         176       -    -176
px30_otp_read                                416       -    -416
rockchip_otp_match                           980     392    -588
rk3568_otp_read                              676       -    -676
Total: Before=4721, After=2497, chg -47.11%

Change-Id: I960a51e826a17112d822daa2b77470e482e729d7
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
 2022-03-10 11:39:22 +08:00
Finley Xiao
11829be4d3 cpufreq: rockchip: Fix compile error when disable rockchip cpufreq 
Fixes: 85556b1e7f ("cpufreq: rockchip: Implement rockchip_cpufreq_opp_set_rate()")
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I4d142a4a2319c87657e742616d8b27f1691df3a8
 2022-03-10 10:43:11 +08:00
Sugar Zhang
52ea05a769 ARM: dts: rockchip: rv1106: Fix typo 
Fixes: b61d06ed70 ("ARM: dts: rockchip: Add RGA2 node for RV1106")
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: Icff13e47935bad9a1e8422d71d9e89f58668849e
 2022-03-10 10:40:26 +08:00
Shawn Lin
cf6bed3a03 PCI: rockchip: dw: Simplify clock handling 
Use new API to manage them.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: Id8536ddda7fe14ede9d6df2435c34243913e39a1
 2022-03-09 17:57:54 +08:00
Shawn Lin
c7215f118f PCI: rockchip: dw: Add inband msi support 
Rockchip platforms supported outband msi routine via GIC ITS.
If msi irq is set, that means we start to support inband msi on
some specific platforms.

For inband msi support, we need SoC to provide msi specified interrupt
and MSI message can be interpreted by PCIe controller to manage MSI
routine.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Change-Id: I5ea019dd2889cd9cfc630d8a618ebd739c984f7d
 2022-03-09 17:55:29 +08:00
Simon Xue
a67c19583f dma-buf: heaps: rk-dma-heap: refactor dma_buf_vmap 
I don't know why rk_vmap_contig_pfn is not work on ARM32 platform.
May need more debug on this issue. Refactor dma_buf_vmap to use vmap
directly just let things go on.

Change-Id: I9aded08ddb75a6fb8745111a897ab5566d82a71d
Signed-off-by: Simon Xue <xxm@rock-chips.com>
 2022-03-09 17:27:53 +08:00
Algea Cao
1035e72482 drm/rockchip: vop2: Keep dclk:v_pixclk = 1:2 for HDMI split mode 
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: Ib55cee1b45ea8f92ad72fb34844d10b6a25214b8
 2022-03-09 16:45:03 +08:00
Algea Cao
5efa70a0f1 drm/rockchip: dw_hdmi: Support hdmi split mode 
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I71c5785ecfb9480f9569d3c55dd634579a5176fb
 2022-03-09 16:45:03 +08:00
XiaoDong Huang
02a8204f6b arm64: dts: rockchip: rk3588-rk806: close vdd_log in suspend 
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
Change-Id: Id483d4ac5d448f25247bccac8fc9308284eda6d7
 2022-03-09 16:34:16 +08:00
XiaoDong Huang
3c26e3d113 arm64: dts: rockchip: rk3588s: modify rockchip_suspend node 
1. Enable ARMOFF_LOGOFF suspend mode.
2. Disable pmu debug function.

Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
Change-Id: I77e758b34136d1603af999990b3e968fc8d482f1
 2022-03-09 16:31:15 +08:00
Max Kellermann
837450ac42 UPSTREAM: lib/iov_iter: initialize "flags" in new pipe_buffer 
commit 9d2231c5d7 upstream.

The functions copy_page_to_iter_pipe() and push_pipe() can both
allocate a new pipe_buffer, but the "flags" member initializer is
missing.

Fixes: 241699cd72 ("new iov_iter flavour: pipe-backed")
To: Alexander Viro <viro@zeniv.linux.org.uk>
To: linux-fsdevel@vger.kernel.org
To: linux-kernel@vger.kernel.org
Cc: stable@vger.kernel.org
Signed-off-by: Max Kellermann <max.kellermann@ionos.com>
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit b19ec7afa9)
Bug: 220741611
Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
Change-Id: I91076a0b6327ee8dd87e75fc875062b6adf2de4c
 2022-03-09 16:28:11 +08:00
Herman Chen
a1cfa3f557 video: rockchip: mpp: rkvenc2: Add split output 
Add rkvenc2 slice split mode with slice irq enabled path.
1. Add split task detection for rkvenc2.
2. Add slice irq handling and read slice length fifo in irq.
3. Add poll request with parameter to return slice length in fifo.

Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: I170c1be38deeb28d55057f9e19d50efe790a0989
 2022-03-09 16:13:09 +08:00
Herman Chen
b158513048 video: rockchip: mpp: Add partition timing function 
On encoder slice output mode the timing of each slice can be recorded.

Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Change-Id: Iceac5b8488dbfa85068e1460709f278cc2d3ebe4
 2022-03-09 16:08:28 +08:00
XiaoDong Huang
21b6c3c6b4 arm64: dts: rockchip: rk3588-nvr-demo: keep vdd_log on in suspend 
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
Change-Id: Id554241aa8242a04ffd26d397fcd9c0bb10b068d
 2022-03-09 14:36:51 +08:00
Li Huang
e15a0fb6bd ARM: dts: rockchip: rv1106-evb-v10 enable rve node 
Signed-off-by: Li Huang <putin.li@rock-chips.com>
Change-Id: I3d397cdf27d459deba32c6327233dcfe58d51cdf
 2022-03-09 14:34:18 +08:00
Sandy Huang
6cbe6c4e1d drm/rockchip: logo: add mutex lock protect for drm mm node 
[02-10 13:20:47][ 6.774909][ T399] ------------[ cut here ]------------
[02-10 13:20:47][ 6.775778][ T399] kernel BUG at lib/list_debug.c:56!
[02-10 13:20:47][ 6.776233][ T399] Internal error: Oops - BUG: 0 [#1] PREEMPT SMP
[02-10 13:20:47][ 6.776776][ T399] Modules linked in: bcmdhd r8168
[02-10 13:20:47][ 6.777203][ T399] CPU: 4 PID: 399 Comm: HwBinder:379_2 Not tainted 5.10.66 #1083
[02-10 13:20:47][ 6.777865][ T399] Hardware name: Rockchip RK3588 EVB1 LP4 V10 Board (DT)
[02-10 13:20:47][ 6.778463][ T399] pstate: 60400009 (nZCv daif +PAN UAO -TCO BTYPE=-)
[02-10 13:20:47][ 6.779051][ T399] pc : __list_del_entry_valid+0xa8/0xac
[02-10 13:20:47][ 6.779528][ T399] lr : __list_del_entry_valid+0xa8/0xac
...
[02-10 13:20:47][ 6.788175][ T399] Call trace:
[02-10 13:20:47][ 6.788448][ T399] __list_del_entry_valid+0xa8/0xac
[02-10 13:20:47][ 6.788894][ T399] rm_hole+0x24/0x2bc
[02-10 13:20:47][ 6.789231][ T399] drm_mm_insert_node_in_range+0x614/0x64c
[02-10 13:20:47][ 6.789731][ T399] rockchip_gem_iommu_map+0x5c/0x164
[02-10 13:20:47][ 6.790186][ T399] rockchip_gem_prime_import_sg_table+0x9c/0x1c8
[02-10 13:20:47][ 6.790729][ T399] rockchip_drm_gem_prime_import_dev+0xc4/0x17c
[02-10 13:20:47][ 6.791260][ T399] rockchip_drm_gem_prime_import+0x18/0x28
[02-10 13:20:47][ 6.791758][ T399] drm_gem_prime_fd_to_handle+0x9c/0x1f4
[02-10 13:20:47][ 6.792235][ T399] drm_prime_fd_to_handle_ioctl+0x30/0x48
[02-10 13:20:47][ 6.792723][ T399] drm_ioctl+0x24c/0x3b8
[02-10 13:20:47][ 6.793084][ T399] __arm64_sys_ioctl+0x94/0xd0
[02-10 13:20:47][ 6.793487][ T399] el0_svc_common+0xb8/0x1a4
[02-10 13:20:47][ 6.793878][ T399] do_el0_svc+0x28/0x88
[02-10 13:20:47][ 6.794228][ T399] el0_svc+0x14/0x24
[02-10 13:20:47][ 6.794554][ T399] el0_sync_handler+0x88/0xec
[02-10 13:20:47][ 6.794955][ T399] el0_sync+0x1a8/0x1c0

Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Ifd0ec4628d3afb4a2337998737c6e0ba7b6c52ca
 2022-03-09 14:25:43 +08:00
Li Huang
8ba4c48772 video: rockchip: rga3: fixup scale error 
even multiples of 128 (act w/h) require a scaling factor -1

Signed-off-by: Li Huang <putin.li@rock-chips.com>
Change-Id: I8dc3faeb3863fbf4f285ca8423ac8633fdc36de4
 2022-03-09 14:13:22 +08:00
Li Huang
acacd9e2f9 ARM: dts: rockchip: rv1106 add rve node 
Signed-off-by: Li Huang <putin.li@rock-chips.com>
Change-Id: I921a194aeeaa672ca1a6c7abcdd148773462b412
 2022-03-08 16:20:49 +08:00
Li Huang
ccef10af4a video: rockchip: rve: init ver 1.0.0 
Signed-off-by: Li Huang <putin.li@rock-chips.com>
Change-Id: I21d912272a7a0789c86fee033fa74cb01980f477
 2022-03-08 16:20:40 +08:00
Algea Cao
fb88ec443d drm/bridge: dw-hdmi-qp-cec: Write cec reg after cec data path enabled 
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I45f00a9ad2875283e707fd36755659a75c76e744
 2022-03-08 16:13:18 +08:00
Finley Xiao
392333d356 arm64: dts: rockchip: rk3588s: Add low temp config for opp table 
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I2521cf3d713bdd6a3a64b2d918c9098877dcc58f
 2022-03-08 16:07:44 +08:00
Finley Xiao
eb910e20ee soc: rockchip_system_monitor: Add support to change mem volt when low temp 
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I7ce9959bb56617c2fc1111d047af5ec7e88ce60e
 2022-03-08 16:07:27 +08:00
Finley Xiao
ebe79f43ab ARM: dts: rockchip: Add cpuinfo node for rv1106 
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I52f2db5452f1880dcb9b027c1ada211b750d8c05
 2022-03-08 16:00:54 +08:00
Finley Xiao
16bfe2ef56 ARM: dts: rockchip: Add otp node for rv1106 
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: Ie67e55359794c9f22209904fb47f23094d165581
 2022-03-08 16:00:54 +08:00
Finley Xiao
ff4269a817 nvmem: rockchip-otp: Add support for rv1106-otp 
This adds the necessary data for handling otp on the rv1106.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I7a608546148faaeaa5a31506e90825f5295c5b97
 2022-03-08 16:00:54 +08:00
Zefa Chen
d466135aef media: rockchip: vicap: fix hdr mode timestamp bug 
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: Ie355235dd0568b3c790c7bfca558da870edb922e
 2022-03-08 14:34:28 +08:00
Finley Xiao
2b2bf23ccd opp: Ignore unavailable opp when show opp summary 
Fixes: 37d5c1a6fd ("opp: Add a summary tree in debugfs")
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I70c97957b48abe2417857f8aff5d4175d418b1e6
 2022-03-08 11:43:55 +08:00
Finley Xiao
3c58fbc9c9 soc: rockchip: opp_select: Ignore unavailable opp 
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I5db20c0cf95499a942768050713287dad73a22dc
 2022-03-08 10:01:43 +08:00
Finley Xiao
a1f8ddc7bf soc: rockchip_system_monitor: Ignore unavailable opp 
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I830feb91f6f6249f1b666c5a46bbeee9b395aaa3
 2022-03-08 09:49:25 +08:00
Sandy Huang
27cc6a0147 drm/rockchip: drv: add direct show test case 
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Ie06ec68dce8f7f5f406c57e0a6a97df36b8fad53
 2022-03-07 19:11:25 +08:00
Sandy Huang
00d110d345 drm/rockchip: drv: add support rockchip drm direct show 
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Ibb7628ba06e41a96c7f63ed24dc5ff911b466b43
 2022-03-07 16:15:28 +08:00
Sandy Huang
f0ff9378bb drm/rockchip: drv: rockchip_fb_alloc maybe used by direct show 
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Ic888e72e300a55c041152ad94752b35d3648eb2c
 2022-03-07 16:15:27 +08:00
Ziyuan Xu
b70a9052fa ARM: configs: rv1106: place SPI to evb.config 
Most of the products are not using SPI devices, remove it from
rv1106_defconfig for minimum configuration.

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Change-Id: I6cf8c1f0431096d519a48facfb4e154ee75c2365
 2022-03-07 15:14:43 +08:00
Wu Liangqing
bd7d5a7115 rtc: hym8563: align the alarm time settings 
Signed-off-by: Wu Liangqing <wlq@rock-chips.com>
Change-Id: I59bacd5ef31f67af52313106382ca33734046c72
 2022-03-07 15:11:48 +08:00
Lei Chen
23fa752f6a drm/rockchip: dsi2: support dynamic binding to different vp port 
To solve the problem that the flag bits of other interfaces are
overwritten after mipi is enabled in the co-display case

Signed-off-by: Lei Chen <lei.chen@rock-chips.com>
Change-Id: I9eeea20165cb43da38879456eb10f6253e60bccb
 2022-03-07 10:28:36 +08:00
Sandy Huang
3ed5fc75ab drm/rockchip: vop: fix afbc in_formats blob decoded error for rk3399 
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: Iedfe810c2ae4e794cca72dda64576337cfea4ff2
 2022-03-07 10:16:07 +08:00
Zefa Chen
93ffc33081 media: rockchip: vicap: rk3588 fix HDR capture bug in line_info or id_code mode 
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: I5cd12597e5bdebebbe7cd502f7aa7cad6d4887d2
 2022-03-07 10:06:32 +08:00
Sugar Zhang
77d904ce5f ASoC: rockchip: spdif: Ignore 0hz clk rate 
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I491eef9b7729c1a5b0f9d59d5c868e9256a32c19
 2022-03-07 10:02:14 +08:00
Guochun Huang
937265ceff phy: rockchip: mipi-dcphy: accurately set mipi channel rate to Kbps/Ksps level 
take 1280x720@60Hz which pclk is 74.25Mhz as an example, the dsi
lane rate should set 445500 Kbps/lane(pclk x bpp = lane_rate x lanes)
when mipi work in no video burst pulse/event, therefore the PLL should
output the rate of Kbps/ksps level for normal display.

Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Change-Id: I63bf5717e2da521b7af18d88c906b86e30a71488
 2022-03-07 09:58:05 +08:00
Algea Cao
93010da346 drm/bridge: dw-hdmi-qp: Add cec driver 
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I4dbd69cdebaee8d1ff5231c72d4e1a9c30f9fd36
 2022-03-04 19:43:59 +08:00
Liang Chen
242ce2942c arm64: configs: rockchip_linux_defconfig: enable CONFIG_UCLAMP_TASK 
Also change UCLAMP_BUCKETS_COUNT to 20 copy form ANDROID-GKI.
Using the default setting 5 means the first bucket contains the
uclamp values from 0 to 19 (in percentage), in this case, if the
uclamp.min setting of a group is under 20, it will fall into this
bucket with other groups that have uclamp.min set to 0, which
increase the possibility of over boost. By setting the bucket
count to 20 will ease this situation, while a uclamp.min greater
than 4 will fall into a different bucket.

Signed-off-by: Liang Chen <cl@rock-chips.com>
Change-Id: I982a81acc303374aaf8defc004d08dd635402771
 2022-03-04 18:31:00 +08:00
Liang Chen
a6550cf0bd arm64: configs: rockchip_defconfig: enable CONFIG_UCLAMP_TASK 
Also change UCLAMP_BUCKETS_COUNT to 20 copy form ANDROID-GKI.
Using the default setting 5 means the first bucket contains the
uclamp values from 0 to 19 (in percentage), in this case, if the
uclamp.min setting of a group is under 20, it will fall into this
bucket with other groups that have uclamp.min set to 0, which
increase the possibility of over boost. By setting the bucket
count to 20 will ease this situation, while a uclamp.min greater
than 4 will fall into a different bucket.

Change-Id: Ibc6e1cb4358cfd6f9cda784b43d754545b893d7d
Signed-off-by: Liang Chen <cl@rock-chips.com>
 2022-03-04 18:31:00 +08:00
Cai YiWei
f98d9b61a7 media: rockchip: isp: fix reg config for multi device 
Change-Id: Ida20597e43fd6afeb9cb6a6c2e9a3595074b0d80
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
 2022-03-04 18:30:27 +08:00
Guochun Huang
7b63068bf0 drm/rockchip: dsi2: accurately set mipi channel rate to Kbps/Ksps level 
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Change-Id: I50e206a8e60c1fa8e1668d2d9fb71e0b161599c9
 2022-03-04 18:29:35 +08:00
Zhang Yubing
a1da8104ca drm/rockchip: vop2: change pixelclk calculation method for mipi 
Both DP and MIPI get pixelclk from dclk_out as follow:
DP: dclkx_out(DIV)->dpn_pixelclk(MUX)
MIPI:dclkx_out(DIV)->mipi_clk_src(MUX)->mipi_pixelclk(DIV)

When a video port coonect DP, it will calculate dclk rate first,
then dclk out rate, finally dp pixelclk rate. When a video Port
connect to MIPI it will calculate mipi_pixelclk rate first.

The different calculation method may get different dclk rate or
divider ratio. When a video port connect to a DP and MIPI, DP
or MIPI may get the wrong pixel rate. So they need use the same
method to calculate pixelclk.

When A video port connect DP and MIPI, the mipi_pixelclk
is set first, and set the mipi_pixelclk divide value. Then
dp_pixelclk is set, which will modify dclk_out divide value
and cause the mipi_pixelclk change.

So when calculate the mipi_pixelclk, we calculate the dclk_out
first to avoid the mipi_pixelclk be modified when DP set
dp_pixelclk.

For uboot logo display, Depend on commit from u-boot(branch:
next-dev):
(I6037e12d8b6 drm/rockchip: vop2: change dclk calculate method
for mipi)

Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: I53c3247ce1eb728dad7f480d86b65d3f922ab6d4
 2022-03-04 18:04:08 +08:00
Finley Xiao
b8e104fa2d arm64: dts: rockchip: rk3588s: Modify rockchip,pvtm-voltage-sel 
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I5b5b75ccba9e90f246db9305758eebe517a278df
 2022-03-04 17:55:50 +08:00