rk3399 box rev1 and rev2 use gpio control for enable/disable vdd_cpu_b
rev1 use GPIO1_C1(default pull-down), rev2 use GPIO_C2(default pull-up)
Change-Id: I9ddbcff688905386d2d52f680cbb5f93d6c8d526
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
otherwise it won't defined since we don't include it in kconfig
Change-Id: I6886068f89d53f3ecf47846ed7435131fdd7960f
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
The version of Midgard DDK used in RK Linux device is different from the one
used in Android platforms.
It might be convenient to have a separate src directory for it.
The new directory drivers/gpu/arm/midgard_for_linux is copied from
drivers/gpu/arm/midgard of commit 206f372ede.
It's on DDK r9p0-05rel0
There are also a few modifications in some 'Kbuild' files.
A new config MALI_MIDGARD_FOR_LINUX is introduced to specify which directory
of Midgard to use.
If defined, kbuild will compile src files under
drivers/gpu/arm/midgard_for_rk_linux_device,
otherwise, drivers/gpu/arm/midgard.
There is already a source directory of Midgard driver,
the 'Kconfig' file of the new directory is not be involved
in kconfig process.
Otherwise, there are problems caused by configs
with the same names in the two directories.
So, "midgard_for_rk_linux_device" could not be configured via menuconfig.
In the new directory, all the default configs are defined in default_config.mk.
'Kbuild' files include it.
Change-Id: I54f61cc50f7a168a742db7a11c6b6eebe21528f8
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
The host will trigger the hid interrupt to after reset hid, then send
wakeup key to light up screen,so any wakeupirq source will light up
screen due to reset hid in resume, and hid hwreset is not necessary.
Change-Id: I920239eeb4b57b0f594cc67cb8f4c1649c5125bd
Signed-off-by: Zhou weixin <zwx@rock-chips.com>
When USB is disabled, we get a link error for this driver
because of the added OTG support
drivers/phy/phy-rockchip-inno-usb2.o: In function `rockchip_usb2phy_otg_sm_work':
phy-rockchip-inno-usb2.c:(.text.rockchip_usb2phy_otg_sm_work+0x1f4): undefined reference to `usb_otg_state_string'
drivers/phy/phy-rockchip-inno-usb2.o: In function `rockchip_usb2phy_probe':
phy-rockchip-inno-usb2.c:(.text.rockchip_usb2phy_probe+0x2c8): undefined reference to `of_usb_get_dr_mode_by_phy'
Other phy drivers select USB_COMMON for this, so let's do the same
here.
Change-Id: I088b5862157d35360a30f21c8ed56a2a85792d53
Fixes: 0c42fe48fd23 ("phy: rockchip-inno-usb2: support otg-port for rk3399")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: William Wu <wulf@rock-chips.com>
On kernel builds without COMMON_CLK, the newly added rockchip-inno-usb2
driver fails to build:
drivers/phy/phy-rockchip-inno-usb2.c:124:16: error: field 'clk480m_hw'
has incomplete type
struct clk_hw clk480m_hw;
In file included from include/linux/clk.h:16:0
from drivers/phy/phy-rockchip-inno-usb2.c:17:
include/linux/kernel.h:831:48: error: initialization from incompatible
pointer type [-Werror=incompatible-pointer-types]
const typeof( ((type *)0)->member ) *__mptr = (ptr); \
... ...
Change-Id: I951d89ee34625dea5dfc6eeca841f9a5c44bc951
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: William Wu <wulf@rock-chips.com>
We found that the system crashed due to 480MHz output clock of
USB2 PHY was unstable after clock had been enabled by gpu module.
Theoretically, 1 millisecond is a critical value for 480MHz
output clock stable time, so we try to change the delay time
to 1.2 millisecond to avoid this issue.
And the commit ed907fb1d7c3 ("phy: rockchip-inno-usb2: correct
clk_ops callback") used prepare callbacks instead of enable
callbacks to support gate a clk if the operation may sleep. So
we can switch from delay to sleep functions.
Also fix a spelling error from "waitting" to "waiting".
Change-Id: Ie9883e5e9a3f0c2edec9d259b844ca536348c9cf
Signed-off-by: William Wu <wulf@rock-chips.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Since we needs to delay ~1ms to wait for 480MHz output clock
of USB2 PHY to become stable after turn on it, the delay time
is pretty long for something that's supposed to be "atomic"
like a clk_enable(). Consider that clk_enable() will disable
interrupt and that a 1ms interrupt latency is not sensible.
The 480MHz output clock should be handled in prepare callbacks
which support gate a clk if the operation may sleep.
Change-Id: I943e17f8a97d1229fefd8c1ada706e0c450c98eb
Signed-off-by: William Wu <wulf@rock-chips.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
this patch add support for i2s bclk fs configuration, we can
configure bclk_fs by devicetree as required.
Change-Id: I7e034e0466793b5b9eab6566a43e90213f219bb0
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
some device will triggered hpd after dp is connected, so we don't do
traning if dp lanes is not changed.
Change-Id: I3e329e7d2db33138f283ad6584b966ebd0619f65
Signed-off-by: wenping.zhang <wenping.zhang@rock-chips.com>
This patch create host_testmode file in debugfs for
USB HOST. It's useful for us to use a scope to verify
signal integrity for USB2/USB3 HOST.
For example， set testmodes for RK3399 board USB:
1. set Test packet for Type-C0 USB2 HOST:
echo test_packet > /sys/kernel/debug/usb@fe800000/host_testmode
2. set compliance mode for Type-C0 USB3 HOST normal orientation:
echo test_u3 > /sys/kernel/debug/usb@fe800000/host_testmode
3. set compliance mode for Type-C0 USB3 HOST flip orientation:
echo test_flip_u3 > /sys/kernel/debug/usb@fe800000/host_testmode
4. check the testmode status:
cat /sys/kernel/debug/usb@fe800000/host_testmode
The log maybe like this:
U2: test_packet /* means that U2 in test mode */
U3: compliance mode /* means that U3 in test mode */
Change-Id: Ic7e464b0443c792848846246b782ffba30bf2120
Signed-off-by: William Wu <wulf@rock-chips.com>
The returned value of topology_physical_package_id is socket id
on ARM32 system(for example, RK3288), it's not like the cluster id
on ARM64 system(for example, RK3366), so use a new way.
Change-Id: I5b2cdfdcdaa56c71df394caa2588f6e83931a293
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
The sequence got a bit wrong as we are sending CPUFREQ_START
notifications even before we have sent CPUFREQ_CREATE_POLICY.
Fix it.
Change-Id: I7d1fba317314bb5e5601b1354494398def156424
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
(cherry picked from commit 388612baba)
shift the time of vbus enable before attach debounce started,
and merge the code of get_cc from chrome ec driver, which used
to fix connection disconnected issue.
Change-Id: I2fd1f83d0265b3770d75a59d622d0f650d737c5b
Signed-off-by: wenping.zhang <wenping.zhang@rock-chips.com>
It would be better to name OPP nodes as opp@<opp-hz> as that will ensure
that multiple DT nodes don't contain the same frequency. Of course we
expect the writer to name the node with its opp-hz frequency and not any
other frequency.
And that will let the compile error out if multiple nodes are using the
same opp-hz frequency.
Change-Id: I8c77646329e39390fb135d4d75d34893a8168876
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Do dptx/apb/core reset on every dp clock enabling, otherwise dp
will fail to load the firmware sometimes.
Change-Id: Ied0caad99d865ec86162dead2b4769a53f8db12a
Signed-off-by: wenping.zhang <wenping.zhang@rock-chips.com>
