Ard Biesheuvel 32b135a7fa arm64: head: avoid cache invalidation when entering with the MMU on
If we enter with the MMU on, there is no need for explicit cache
invalidation for stores to memory, as they will be coherent with the
caches.

Let's take advantage of this, and create the ID map with the MMU still
enabled if that is how we entered, and avoid any cache invalidation
calls in that case.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Link: https://lore.kernel.org/r/20230111102236.1430401-5-ardb@kernel.org
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2023-01-24 11:51:07 +00:00
2022-12-04 01:59:16 +01:00
2022-12-30 17:22:14 +09:00
2022-09-28 09:02:20 +02:00
2023-01-08 11:49:43 -06:00

Linux kernel
============

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Please read the Documentation/process/changes.rst file, as it contains the
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