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Add the PCIe reference clock feeding the USB3 + PCIE combo PHY. This PLL needs a very precise register sequence to permit to be locked, thus using the specific clk-pll pcie ops. The PLL is then followed by : - a fixed /2 divider - a 5-bit 1-based divider - a final /2 divider This reference clock is fixed to 100MHz, thus only a single PLL setup is added. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lkml.kernel.org/r/20190307141455.23879-4-narmstrong@baylibre.com
Linux kernel
============
There are several guides for kernel developers and users. These guides can
be rendered in a number of formats, like HTML and PDF. Please read
Documentation/admin-guide/README.rst first.
In order to build the documentation, use ``make htmldocs`` or
``make pdfdocs``. The formatted documentation can also be read online at:
https://www.kernel.org/doc/html/latest/
There are various text files in the Documentation/ subdirectory,
several of them using the Restructured Text markup notation.
Please read the Documentation/process/changes.rst file, as it contains the
requirements for building and running the kernel, and information about
the problems which may result by upgrading your kernel.