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The CLK_SET_RATE_PARENT flag make the parent clock and the child clk is 1:1. If the DCLK frequency is too low, the PLL frequency will be very low, which will affect the output waveform quality of PLL, and PLL locking may be abnormal, so add a new COMPOSITE_DCLK clock-type to handle that. Change-Id: If9bee9ebf157fcf034aed246b3aa1cff503ef9cf Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Linux kernel
============
There are several guides for kernel developers and users. These guides can
be rendered in a number of formats, like HTML and PDF. Please read
Documentation/admin-guide/README.rst first.
In order to build the documentation, use ``make htmldocs`` or
``make pdfdocs``. The formatted documentation can also be read online at:
https://www.kernel.org/doc/html/latest/
There are various text files in the Documentation/ subdirectory,
several of them using the Restructured Text markup notation.
See Documentation/00-INDEX for a list of what is contained in each file.
Please read the Documentation/process/changes.rst file, as it contains the
requirements for building and running the kernel, and information about
the problems which may result by upgrading your kernel.