PD#SWPL-17916
Problem:
Reset spdifout will cause the spdif signal
stop a while and some AVR will spend 2s
to resync the spdif clk.
Solution:
As the chip after TL1 the audio FIFO changes to async
FIFO which may bring in channel map error.
In the case 2 channel playback, don't reset spdifout.
Verify:
SM1.
Change-Id: I65dbfe63251b4fbf468fbbcfbd07b2625708c8b6
Signed-off-by: Shuai Li <shuai.li@amlogic.com>
579fd63a27