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dbcc3c130c
If the DSC mode with a compression rate lower than 0.375 is to be supported, the dclk clock source of the VOP bound to HDMI must be a CRU PLL that supports fractional frequency division. However, in most scenarios, HDMI is unable to be assigned such a PLL. So in this scenario, instead of enabling DSC, we switch to YUV420 format. Change-Id: I450cdd5857e4384894651ed063fac152a8d9bb0f Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Linux kernel
============
There are several guides for kernel developers and users. These guides can
be rendered in a number of formats, like HTML and PDF. Please read
Documentation/admin-guide/README.rst first.
In order to build the documentation, use ``make htmldocs`` or
``make pdfdocs``. The formatted documentation can also be read online at:
https://www.kernel.org/doc/html/latest/
There are various text files in the Documentation/ subdirectory,
several of them using the Restructured Text markup notation.
Please read the Documentation/process/changes.rst file, as it contains the
requirements for building and running the kernel, and information about
the problems which may result by upgrading your kernel.