PD#SWPL-158147
Problem:
not hardcode dummy_panel timing
Solution:
get vinfo2 timing and set for dummy_panel
Verify:
txhd2
Test:
DRM-OSD-55
Change-Id: I6b899edfc9445f880cb217d6b1e96d63acbdd249
Signed-off-by: congyang.huang <congyang.huang@amlogic.com>
PD#SWPL-163867
Problem:
modify FRC urgent control function
Solution:
modify FRC urgent control function
Verify:
T3X
Change-Id: I1f992ce77937733f10df1eaa0ed005e43619d302
Signed-off-by: lukang.jia <lukang.jia@amlogic.com>
PD#SWPL-161721
Problem:
new function
Solution:
1.DV_IOC_GET_DV_PRECISION_DETAIL_SUPPORT get cap from cfg
2.DV_IOC_SET_DV_PRECISION_DETAIL_BYPASS set bypass
Verify:
t3x
Change-Id: I01e1f01e942349aa2241df6748100015603e185b
Signed-off-by: yao liu <yao.liu@amlogic.com>
PD#SWPL-163844
Problem:
switch to 59.94hz, not set 60hz mode when qms enable
because frac mode
Solution:
set frac 0 when brr mode
Verify:
s7d
Test:
DRM-TX-75
Change-Id: I69fc38ffee456d2a917f586e7ed04dad3aa8a22d
Signed-off-by: Wenjie Qiao <wenjie.qiao@amlogic.com>
PD#SWPL-161639
Problem:
need optimize vframe for 5.15
Solution:
.need optimize vframe for 5.15
Verify:
t3
Change-Id: I7ecb26b4d602c3620a4064831e23fea961d74ff9
Signed-off-by: jinbing.zhu <jinbing.zhu@amlogic.com>
PD#SWPL-160446
Problem:
1.add no_compress info for amdv
2.afbc and mif data format maybe different
Solution:
1.add no_compress info for amdv
2.add bitdepth_dw for dw data
Verify:
t3x
Change-Id: Ia47d24744dd1e87768e1b856d95ddb3e2e41780f
Signed-off-by: Pengcheng Chen <pengcheng.chen@amlogic.com>
PD#SWPL-159909
Problem:
Need debug cmd to set the h/v of double write frame
Solution:
Add debug cmd
Verify:
T3x
Change-Id: Ie93c1dfed65670d79f75553f892abad78a22a671
Signed-off-by: haitao.liu <haitao.liu@amlogic.com>
PD#SWPL-160157
Problem:
add api to get input param for vpp when pre-link
Solution:
add api to get input param for vpp
Verify:
t5m
Change-Id: I5f1198c94dfc840f5024d1fdb61bda2f5c5e8f4e
Signed-off-by: rong.wang <rong.wang@amlogic.com>
PD#SWPL-158042
Problem:
drm module automic-check and automic-enable use differnet hpd status
information when hdmitx hotplug
Solution:
[hpd] add system timein hdmitx state
Verify:
S5/SC2
Test:
DRM-TX-103
Change-Id: Id0f37cf01c5266a720f2881ee8cd9fab274b79b9
Signed-off-by: yahui.liu <yahui.liu@amlogic.com>
PD#SWPL-143076
Problem:
mmu copy cannot access address over 4G.
Solution:
set alloc from dma32 zone when config_alloc_flags bit0 is set.
Verify:
S5
Change-Id: I142f182dff1509e591d20ed0e440a6851f8d7029
Signed-off-by: gan.zhang <gan.zhang@amlogic.com>
PD#SWPL-161016
Problem:
When s7 is in standby and wakes up, it will turn off and on the vpu
power domain. When it is turned off, the reg of the relevant modules
will be reset, the output no signal when it wakes up.
Solution:
hdmitx driver needs to reinitialize the required top register when
it wake up
Verify:
s7
Test:
DRM-TX-78, DRM-TX-79, DRM-TX-80, DRM-TX-81
Change-Id: Ie9d458087fcc9ea672ec477d46b88a6d7ddcec81
Signed-off-by: xiang.wu1 <xiang.wu1@amlogic.com>
PD#SWPL-151267
Problem:
drv set buf num
Solution:
drv set buf num
Verify:
T3X
Change-Id: I2e8ee518adddb969c499b285ceb0988f13ab7a00
Signed-off-by: dongfei.li <dongfei.li@amlogic.com>
PD#SWPL-161276
Problem:
set arb and urgent default val
Solution:
add arb and urgent default val
Verify:
s7
Change-Id: Ic0dd2f35e65e9b1580970d82096d067e9a15da5c
Signed-off-by: hai.cao <hai.cao@amlogic.com>
PD#SWPL-157220
Problem:
When the edid only supports 576p 16x9 and hwc set to 576p50hz,
576p 4x3 is selected as the output mode, resulting in output failure.
Solution:
When mode match timing name, 16x9 timing is preferred.
EDID only support 4x3, match 4x3 timing
EDID only support 16x9, match 16x9 timing
EDID support 4x3 and 16x9, match 16x9 timing
Verify:
bluebell
Test:
DRM-TX-107
Change-Id: I49fb7114edbde884c14724dbc403df5384968059
Signed-off-by: zhou.han <zhou.han@amlogic.com>
PD#SWPL-159986
Problem:
need support swpdf function for a choice to decrease crosstalk
Solution:
add swpdf
Verify:
t5m
Change-Id: If6a283f3521e55a876467b7ce8b384472a8e8bb5
Signed-off-by: Jie Dai <jie.dai@amlogic.com>
PD#SWPL-158175
Problem:
the first dv signal did rgb2yuv by hdr core,
resulting in blue flashing.
Solution:
dv signal is not processed by rgb2yuv.
Verify:
t5m.
Change-Id: I886940deb9e943dd91c7426b7c71374fcba51b02
Signed-off-by: jialong.jiang <jialong.jiang@amlogic.com>
PD#SWPL-155395
Problem:
When modules send mailbox message to aocpu, sometimes
aocpu can not response because of stuck or interrupt
signal lost, at this time driver modules need to know
whether aocpu is alive or not, this is helpful to debug.
Solution:
Add aocpu alive check mechanism, when aocpu did not
response, system will check and print aocpu status.
Verify:
T5M-AY309
Change-Id: Idd1c47fd99505f3a159c86390c28303f5a5b60e9
Signed-off-by: Yao Jie <jie.yao@amlogic.com>
PD#GH-3737
PD#SWPL-155123
Problem:
play HDR video under DV_STD, output as SDR
Solution:
auto change the color depth to support HDR under DV_STD
Verify:
SC2
S5
Test:
DRM-TX-90
Change-Id: I255011995b80d2cf01499ea8c3584cbda5e54c5f
Signed-off-by: ruofei.zhao <ruofei.zhao@amlogic.com>
PD#SWPL-153931
Problem:
adjust backlight，does not change smoothly
Solution:
adjust backlight by use pdim or litgain
for different LD type
Verify:
T3X
Change-Id: I2e7e73f982f79b87412e0d6fd04fc7579800d2bd
Signed-off-by: zijie.lin <zijie.lin@amlogic.com>
PD#SWPL-158140
Problem:
need bl30 control via mailbox
Solution:
support it
Verify:
s1a
Change-Id: I737217be12377b800acda8b05a729b362c2fa622
Signed-off-by: Junyi Zhao <junyi.zhao@amlogic.com>
PD#SWPL-158644
Problem:
no need brightness meter function
Solution:
remove brightness meter function
Verify:
be311
Change-Id: Ifdcc6d6ad5bab79bbf901349d8cf203f32304772
Signed-off-by: Evoke Zhang <evoke.zhang@amlogic.com>
PD#SWPL-157539
Problem:
1.for width <= 1024, ko set level to 6, so need TOP1 rdmif downscale.
If set dw 1:2, dw image is too small for decontour.
2.display blank for the first time playing with precision, reset top2
can resolve this issue
Solution:
1.for width <= 1024, config dw 1:1 and top1 rdmif downscale.
2.optimize playback process,bypass top1 for frame1,
enable top1 and top2 simultaneously
Verify:
t3x
Change-Id: I8f6d9936163b269a0dfd5865716d477a78dfbb8b
Signed-off-by: yao liu <yao.liu@amlogic.com>
PD#SWPL-158260
Problem:
amlvideo2 want to get hdcp status
Solution:
set hdcp flag in vf if HDCP input
Verify:
t7c
Change-Id: I1d5ddcb5d3e5d1f467e9de7f20dc76a96fdd94b4
Signed-off-by: haitao.liu <haitao.liu@amlogic.com>
PD#SWPL-158107
Problem:
tracer is not written in the edid parsing process
Solution:
edid tracer post-processing
Verify:
SC2
S5
Test:
DRM-TX-99
Change-Id: Ie802d13da665ae0846a6829ecca0618583d54166
Signed-off-by: ruofei.zhao <ruofei.zhao@amlogic.com>
PD#SWPL-153877
Problem:
conflict between drm and dv when write afbc top ctrl.
Solution:
dv add graphic interface to drm.
drm get dv status and write corresponding reg bit.
Verify:
t7c
Change-Id: I98f27d82f77af8aad35fba65b66b66f482d0802a
Signed-off-by: jialong.jiang <jialong.jiang@amlogic.com>
PD#SWPL-148358
Problem:
video show tear when 3840x1080
Solution:
different axis use different line delay
Verify:
t3x
Change-Id: Ieb68ef2058112426b505fd87a59c903269bc2a26
Signed-off-by: Bin.Wang2 <bin.wang2@amlogic.com>
PD#SWPL-96632
Problem:
hdmitx_common_validate_format_para has no mutex lock protect.
when hdmitx plug event happen in encoder atomic check stage,
it will lead to info mismatch
Solution:
add hdmitx_common_validate_mode_locked api which has mutex lock
to protect the encoder check flow.
Will revert it when we move edid parering to drm.
Verify:
ah212
Test:
DRM-OSD-5
Change-Id: I7b4c98fac8378133166100f9d22ddcfe0af66407
Signed-off-by: Ao Xu <ao.xu@amlogic.com>
PD#SWPL-147387
Problem:
Android T support I/P switch for txhd2 while di backend.
Solution:
support I/P switch for txhd2 while di backend.
Verify:
txhd2
Change-Id: I9ba08dcfcd62aebd8ab32e23df77c4a461273cbb
Signed-off-by: chen.xu <chen.xu@amlogic.com>
hai.cao