mirror of
https://github.com/hardkernel/linux.git
synced 2026-06-07 03:15:31 +09:00
pwm: rockchip: Make pwm pinctrl setting after pwm enabled
If the PWM pinctrl uses default state, the iomux setting will be done at probe, the PWM may not be enabled at this moment. It will make PWM into an intermediate state, destroy the default hardware state, the PWM is not ready for work yet. So it is better for doing PWM pinctrl setting after PWM enabled. Change-Id: Iea34a7baf6a4d7df0c631f7f4fdab5b9d61bbd5f Signed-off-by: David Wu <david.wu@rock-chips.com>
This commit is contained in:
@@ -557,7 +557,7 @@
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#pwm-cells = <3>;
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clocks = <&cru PCLK_PWM>;
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clock-names = "pwm";
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pinctrl-names = "default";
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pinctrl-names = "active";
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pinctrl-0 = <&pwm0_pin>;
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status = "disabled";
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};
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@@ -568,7 +568,7 @@
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#pwm-cells = <3>;
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clocks = <&cru PCLK_PWM>;
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clock-names = "pwm";
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pinctrl-names = "default";
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pinctrl-names = "active";
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pinctrl-0 = <&pwm1_pin>;
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status = "disabled";
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};
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@@ -579,7 +579,7 @@
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#pwm-cells = <3>;
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clocks = <&cru PCLK_PWM>;
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clock-names = "pwm";
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pinctrl-names = "default";
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pinctrl-names = "active";
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pinctrl-0 = <&pwm2_pin>;
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status = "disabled";
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};
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@@ -590,7 +590,7 @@
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#pwm-cells = <2>;
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clocks = <&cru PCLK_PWM>;
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clock-names = "pwm";
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pinctrl-names = "default";
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pinctrl-names = "active";
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pinctrl-0 = <&pwm3_pin>;
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status = "disabled";
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};
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@@ -833,22 +833,22 @@
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};
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&pwm0 {
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pinctrl-names = "default";
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pinctrl-names = "active";
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pinctrl-0 = <&pwm0_out>;
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};
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&pwm1 {
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pinctrl-names = "default";
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pinctrl-names = "active";
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pinctrl-0 = <&pwm1_out>;
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};
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&pwm2 {
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pinctrl-names = "default";
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pinctrl-names = "active";
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pinctrl-0 = <&pwm2_out>;
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};
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&pwm3 {
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pinctrl-names = "default";
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pinctrl-names = "active";
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pinctrl-0 = <&pwm3_out>;
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};
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@@ -571,22 +571,22 @@
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};
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&pwm0 {
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pinctrl-names = "default";
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pinctrl-names = "active";
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pinctrl-0 = <&pwm0_out>;
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};
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&pwm1 {
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pinctrl-names = "default";
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pinctrl-names = "active";
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pinctrl-0 = <&pwm1_out>;
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};
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&pwm2 {
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pinctrl-names = "default";
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pinctrl-names = "active";
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pinctrl-0 = <&pwm2_out>;
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};
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&pwm3 {
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pinctrl-names = "default";
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pinctrl-names = "active";
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pinctrl-0 = <&pwm3_out>;
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};
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@@ -575,7 +575,7 @@
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#pwm-cells = <3>;
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clocks = <&cru PCLK_PWM>;
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clock-names = "pwm";
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pinctrl-names = "default";
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pinctrl-names = "active";
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pinctrl-0 = <&pwm0_pin>;
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status = "disabled";
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};
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@@ -586,7 +586,7 @@
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#pwm-cells = <3>;
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clocks = <&cru PCLK_PWM>;
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clock-names = "pwm";
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pinctrl-names = "default";
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pinctrl-names = "active";
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pinctrl-0 = <&pwm1_pin>;
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status = "disabled";
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};
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@@ -597,7 +597,7 @@
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#pwm-cells = <3>;
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clocks = <&cru PCLK_PWM>;
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clock-names = "pwm";
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pinctrl-names = "default";
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pinctrl-names = "active";
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pinctrl-0 = <&pwm2_pin>;
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status = "disabled";
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};
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@@ -609,7 +609,7 @@
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#pwm-cells = <3>;
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clocks = <&cru PCLK_PWM>;
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clock-names = "pwm";
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pinctrl-names = "default";
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pinctrl-names = "active";
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pinctrl-0 = <&pwm3_pin>;
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status = "disabled";
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};
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@@ -667,7 +667,7 @@
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compatible = "rockchip,rk3288-pwm";
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reg = <0x0 0xff680000 0x0 0x10>;
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#pwm-cells = <3>;
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pinctrl-names = "default";
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pinctrl-names = "active";
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pinctrl-0 = <&pwm0_pin>;
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clocks = <&cru PCLK_PWM>;
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clock-names = "pwm";
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@@ -678,7 +678,7 @@
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compatible = "rockchip,rk3288-pwm";
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reg = <0x0 0xff680010 0x0 0x10>;
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#pwm-cells = <3>;
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pinctrl-names = "default";
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pinctrl-names = "active";
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pinctrl-0 = <&pwm1_pin>;
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clocks = <&cru PCLK_PWM>;
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clock-names = "pwm";
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@@ -689,7 +689,7 @@
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compatible = "rockchip,rk3288-pwm";
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reg = <0x0 0xff680020 0x0 0x10>;
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#pwm-cells = <3>;
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pinctrl-names = "default";
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pinctrl-names = "active";
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pinctrl-0 = <&pwm2_pin>;
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clocks = <&cru PCLK_PWM>;
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clock-names = "pwm";
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@@ -700,7 +700,7 @@
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compatible = "rockchip,rk3288-pwm";
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reg = <0x0 0xff680030 0x0 0x10>;
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#pwm-cells = <2>;
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pinctrl-names = "default";
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pinctrl-names = "active";
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pinctrl-0 = <&pwm3_pin>;
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clocks = <&cru PCLK_PWM>;
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clock-names = "pwm";
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@@ -379,7 +379,7 @@
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interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru SCLK_PWM0_PMU>, <&cru PCLK_PWM0_PMU>;
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clock-names = "pwm", "pclk";
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pinctrl-names = "default";
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pinctrl-names = "active";
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pinctrl-0 = <&pwm0_pin>;
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#pwm-cells = <3>;
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status = "disabled";
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@@ -391,7 +391,7 @@
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interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru SCLK_PWM0_PMU>, <&cru PCLK_PWM0_PMU>;
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clock-names = "pwm", "pclk";
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pinctrl-names = "default";
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pinctrl-names = "active";
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pinctrl-0 = <&pwm1_pin>;
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#pwm-cells = <3>;
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status = "disabled";
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@@ -403,7 +403,7 @@
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interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru SCLK_PWM0_PMU>, <&cru PCLK_PWM0_PMU>;
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clock-names = "pwm", "pclk";
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pinctrl-names = "default";
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pinctrl-names = "active";
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pinctrl-0 = <&pwm2_pin>;
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#pwm-cells = <3>;
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status = "disabled";
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@@ -415,7 +415,7 @@
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interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru SCLK_PWM0_PMU>, <&cru PCLK_PWM0_PMU>;
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clock-names = "pwm", "pclk";
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pinctrl-names = "default";
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pinctrl-names = "active";
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pinctrl-0 = <&pwm3_pin>;
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#pwm-cells = <3>;
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status = "disabled";
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@@ -512,7 +512,7 @@
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reg = <0x0 0xff1b0000 0x0 0x10>;
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clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
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clock-names = "pwm", "pclk";
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pinctrl-names = "default";
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pinctrl-names = "active";
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pinctrl-0 = <&pwm0_pin>;
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#pwm-cells = <3>;
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status = "disabled";
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@@ -523,7 +523,7 @@
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reg = <0x0 0xff1b0010 0x0 0x10>;
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clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
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clock-names = "pwm", "pclk";
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pinctrl-names = "default";
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pinctrl-names = "active";
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pinctrl-0 = <&pwm1_pin>;
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#pwm-cells = <3>;
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status = "disabled";
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@@ -534,7 +534,7 @@
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reg = <0x0 0xff1b0020 0x0 0x10>;
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clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
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clock-names = "pwm", "pclk";
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pinctrl-names = "default";
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pinctrl-names = "active";
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pinctrl-0 = <&pwm2_pin>;
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#pwm-cells = <3>;
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status = "disabled";
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@@ -546,7 +546,7 @@
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interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
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clock-names = "pwm", "pclk";
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pinctrl-names = "default";
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pinctrl-names = "active";
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pinctrl-0 = <&pwmir_pin>;
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#pwm-cells = <3>;
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status = "disabled";
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@@ -848,7 +848,7 @@
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compatible = "rockchip,rk3368-pwm", "rockchip,rk3288-pwm";
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reg = <0x0 0xff680000 0x0 0x10>;
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#pwm-cells = <3>;
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pinctrl-names = "default";
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pinctrl-names = "active";
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pinctrl-0 = <&pwm0_pin>;
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clocks = <&cru PCLK_PWM1>;
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clock-names = "pwm";
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@@ -859,7 +859,7 @@
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compatible = "rockchip,rk3368-pwm", "rockchip,rk3288-pwm";
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reg = <0x0 0xff680010 0x0 0x10>;
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#pwm-cells = <3>;
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pinctrl-names = "default";
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pinctrl-names = "active";
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pinctrl-0 = <&pwm1_pin>;
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clocks = <&cru PCLK_PWM1>;
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clock-names = "pwm";
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@@ -879,7 +879,7 @@
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compatible = "rockchip,rk3368-pwm", "rockchip,rk3288-pwm";
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reg = <0x0 0xff680030 0x0 0x10>;
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#pwm-cells = <3>;
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pinctrl-names = "default";
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pinctrl-names = "active";
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pinctrl-0 = <&pwm3_pin>;
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clocks = <&cru PCLK_PWM1>;
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clock-names = "pwm";
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@@ -1255,7 +1255,7 @@
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compatible = "rockchip,rk3399-pwm", "rockchip,rk3288-pwm";
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reg = <0x0 0xff420000 0x0 0x10>;
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#pwm-cells = <3>;
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pinctrl-names = "default";
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pinctrl-names = "active";
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pinctrl-0 = <&pwm0_pin>;
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clocks = <&pmucru PCLK_RKPWM_PMU>;
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clock-names = "pwm";
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@@ -1266,7 +1266,7 @@
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compatible = "rockchip,rk3399-pwm", "rockchip,rk3288-pwm";
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reg = <0x0 0xff420010 0x0 0x10>;
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#pwm-cells = <3>;
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pinctrl-names = "default";
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pinctrl-names = "active";
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pinctrl-0 = <&pwm1_pin>;
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clocks = <&pmucru PCLK_RKPWM_PMU>;
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clock-names = "pwm";
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@@ -1277,7 +1277,7 @@
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compatible = "rockchip,rk3399-pwm", "rockchip,rk3288-pwm";
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reg = <0x0 0xff420020 0x0 0x10>;
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#pwm-cells = <3>;
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pinctrl-names = "default";
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pinctrl-names = "active";
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pinctrl-0 = <&pwm2_pin>;
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clocks = <&pmucru PCLK_RKPWM_PMU>;
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clock-names = "pwm";
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@@ -1288,7 +1288,7 @@
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compatible = "rockchip,rk3399-pwm", "rockchip,rk3288-pwm";
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reg = <0x0 0xff420030 0x0 0x10>;
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#pwm-cells = <3>;
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pinctrl-names = "default";
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pinctrl-names = "active";
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pinctrl-0 = <&pwm3a_pin>;
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clocks = <&pmucru PCLK_RKPWM_PMU>;
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clock-names = "pwm";
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@@ -1814,7 +1814,7 @@
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compatible = "rockchip,vop-pwm";
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reg = <0x0 0xff8f01a0 0x0 0x10>;
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#pwm-cells = <3>;
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pinctrl-names = "default";
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pinctrl-names = "active";
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pinctrl-0 = <&vop1_pwm_pin>;
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clocks = <&cru SCLK_VOP1_PWM>;
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clock-names = "pwm";
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@@ -1883,7 +1883,7 @@
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compatible = "rockchip,vop-pwm";
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reg = <0x0 0xff9001a0 0x0 0x10>;
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#pwm-cells = <3>;
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pinctrl-names = "default";
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pinctrl-names = "active";
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pinctrl-0 = <&vop0_pwm_pin>;
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clocks = <&cru SCLK_VOP0_PWM>;
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clock-names = "pwm";
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@@ -14,6 +14,7 @@
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/pinctrl/consumer.h>
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#include <linux/platform_device.h>
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#include <linux/pwm.h>
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#include <linux/time.h>
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@@ -36,6 +37,8 @@ struct rockchip_pwm_chip {
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struct pwm_chip chip;
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struct clk *clk;
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struct clk *pclk;
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struct pinctrl *pinctrl;
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struct pinctrl_state *active_state;
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const struct rockchip_pwm_data *data;
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void __iomem *base;
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bool vop_pwm_en; /* indicate voppwm mirror register state */
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@@ -105,7 +108,7 @@ static void rockchip_pwm_get_state(struct pwm_chip *chip,
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}
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static void rockchip_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
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struct pwm_state *state)
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struct pwm_state *state)
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{
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struct rockchip_pwm_chip *pc = to_rockchip_pwm_chip(chip);
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unsigned long period, duty;
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@@ -237,6 +240,8 @@ static int rockchip_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
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*/
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rockchip_pwm_get_state(chip, pwm, state);
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if (state->enabled)
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ret = pinctrl_select_state(pc->pinctrl, pc->active_state);
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out:
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clk_disable(pc->pclk);
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@@ -380,6 +385,18 @@ static int rockchip_pwm_probe(struct platform_device *pdev)
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goto err_clk;
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}
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pc->pinctrl = devm_pinctrl_get(&pdev->dev);
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if (IS_ERR(pc->pinctrl)) {
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dev_err(&pdev->dev, "Get pinctrl failed!\n");
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return PTR_ERR(pc->pinctrl);
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}
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pc->active_state = pinctrl_lookup_state(pc->pinctrl, "active");
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if (IS_ERR(pc->active_state)) {
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dev_err(&pdev->dev, "No active pinctrl state\n");
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return PTR_ERR(pc->active_state);
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}
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platform_set_drvdata(pdev, pc);
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pc->data = id->data;
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