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clk: rockchip: rk3218: add rkclk_cpuclk_div_setting
fix up the RK816 setting voltage drop make the system crash. Before adjusting voltage, increase clk_cpu div and reduce CPU frequency Only support for RK312x chips. Change-Id: Id327da9590f7d9d383450e79acd1b309e05cd024 Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Signed-off-by: shengfei Xu <xsf@rock-chips.com>
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@@ -8,6 +8,7 @@
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/rockchip/cpu.h>
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#include <linux/syscore_ops.h>
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#include <dt-bindings/clock/rk3128-cru.h>
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#include "clk.h"
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@@ -577,6 +578,15 @@ static const char *const rk3128_critical_clocks[] __initconst = {
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"sclk_timer5",
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};
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static void __iomem *rk312x_reg_base;
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void rkclk_cpuclk_div_setting(int div)
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{
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if (cpu_is_rk312x())
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writel_relaxed((0x001f0000 | (div - 1)),
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rk312x_reg_base + RK2928_CLKSEL_CON(0));
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}
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static struct rockchip_clk_provider *__init rk3128_common_clk_init(struct device_node *np)
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{
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struct rockchip_clk_provider *ctx;
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@@ -588,6 +598,7 @@ static struct rockchip_clk_provider *__init rk3128_common_clk_init(struct device
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return ERR_PTR(-ENOMEM);
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}
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rk312x_reg_base = reg_base;
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ctx = rockchip_clk_init(np, reg_base, CLK_NR_CLKS);
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if (IS_ERR(ctx)) {
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pr_err("%s: rockchip clk init failed\n", __func__);
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