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drivers; rkflash: Support new devices
W25N04KVZEIR, DS35Q2GB-IB, EM73C044VCF-H, XT26G11C, MT29F1G01ABA, F50L1G41XA, JS28U1GQSCAHG-83 Change-Id: I38a16e26dea1624a4e101d7f965f9abfe44a3821 Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
This commit is contained in:
@@ -19,6 +19,7 @@ static u32 sfc_nand_get_ecc_status4(void);
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static u32 sfc_nand_get_ecc_status5(void);
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static u32 sfc_nand_get_ecc_status6(void);
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static u32 sfc_nand_get_ecc_status7(void);
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static u32 sfc_nand_get_ecc_status8(void);
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static struct nand_info spi_nand_tbl[] = {
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/* TC58CVG0S0HxAIx */
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@@ -66,6 +67,8 @@ static struct nand_info spi_nand_tbl[] = {
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{ 0xEF, 0xAA, 0x21, 4, 0x40, 1, 1024, 0x4C, 18, 0x1, 0, { 0x04, 0x14, 0x24, 0xFF }, &sfc_nand_get_ecc_status1 },
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/* W25N02KVZEIR */
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{ 0xEF, 0xAA, 0x22, 4, 0x40, 1, 2048, 0x4C, 19, 0x8, 0, { 0x04, 0x14, 0x24, 0xFF }, &sfc_nand_get_ecc_status0 },
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/* W25N04KVZEIR */
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{ 0xEF, 0xAA, 0x23, 4, 0x40, 1, 4096, 0x4C, 20, 0x8, 0, { 0x04, 0x14, 0x24, 0x34 }, &sfc_nand_get_ecc_status0 },
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/* W25N01GW */
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{ 0xEF, 0xBA, 0x00, 4, 0x40, 1, 1024, 0x4C, 18, 0x1, 0, { 0x04, 0x14, 0x24, 0xFF }, &sfc_nand_get_ecc_status1 },
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@@ -99,6 +102,8 @@ static struct nand_info spi_nand_tbl[] = {
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{ 0xE5, 0x72, 0x00, 4, 0x40, 2, 1024, 0x0C, 19, 0x4, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
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/* DS35M1GA-1B */
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{ 0xE5, 0x21, 0x00, 4, 0x40, 1, 1024, 0x0C, 18, 0x4, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
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/* DS35Q2GB-IB */
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{ 0xE5, 0xF2, 0x00, 4, 0x40, 2, 1024, 0x0C, 19, 0x8, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status6 },
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/* EM73C044VCC-H */
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{ 0xD5, 0x22, 0x00, 4, 0x40, 1, 1024, 0x0C, 18, 0x8, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
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@@ -106,6 +111,8 @@ static struct nand_info spi_nand_tbl[] = {
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{ 0xD5, 0x20, 0x00, 4, 0x40, 1, 2048, 0x0C, 19, 0x8, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
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/* EM73E044SNA-G */
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{ 0xD5, 0x03, 0x00, 8, 0x40, 1, 2048, 0x4C, 20, 0x8, 1, { 0x04, 0x28, 0x08, 0x2C }, &sfc_nand_get_ecc_status0 },
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/* EM73C044VCF-H */
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{ 0xD5, 0x25, 0x00, 4, 0x40, 1, 1024, 0x0C, 18, 0x4, 1, { 0x04, 0x14, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
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/* XT26G02A */
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{ 0x0B, 0xE2, 0x00, 4, 0x40, 1, 2048, 0x4C, 19, 0x8, 1, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status4 },
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@@ -123,9 +130,13 @@ static struct nand_info spi_nand_tbl[] = {
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{ 0x0B, 0x12, 0x00, 4, 0x40, 1, 2048, 0x4C, 19, 0x8, 1, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status7 },
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/* XT26G04C */
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{ 0x0B, 0x13, 0x00, 8, 0x40, 1, 2048, 0x4C, 20, 0x8, 1, { 0x04, 0x08, 0x0C, 0x10 }, &sfc_nand_get_ecc_status7 },
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/* XT26G11C */
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{ 0x0B, 0x15, 0x00, 4, 0x40, 1, 1024, 0x4C, 18, 0x8, 1, { 0x04, 0x08, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
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/* MT29F2G01ABA, XT26G02E, F50L2G41XA */
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{ 0x2C, 0x24, 0x00, 4, 0x40, 2, 1024, 0x4C, 19, 0x1, 1, { 0x20, 0x24, 0xFF, 0xFF }, &sfc_nand_get_ecc_status6 },
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{ 0x2C, 0x24, 0x00, 4, 0x40, 2, 1024, 0x4C, 19, 0x8, 0, { 0x20, 0x24, 0xFF, 0xFF }, &sfc_nand_get_ecc_status6 },
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/* MT29F1G01ABA, F50L1G41XA */
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{ 0x2C, 0x14, 0x00, 4, 0x40, 1, 1024, 0x4C, 18, 0x8, 0, { 0x20, 0x24, 0xFF, 0xFF }, &sfc_nand_get_ecc_status6 },
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/* FM25S01 */
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{ 0xA1, 0xA1, 0x00, 4, 0x40, 1, 1024, 0x4C, 18, 0x1, 0, { 0x00, 0x04, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
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@@ -142,6 +153,8 @@ static struct nand_info spi_nand_tbl[] = {
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{ 0x9B, 0x12, 0x00, 4, 0x40, 1, 1024, 0x40, 18, 0x1, 1, { 0x14, 0x24, 0xFF, 0xFF }, &sfc_nand_get_ecc_status1 },
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/* BWJX08K-2Gb */
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{ 0xBC, 0xB3, 0x00, 4, 0x40, 1, 2048, 0x4C, 19, 0x8, 1, { 0x04, 0x10, 0xFF, 0xFF }, &sfc_nand_get_ecc_status0 },
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/* JS28U1GQSCAHG-83 */
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{ 0xBF, 0x21, 0x00, 4, 0x40, 1, 1024, 0x40, 18, 0x4, 1, { 0x08, 0x0C, 0xFF, 0xFF }, &sfc_nand_get_ecc_status8 },
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};
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static struct nand_info *p_nand_info;
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@@ -456,7 +469,7 @@ static u32 sfc_nand_get_ecc_status3(void)
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* [0b1000], Multiple bit errors were detected and
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* not corrected.
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* [0b1100], Bit error count equals the bit flip
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* detectionthreshold
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* detection threshold
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* else, reserved
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*/
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static u32 sfc_nand_get_ecc_status4(void)
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@@ -498,7 +511,7 @@ static u32 sfc_nand_get_ecc_status4(void)
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* [0b001, 0b011], Bit errors were detected and corrected. Not
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* reach Flipping Bits;
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* [0b100], Bit error count equals the bit flip
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* detectionthreshold
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* detection threshold
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* [0b101, 0b110], Reserved;
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* [0b111], Multiple bit errors were detected and
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* not corrected.
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@@ -624,6 +637,48 @@ static u32 sfc_nand_get_ecc_status7(void)
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return ret;
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}
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/*
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* ecc spectial type8:
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* ecc bits: 0xC0[4,6]
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* [0b000], No bit errors were detected;
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* [0b001, 0b011], 1~3 Bit errors were detected and corrected. Not
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* reach Flipping Bits;
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* [0b100], Bit error count equals the bit flip
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* detection threshold
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* others, Reserved.
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*/
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static u32 sfc_nand_get_ecc_status8(void)
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{
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u32 ret;
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u32 i;
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u8 ecc;
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u8 status;
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u32 timeout = 1000 * 1000;
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for (i = 0; i < timeout; i++) {
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ret = sfc_nand_read_feature(0xC0, &status);
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if (ret != SFC_OK)
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return SFC_NAND_ECC_ERROR;
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if (!(status & (1 << 0)))
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break;
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sfc_delay(1);
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}
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ecc = (status >> 4) & 0x07;
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if (ecc < 4)
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ret = SFC_NAND_ECC_OK;
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else if (ecc == 4)
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ret = SFC_NAND_ECC_REFRESH;
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else
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ret = (u32)SFC_NAND_ECC_ERROR;
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return ret;
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}
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u32 sfc_nand_erase_block(u8 cs, u32 addr)
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{
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int ret;
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@@ -849,7 +904,7 @@ u32 sfc_nand_check_bad_block(u8 cs, u32 addr)
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ret = sfc_nand_read(addr, &marker, data_size, 2);
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/* unify with mtd framework */
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if (ret == SFC_NAND_ECC_ERROR)
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if (ret == SFC_NAND_ECC_ERROR || (u16)marker != 0xffff)
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rkflash_print_error("%s page= %x ret= %x spare= %x\n",
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__func__, addr, ret, marker);
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