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drm/rockchip: vop2: aclk adjust only when have one active VP

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VP share same vop aclk, so only when have one active vp we can adjust aclk
rate in psr mode.

Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I6c3ea84f5ab8a33d7c48e3c49c4426344e644a8a
This commit is contained in:
Sandy Huang
2022-03-21 10:47:38 +08:00
committed by Tao Huang
parent 98d0bc3b25
commit 07de89a542
1 changed files with 5 additions and 3 deletions
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8
drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
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@@ -3705,9 +3705,11 @@ static void vop2_crtc_atomic_disable_for_psr(struct drm_crtc *crtc,
vop2_disable_all_planes_for_crtc(crtc);
drm_crtc_vblank_off(crtc);
vop2->aclk_rate = clk_get_rate(vop2->aclk);
clk_set_rate(vop2->aclk, vop2->aclk_rate / 3);
vop2->aclk_rate_reset = true;
if (hweight8(vop2->active_vp_mask) == 1) {
vop2->aclk_rate = clk_get_rate(vop2->aclk);
clk_set_rate(vop2->aclk, vop2->aclk_rate / 3);
vop2->aclk_rate_reset = true;
}
}
static void vop2_crtc_atomic_disable(struct drm_crtc *crtc,