clk: rockchip: use rk3368-efuse clock ids

Reference the newly added efuse clock-ids in the clock-tree.

Change-Id: Ibbef52bcc44d006ab48e6f1f874e3bc88c681bd6
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
This commit is contained in:
Finley Xiao
2017-03-07 17:27:11 +08:00
committed by Tao Huang
parent b7f4ad4320
commit 0a64261970
2 changed files with 2 additions and 1 deletions

View File

@@ -713,7 +713,7 @@ static struct rockchip_clk_branch rk3368_clk_branches[] __initdata = {
GATE(PCLK_PWM1, "pclk_pwm1", "pclk_bus", 0, RK3368_CLKGATE_CON(13), 6, GFLAGS),
GATE(PCLK_UART2, "pclk_uart2", "pclk_bus", 0, RK3368_CLKGATE_CON(13), 5, GFLAGS),
GATE(PCLK_EFUSE256, "pclk_efuse_256", "pclk_bus", 0, RK3368_CLKGATE_CON(13), 1, GFLAGS),
GATE(0, "pclk_efuse_1024", "pclk_bus", 0, RK3368_CLKGATE_CON(13), 0, GFLAGS),
GATE(PCLK_EFUSE1024, "pclk_efuse_1024", "pclk_bus", 0, RK3368_CLKGATE_CON(13), 0, GFLAGS),
/*
* video clk gates

View File

@@ -163,6 +163,7 @@
#define PCLK_DPHYRX 369
#define PCLK_DPHYTX0 370
#define PCLK_EFUSE256 371
#define PCLK_EFUSE1024 372
/* hclk gates */
#define HCLK_USB_PERI 447