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ARM: rockchip: rv1106: sleep: decrease pmu-fsm time

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Change-Id: I57e88bb222ce26c7bf4736244e958e13b91ae184
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
This commit is contained in:
XiaoDong Huang
2023-08-22 10:16:30 +08:00
committed by Tao Huang
parent b1c3fa9777
commit 0f39cdefa8
1 changed files with 5 additions and 5 deletions
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10
arch/arm/mach-rockchip/rv1106_pm.c
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@@ -785,16 +785,16 @@ static void pmu_sleep_config(void)
writel_relaxed(BITS_WITH_WMASK(0x1, 0xf, 4), ioc_base[1] + 0);
/* pmu count */
writel_relaxed(clk_freq_khz * 32, pmu_base + RV1106_PMU_OSC_STABLE_CNT);
writel_relaxed(clk_freq_khz * 32, pmu_base + RV1106_PMU_PMIC_STABLE_CNT);
writel_relaxed(clk_freq_khz * 10, pmu_base + RV1106_PMU_OSC_STABLE_CNT);
writel_relaxed(clk_freq_khz * 5, pmu_base + RV1106_PMU_PMIC_STABLE_CNT);
/* Pmu's clk has switched to 24M back When pmu FSM counts
* the follow counters, so we should use 24M to calculate
* these counters.
*/
writel_relaxed(24000 * 2, pmu_base + RV1106_PMU_WAKEUP_RSTCLR_CNT);
writel_relaxed(24000 * 5, pmu_base + RV1106_PMU_PLL_LOCK_CNT);
writel_relaxed(24000 * 5, pmu_base + RV1106_PMU_PWM_SWITCH_CNT);
writel_relaxed(12000, pmu_base + RV1106_PMU_WAKEUP_RSTCLR_CNT);
writel_relaxed(12000, pmu_base + RV1106_PMU_PLL_LOCK_CNT);
writel_relaxed(24000 * 2, pmu_base + RV1106_PMU_PWM_SWITCH_CNT);
/* pmu reset hold */
writel_relaxed(0xffffffff, pmugrf_base + RV1106_PMUGRF_SOC_CON(4));