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backlight: ldim: optimize ldim algorithm for flicker issue
PD#167455: backlight: ldim: optimize ldim algorithm for flicker issue also add driver and algorithm version recode. Change-Id: I4b217f6d611c5689366170907db7e90b5a653a5e Signed-off-by: Evoke Zhang <evoke.zhang@amlogic.com>
This commit is contained in:
Evoke Zhang
@@ -14483,6 +14483,10 @@ AMLOGIC TXLX T962E R321 buildroot dts
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M: liangzhuo.xie <liangzhuo.xie@amlogic.com>
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F: arch/arm64/boot/dts/amlogic/txlx_t962e_r321_buildroot.dts
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AMLOGIC BACKLIGHT LOCAL DIMMING
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M: evoke.zhang <evoke.zhang@amlogic.com>
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F: drivers/amlogic/media/vout/backlight/aml_ldim/iw7027_bl.h
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AMLOGIC G12B
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M: Yan Wang <yan.wang@amlogic.com>
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F: arch/arm64/boot/dts/amlogic/mesong12b.dtsi
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@@ -418,11 +418,11 @@ static int bl_pwm_out_level_check(struct bl_pwm_config_s *bl_pwm)
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return out_level;
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}
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static void bl_set_pwm_vs(struct bl_pwm_config_s *bl_pwm, int out_level)
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static void bl_set_pwm_vs(struct bl_pwm_config_s *bl_pwm,
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unsigned int pol, unsigned int out_level)
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{
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unsigned int pwm_hi, n, sw;
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unsigned int vs[4], ve[4];
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unsigned int pol = 0;
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int i;
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if (bl_debug_print_flag) {
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@@ -441,8 +441,6 @@ static void bl_set_pwm_vs(struct bl_pwm_config_s *bl_pwm, int out_level)
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ve[i] = 0x1fff;
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}
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} else {
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if (bl_pwm->pwm_method == BL_PWM_NEGATIVE)
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pol = 1;
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bl_pwm->pwm_level =
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(((bl_pwm->pwm_cnt * bl_pwm->pwm_duty / 10) + 5) / 10);
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pwm_hi = bl_pwm->pwm_level;
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@@ -450,8 +448,10 @@ static void bl_set_pwm_vs(struct bl_pwm_config_s *bl_pwm, int out_level)
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sw = (bl_pwm->pwm_cnt * 10 / n + 5) / 10;
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pwm_hi = (pwm_hi * 10 / n + 5) / 10;
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pwm_hi = (pwm_hi > 1) ? pwm_hi : 1;
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if (bl_debug_print_flag)
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BLPR("n=%d, sw=%d, pwm_high=%d\n", n, sw, pwm_hi);
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if (bl_debug_print_flag) {
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BLPR("pwm_vs: n=%d, sw=%d, pwm_high=%d\n",
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n, sw, pwm_hi);
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}
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for (i = 0; i < n; i++) {
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vs[i] = 1 + (sw * i);
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ve[i] = vs[i] + pwm_hi - 1;
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@@ -463,7 +463,7 @@ static void bl_set_pwm_vs(struct bl_pwm_config_s *bl_pwm, int out_level)
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}
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if (bl_debug_print_flag) {
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for (i = 0; i < 4; i++) {
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BLPR("vs[%d]=%d, ve[%d]=%d\n",
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BLPR("pwm_vs: vs[%d]=%d, ve[%d]=%d\n",
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i, vs[i], i, ve[i]);
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}
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}
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@@ -483,81 +483,67 @@ static void bl_set_pwm_vs(struct bl_pwm_config_s *bl_pwm, int out_level)
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}
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}
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static void bl_set_pwm(struct bl_pwm_config_s *bl_pwm)
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static void bl_set_pwm_normal(struct bl_pwm_config_s *bl_pwm,
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unsigned int pol, unsigned int out_level)
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{
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unsigned int port = bl_pwm->pwm_port;
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unsigned int pol = 0;
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unsigned int pwm_period, pwm_duty, out_level = 0xff;
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struct pwm_device *pwm = bl_pwm->pwm_data.pwm;
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unsigned int pwm_period, pwm_duty, port_index;
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out_level = bl_pwm_out_level_check(bl_pwm);
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if (bl_pwm->pwm_method == BL_PWM_NEGATIVE)
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pol = 1;
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if (bl_debug_print_flag) {
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BLPR("port %d: pwm_duty=%d, out_level=%d, pol=%s\n",
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port, bl_pwm->pwm_duty, out_level,
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(pol ? "negative":"positive"));
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if (IS_ERR_OR_NULL(bl_pwm->pwm_data.pwm)) {
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BLERR("%s: invalid bl_pwm_ch\n", __func__);
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return;
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}
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switch (port) {
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case BL_PWM_A:
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case BL_PWM_B:
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case BL_PWM_C:
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case BL_PWM_D:
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case BL_PWM_E:
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case BL_PWM_F:
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pwm_period = 1000000000 / bl_pwm->pwm_freq;
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pwm_duty = (pwm_period * bl_pwm->pwm_duty) / 100;
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pwm_period = 1000000000 / bl_pwm->pwm_freq;
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pwm_duty = (pwm_period * bl_pwm->pwm_duty) / 100;
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port_index = bl_pwm->pwm_data.port_index;
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if (bl_debug_print_flag) {
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pr_info("pwm: pwm=0x%p, port_index=%d, meson_index=%d\n",
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bl_pwm->pwm_data.pwm, port_index, bl_pwm->pwm_data.meson_index);
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}
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if (((port_index % 2) == bl_pwm->pwm_data.meson_index) &&
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(port_index == bl_pwm->pwm_port)) {
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bl_pwm->pwm_data.state.polarity = pol;
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bl_pwm->pwm_data.state.duty_cycle = pwm_duty;
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bl_pwm->pwm_data.state.period = pwm_period;
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bl_pwm->pwm_data.state.enabled = true;
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if (bl_debug_print_flag) {
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pr_info("pwm=0x%p, port_index=%d, meson_index=%d\n",
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bl_pwm->pwm_data.pwm, bl_pwm->pwm_data.port_index,
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bl_pwm->pwm_data.meson_index);
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BLPR(
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"pwm state: polarity=%d, duty_cycle=%d, period=%d, enabled=%d\n",
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bl_pwm->pwm_data.state.polarity,
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bl_pwm->pwm_data.state.duty_cycle,
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bl_pwm->pwm_data.state.period,
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bl_pwm->pwm_data.state.enabled);
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}
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if ((!IS_ERR_OR_NULL(bl_pwm->pwm_data.pwm)) &&
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((bl_pwm->pwm_data.port_index % 2) ==
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bl_pwm->pwm_data.meson_index) &&
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(bl_pwm->pwm_data.port_index == bl_pwm->pwm_port)) {
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bl_pwm->pwm_data.state.polarity = pol;
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bl_pwm->pwm_data.state.duty_cycle = pwm_duty;
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bl_pwm->pwm_data.state.period = pwm_period;
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bl_pwm->pwm_data.state.enabled = true;
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if (bl_debug_print_flag) {
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BLPR("polarity=%d\n",
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bl_pwm->pwm_data.state.polarity);
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BLPR("duty_cycle=%d\n",
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bl_pwm->pwm_data.state.duty_cycle);
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BLPR("period=%d\n",
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bl_pwm->pwm_data.state.period);
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BLPR("enabled=%d\n",
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bl_pwm->pwm_data.state.enabled);
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}
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if (out_level == 0xff) {
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pwm_constant_disable(bl_pwm->pwm_data.meson,
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bl_pwm->pwm_data.meson_index);
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} else {
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/* pwm duty 100% or 0% special control */
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pwm_constant_enable(bl_pwm->pwm_data.meson,
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bl_pwm->pwm_data.meson_index);
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}
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pwm_apply_state(pwm, &(bl_pwm->pwm_data.state));
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if (out_level == 0xff) {
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pwm_constant_disable(bl_pwm->pwm_data.meson,
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bl_pwm->pwm_data.meson_index);
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} else {
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BLERR("%s: invalid bl_pwm_ch\n", __func__);
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/* pwm duty 100% or 0% special control */
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pwm_constant_enable(bl_pwm->pwm_data.meson,
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bl_pwm->pwm_data.meson_index);
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}
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break;
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case BL_PWM_VS:
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bl_set_pwm_vs(bl_pwm, out_level);
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break;
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default:
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break;
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pwm_apply_state(bl_pwm->pwm_data.pwm,
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&(bl_pwm->pwm_data.state));
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}
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}
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void bl_pwm_ctrl(struct bl_pwm_config_s *bl_pwm, int status)
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{
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struct pwm_state pstate;
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unsigned int pol = 0, out_level = 0xff;
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if (bl_pwm->pwm_method == BL_PWM_NEGATIVE)
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pol = 1;
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if (status) {
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/* enable pwm */
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out_level = bl_pwm_out_level_check(bl_pwm);
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if (bl_debug_print_flag) {
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BLPR("port %d: pwm_duty=%d, out_level=%d, pol=%s\n",
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bl_pwm->pwm_port, bl_pwm->pwm_duty, out_level,
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(pol ? "negative":"positive"));
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}
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switch (bl_pwm->pwm_port) {
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case BL_PWM_A:
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case BL_PWM_B:
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@@ -565,8 +551,10 @@ void bl_pwm_ctrl(struct bl_pwm_config_s *bl_pwm, int status)
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case BL_PWM_D:
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case BL_PWM_E:
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case BL_PWM_F:
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bl_set_pwm_normal(bl_pwm, pol, out_level);
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break;
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case BL_PWM_VS:
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bl_set_pwm(bl_pwm);
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bl_set_pwm_vs(bl_pwm, pol, out_level);
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break;
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default:
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break;
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@@ -580,42 +568,47 @@ void bl_pwm_ctrl(struct bl_pwm_config_s *bl_pwm, int status)
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case BL_PWM_D:
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case BL_PWM_E:
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case BL_PWM_F:
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if (!IS_ERR_OR_NULL(bl_pwm->pwm_data.pwm)) {
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pwm_get_state(bl_pwm->pwm_data.pwm, &pstate);
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pwm_constant_enable(bl_pwm->pwm_data.meson,
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bl_pwm->pwm_data.meson_index);
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if (bl_pwm->pwm_method)
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pstate.polarity = 0;
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else
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pstate.polarity = 1;
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pstate.duty_cycle = 0;
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pstate.enabled = 1;
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pstate.period = bl_pwm->pwm_data.state.period;
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if (bl_debug_print_flag) {
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BLPR("polarity=%d\n",
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pstate.polarity);
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BLPR("duty_cycle=%d\n",
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pstate.duty_cycle);
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BLPR("period=%d\n",
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pstate.period);
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BLPR("enabled=%d\n",
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pstate.enabled);
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}
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pwm_apply_state(bl_pwm->pwm_data.pwm,
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&(pstate));
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}
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if (IS_ERR_OR_NULL(bl_pwm->pwm_data.pwm)) {
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BLERR("%s: invalid bl_pwm_ch\n", __func__);
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return;
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}
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pwm_get_state(bl_pwm->pwm_data.pwm, &pstate);
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pwm_constant_enable(bl_pwm->pwm_data.meson,
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bl_pwm->pwm_data.meson_index);
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if (bl_pwm->pwm_method)
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pstate.polarity = 0;
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else
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pstate.polarity = 1;
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pstate.duty_cycle = 0;
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pstate.enabled = 1;
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pstate.period = bl_pwm->pwm_data.state.period;
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if (bl_debug_print_flag) {
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BLPR(
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"pwm state: polarity=%d, duty_cycle=%d, period=%d, enabled=%d\n",
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pstate.polarity, pstate.duty_cycle,
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pstate.period, pstate.enabled);
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}
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pwm_apply_state(bl_pwm->pwm_data.pwm, &(pstate));
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break;
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case BL_PWM_VS:
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if (bl_pwm->pwm_method == BL_PWM_NEGATIVE)
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bl_set_pwm_vs(bl_pwm, 1);
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else
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bl_set_pwm_vs(bl_pwm, 0);
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bl_set_pwm_vs(bl_pwm, pol, 0);
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default:
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break;
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}
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}
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}
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static void bl_set_pwm(struct bl_pwm_config_s *bl_pwm)
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{
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if (bl_drv->state & BL_STATE_BL_ON) {
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bl_pwm_ctrl(bl_pwm, 1);
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} else {
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if (bl_debug_print_flag)
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BLERR("%s: bl_drv state is off\n", __func__);
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}
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}
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static void bl_power_en_ctrl(struct bl_config_s *bconf, int status)
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{
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if (status) {
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@@ -946,22 +939,22 @@ static void bl_set_duty_pwm(struct bl_pwm_config_s *bl_pwm)
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if (bl_pwm_duty_free) {
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if (bl_pwm->pwm_duty > 100) {
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BLERR("pwm_duty %d%% is bigger than 100%%\n",
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BLERR(
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"pwm_duty %d%% is bigger than 100%%, reset to 100%%\n",
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bl_pwm->pwm_duty);
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bl_pwm->pwm_duty = 100;
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BLPR("reset to 100%%\n");
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}
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} else {
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if (bl_pwm->pwm_duty > bl_pwm->pwm_duty_max) {
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BLERR("pwm_duty %d%% is bigger than duty_max %d%%\n",
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BLERR(
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"pwm_duty %d%% is bigger than duty_max %d%%, reset to duty_max\n",
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bl_pwm->pwm_duty, bl_pwm->pwm_duty_max);
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bl_pwm->pwm_duty = bl_pwm->pwm_duty_max;
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BLPR("reset to duty_max\n");
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} else if (bl_pwm->pwm_duty < bl_pwm->pwm_duty_min) {
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BLERR("pwm_duty %d%% is smaller than duty_min %d%%\n",
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BLERR(
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"pwm_duty %d%% is smaller than duty_min %d%%, reset to duty_min\n",
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bl_pwm->pwm_duty, bl_pwm->pwm_duty_min);
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bl_pwm->pwm_duty = bl_pwm->pwm_duty_min;
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BLPR("reset to duty_min\n");
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}
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}
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@@ -997,7 +990,7 @@ static void bl_set_level_pwm(struct bl_pwm_config_s *bl_pwm, unsigned int level)
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BLPR("port %d mapping: level=%d, level_max=%d, level_min=%d\n",
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bl_pwm->pwm_port, level, max, min);
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BLPR("port %d: duty=%d%%, duty_max=%d%%, duty_min=%d%%\n",
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bl_pwm->pwm_port, pwm_max, pwm_min, bl_pwm->pwm_level);
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bl_pwm->pwm_port, bl_pwm->pwm_duty, pwm_max, pwm_min);
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}
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bl_set_pwm(bl_pwm);
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@@ -34,7 +34,6 @@
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#include <linux/amlogic/aml_gpio_consumer.h>
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#include <linux/amlogic/media/vout/lcd/aml_ldim.h>
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#include <linux/amlogic/media/vout/lcd/aml_bl.h>
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#include "iw7027_bl.h"
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#include "ldim_drv.h"
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#include "ldim_dev_drv.h"
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@@ -342,8 +341,8 @@ static inline unsigned int iw7027_get_value(unsigned int level)
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static int iw7027_smr(unsigned short *buf, unsigned char len)
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{
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int i, j;
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unsigned int value_flag = 0;
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int i;
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unsigned int value_flag = 0, temp;
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unsigned char val[20];
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unsigned short *mapping;
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struct aml_ldim_driver_s *ldim_drv = aml_ldim_get_driver();
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@@ -371,59 +370,26 @@ static int iw7027_smr(unsigned short *buf, unsigned char len)
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dim_max = ldim_drv->ldev_conf->dim_max;
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dim_min = ldim_drv->ldev_conf->dim_min;
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for (i = 0; i < 10; i++)
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value_flag = value_flag || buf[i];
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if (value_flag == 0) {
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for (j = 0; j < 20; j++)
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val[j] = 0;
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goto iw7027_smr_end;
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}
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if (bl_iw7027->test_mode) {
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val[0] = (test_brightness[0] & 0xf00) >> 8;
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val[1] = test_brightness[0] & 0xff;
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val[2] = (test_brightness[1] & 0xf00) >> 8;
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val[3] = test_brightness[1] & 0xff;
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val[4] = (test_brightness[2] & 0xf00) >> 8;
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val[5] = test_brightness[2] & 0xff;
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val[6] = (test_brightness[3] & 0xf00) >> 8;
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val[7] = test_brightness[3] & 0xff;
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val[8] = (test_brightness[4] & 0xf00) >> 8;
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val[9] = test_brightness[4] & 0xff;
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val[10] = (test_brightness[5] & 0xf00) >> 8;
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val[11] = test_brightness[5] & 0xff;
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val[12] = (test_brightness[6] & 0xf00) >> 8;
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val[13] = test_brightness[6] & 0xff;
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val[14] = (test_brightness[7] & 0xf00) >> 8;
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val[15] = test_brightness[7] & 0xff;
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val[16] = (test_brightness[8] & 0xf00) >> 8;
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val[17] = test_brightness[8] & 0xff;
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val[18] = (test_brightness[9] & 0xf00) >> 8;
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val[19] = test_brightness[9] & 0xff;
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for (i = 0; i < 10; i++) {
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val[2*i] = (test_brightness[i] >> 8) & 0xf;
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val[2*i+1] = test_brightness[i] & 0xff;
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}
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} else {
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val[0] = ((iw7027_get_value(buf[mapping[0]])) & 0xf00) >> 8;
|
||||
val[1] = (iw7027_get_value(buf[mapping[0]])) & 0xff;
|
||||
val[2] = ((iw7027_get_value(buf[mapping[1]])) & 0xf00) >> 8;
|
||||
val[3] = (iw7027_get_value(buf[mapping[1]])) & 0xff;
|
||||
val[4] = ((iw7027_get_value(buf[mapping[2]])) & 0xf00) >> 8;
|
||||
val[5] = (iw7027_get_value(buf[mapping[2]])) & 0xff;
|
||||
val[6] = ((iw7027_get_value(buf[mapping[3]])) & 0xf00) >> 8;
|
||||
val[7] = (iw7027_get_value(buf[mapping[3]])) & 0xff;
|
||||
val[8] = ((iw7027_get_value(buf[mapping[4]])) & 0xf00) >> 8;
|
||||
val[9] = (iw7027_get_value(buf[mapping[4]])) & 0xff;
|
||||
val[10] = ((iw7027_get_value(buf[mapping[5]])) & 0xf00) >> 8;
|
||||
val[11] = (iw7027_get_value(buf[mapping[5]])) & 0xff;
|
||||
val[12] = ((iw7027_get_value(buf[mapping[6]])) & 0xf00) >> 8;
|
||||
val[13] = (iw7027_get_value(buf[mapping[6]])) & 0xff;
|
||||
val[14] = ((iw7027_get_value(buf[mapping[7]])) & 0xf00) >> 8;
|
||||
val[15] = (iw7027_get_value(buf[mapping[7]])) & 0xff;
|
||||
val[16] = ((iw7027_get_value(buf[mapping[8]])) & 0xf00) >> 8;
|
||||
val[17] = (iw7027_get_value(buf[mapping[8]])) & 0xff;
|
||||
val[18] = ((iw7027_get_value(buf[mapping[9]])) & 0xf00) >> 8;
|
||||
val[19] = (iw7027_get_value(buf[mapping[9]])) & 0xff;
|
||||
for (i = 0; i < 10; i++)
|
||||
value_flag += buf[i];
|
||||
if (value_flag == 0) {
|
||||
for (i = 0; i < 20; i++)
|
||||
val[i] = 0;
|
||||
} else {
|
||||
for (i = 0; i < 10; i++) {
|
||||
temp = iw7027_get_value(buf[mapping[i]]);
|
||||
val[2*i] = (temp >> 8) & 0xf;
|
||||
val[2*i+1] = temp & 0xff;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
iw7027_smr_end:
|
||||
iw7027_wregs(bl_iw7027->spi, 0x40, val, 20);
|
||||
|
||||
iw7027_spi_op_flag = 0;
|
||||
|
||||
@@ -1,115 +0,0 @@
|
||||
/*
|
||||
* drivers/amlogic/media/vout/backlight/aml_ldim/iw7027_bl.h
|
||||
*
|
||||
* Copyright (C) 2017 Amlogic, Inc. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __IW7027_HW_H
|
||||
#define __IW7027_HW_H
|
||||
|
||||
#define CHECK_INIT_DONE_MAX_COUNT 10
|
||||
|
||||
#define BRIGHTNESS_2D 0x7FF
|
||||
#define BRIGHTNESS_3D 0x333
|
||||
|
||||
#define BRIGHTNESS_2D_MAX 0xFFF
|
||||
#define BRIGHTNESS_3D_MAX 0x500
|
||||
|
||||
/* skyworht 39" */
|
||||
#define ISET_VALUE_2D_SKY39 0xB43C
|
||||
#define ISET_VALUE_3D_SKY39 0xB4B4
|
||||
#define VDAC_VALUE_2D_SKY39 0xE5
|
||||
#define VDAC_VALUE_3D_SKY39 0x85
|
||||
|
||||
#define VDAC_MIN_2D_SKY39 0xB0
|
||||
#define VDAC_MAX_2D_SKY39 0xF1
|
||||
#define VDAC_MIN_3D_SKY39 0x00
|
||||
#define VDAC_MAX_3D_SKY39 0x96
|
||||
|
||||
/* skyworht 42" */
|
||||
#define ISET_VALUE_2D_SKY42 0xA537
|
||||
#define ISET_VALUE_3D_SKY42 0xA5A5
|
||||
#define VDAC_VALUE_2D_SKY42 0xE6
|
||||
#define VDAC_VALUE_3D_SKY42 0x84
|
||||
|
||||
#define VDAC_MIN_2D_SKY42 0xB3
|
||||
#define VDAC_MAX_2D_SKY42 0xF4
|
||||
#define VDAC_MIN_3D_SKY42 0x3A
|
||||
#define VDAC_MAX_3D_SKY42 0x97
|
||||
|
||||
/* skyworht 50" */
|
||||
#define ISET_VALUE_2D_SKY50 0xB43C
|
||||
#define ISET_VALUE_3D_SKY50 0xB4B4
|
||||
#define VDAC_VALUE_2D_SKY50 0xE1
|
||||
#define VDAC_VALUE_3D_SKY50 0x77
|
||||
|
||||
#define VDAC_MIN_2D_SKY50 0xC0
|
||||
#define VDAC_MAX_2D_SKY50 0xF5
|
||||
#define VDAC_MIN_3D_SKY50 0x47
|
||||
#define VDAC_MAX_3D_SKY50 0xA3
|
||||
|
||||
#define EEPROM_ADDR_VDAC_2D 3504 /* 0xDB0 */
|
||||
#define EEPROM_ADDR_VDAC_3D 3506 /* 0xDB2 */
|
||||
|
||||
#define VSYNC_CNT_2D_3D 64
|
||||
#define VSYNC_CNT_3D_2D 64
|
||||
#define VSYNC_CNT_SET_BRI_ZERO 49
|
||||
#define VSYNC_CNT_RAMP 45
|
||||
#define VSYNC_CNT_SET_BRI_2D 15
|
||||
#define VSYNC_CNT_SET_BRI_3D 15
|
||||
#define VSYNC_CNT_WAIT_EN_PROT 0
|
||||
|
||||
/* scan timing parameters for 42"*/
|
||||
#define DEFAULT_TD0_2D 333 /* 0.333ms */
|
||||
#define DEFAULT_DG1_2D 720 /* 0.720ms */
|
||||
#define DEFAULT_DELTAT_2D 790 /* 0.790ms */
|
||||
|
||||
#define DEFAULT_TD0_3D 333 /* 0.333ms */
|
||||
#define DEFAULT_DG1_3D 720 /* 0.720ms */
|
||||
#define DEFAULT_DELTAT_3D 790 /* 0.790ms */
|
||||
|
||||
/* scan timing parameters for 39"*/
|
||||
#define DEFAULT_TD0_2D_SKY39 333 /* 0.333ms */
|
||||
#define DEFAULT_DG1_2D_SKY39 700 /* 0.700ms */
|
||||
#define DEFAULT_DELTAT_2D_SKY39 1104 /* 1.104ms */
|
||||
|
||||
#define DEFAULT_TD0_3D_SKY39 333 /* 0.333ms */
|
||||
#define DEFAULT_DG1_3D_SKY39 700 /* 0.700ms */
|
||||
#define DEFAULT_DELTAT_3D_SKY39 1104 /* 1.104ms */
|
||||
|
||||
/* scan timing parameters for 50"*/
|
||||
#define DEFAULT_TD0_2D_SKY50 333 /* 0.333ms */
|
||||
#define DEFAULT_DG1_2D_SKY50 720 /* 0.720ms */
|
||||
#define DEFAULT_DELTAT_2D_SKY50 790 /* 1.120ms */
|
||||
|
||||
#define DEFAULT_TD0_3D_SKY50 333 /* 0.333ms */
|
||||
#define DEFAULT_DG1_3D_SKY50 720 /* 0.720ms */
|
||||
#define DEFAULT_DELTAT_3D_SKY50 790 /* 1.120ms */
|
||||
|
||||
#define EEPROM_ADDR_PANEL 3463
|
||||
|
||||
struct iwatt_reg_map {
|
||||
u16 addr;
|
||||
u16 val_2d;
|
||||
u16 val_3d;
|
||||
};
|
||||
|
||||
extern int dirspi_write(struct spi_device *spi, u8 *buf, int len);
|
||||
extern int dirspi_read(struct spi_device *spi, u8 *buf, int len);
|
||||
extern void dirspi_start(struct spi_device *spi);
|
||||
extern void dirspi_stop(struct spi_device *spi);
|
||||
#endif /* __IW7027_HW_H */
|
||||
|
||||
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -32,7 +32,9 @@
|
||||
#define LDIMPR(fmt, args...) pr_info("ldim: "fmt"", ## args)
|
||||
#define LDIMERR(fmt, args...) pr_err("ldim: error: "fmt"", ## args)
|
||||
|
||||
extern unsigned int ldim_debug_print;
|
||||
#define LDIM_DRV_VER "20180629"
|
||||
|
||||
extern unsigned char ldim_debug_print;
|
||||
|
||||
/*** GXTVBB & TXLX common use register*/
|
||||
/* each base has 16 address space */
|
||||
@@ -110,6 +112,7 @@ extern unsigned int ldim_debug_print;
|
||||
|
||||
|
||||
#define LD_DATA_DEPTH 12
|
||||
#define LD_DATA_MIN 10
|
||||
#define LD_DATA_MAX 0xfff
|
||||
|
||||
struct LDReg {
|
||||
|
||||
@@ -617,6 +617,7 @@ void ldim_set_region(unsigned int resolution, unsigned int blk_height,
|
||||
}
|
||||
}
|
||||
|
||||
static unsigned int invalid_val_cnt;
|
||||
void ldim_stts_read_region(unsigned int nrow, unsigned int ncol)
|
||||
{
|
||||
unsigned int i, j, k;
|
||||
|
||||
@@ -18,8 +18,6 @@
|
||||
#include <linux/cdev.h>
|
||||
#include <linux/amlogic/iomap.h>
|
||||
|
||||
extern unsigned int invalid_val_cnt;
|
||||
|
||||
#define Wr_reg_bits(adr, val, start, len) \
|
||||
aml_vcbus_update_bits(adr, ((1<<len)-1)<<start, val<<start)
|
||||
/* #define Rd_reg_bits(adr, start, len) \
|
||||
|
||||
@@ -181,8 +181,8 @@ struct aml_bl_drv_s {
|
||||
struct backlight_device *bldev;
|
||||
struct workqueue_struct *workqueue;
|
||||
struct delayed_work bl_delayed_work;
|
||||
struct resource *res_ldim_irq;
|
||||
struct resource *res_rdma_irq;
|
||||
struct resource *res_ldim_vsync_irq;
|
||||
struct resource *res_ldim_rdma_irq;
|
||||
};
|
||||
|
||||
extern struct aml_bl_drv_s *aml_bl_get_driver(void);
|
||||
|
||||
@@ -24,6 +24,11 @@
|
||||
#include <linux/amlogic/media/vout/lcd/aml_bl.h>
|
||||
#include <linux/spi/spi.h>
|
||||
|
||||
extern int dirspi_write(struct spi_device *spi, u8 *buf, int len);
|
||||
extern int dirspi_read(struct spi_device *spi, u8 *buf, int len);
|
||||
extern void dirspi_start(struct spi_device *spi);
|
||||
extern void dirspi_stop(struct spi_device *spi);
|
||||
|
||||
#define _VE_LDIM 'C'
|
||||
|
||||
/* VPP.ldim IOCTL command list */
|
||||
|
||||
Reference in New Issue
Block a user