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phy: rockchip: naneng-combphy: Fix swing to 650mv under 100M refclk for rk3562

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Change-Id: Ia71ec0851c1d1bc686277a49af70488f413f423c
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
This commit is contained in:
Jon Lin
2023-05-23 20:04:57 +08:00
committed by Tao Huang
parent 010c015455
commit 13639746fa
1 changed files with 6 additions and 0 deletions
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6
drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
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@@ -684,6 +684,12 @@ static int rk3562_combphy_cfg(struct rockchip_combphy_priv *priv)
writel(0x32, priv->mmio + (0x11 << 2));
writel(0xf0, priv->mmio + (0xa << 2));
/* CKDRV output swing adjust to 650mv */
val = readl(priv->mmio + (0xd << 2));
val &= ~(0xf << 1);
val |= 0xb;
writel(val, priv->mmio + (0xd << 2));
}
break;
default: