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drm/rockchip: vop2: filter unsupported display mode

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For DP and HDMI, if the request clock rate for a display mode
can't be precise get, filter it.

Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: I6f323cfbafd4822f3cc5aac6c27b0c409d063368
This commit is contained in:
Zhang Yubing
2022-06-14 09:40:06 +08:00
committed by Tao Huang
parent c9d08fc99c
commit 13b4a7b8da
1 changed files with 10 additions and 8 deletions
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18
drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
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@@ -5407,14 +5407,14 @@ vop2_crtc_mode_valid(struct drm_crtc *crtc, const struct drm_display_mode *mode)
if (mode->flags & DRM_MODE_FLAG_DBLCLK)
request_clock *= 2;
if (request_clock <= VOP2_MAX_DCLK_RATE) {
if (vop2_extend_clk_find_by_name(vop2, "hdmi0_phy_pll") ||
vop2_extend_clk_find_by_name(vop2, "hdmi1_phy_pll"))
clock = request_clock;
else
clock = clk_round_rate(vp->dclk, request_clock * 1000) / 1000;
} else {
if ((request_clock <= VOP2_MAX_DCLK_RATE) &&
(vop2_extend_clk_find_by_name(vop2, "hdmi0_phy_pll") ||
vop2_extend_clk_find_by_name(vop2, "hdmi1_phy_pll"))) {
clock = request_clock;
} else {
if (request_clock > VOP2_MAX_DCLK_RATE)
request_clock = request_clock >> 2;
clock = clk_round_rate(vp->dclk, request_clock * 1000) / 1000;
}
/*
@@ -5955,8 +5955,10 @@ static int vop2_calc_if_clk(struct drm_crtc *crtc, const struct vop2_connector_i
if (vcstate->output_mode == ROCKCHIP_OUT_MODE_YUV420 ||
(vcstate->output_flags & ROCKCHIP_OUTPUT_DUAL_CHANNEL_LEFT_RIGHT_MODE))
v_pixclk = v_pixclk >> 1;
clk_set_rate(dclk->hw.clk, v_pixclk);
} else {
v_pixclk = v_pixclk >> 2;
}
clk_set_rate(dclk->hw.clk, v_pixclk);
}
if (vcstate->dsc_enable) {