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drm/rockchip: vop2: add support cubic lut

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Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I0cf87a6d6c30ddc705c17dce677e5b7747084908
This commit is contained in:
Sandy Huang
2021-11-11 10:26:05 +08:00
parent 2d67ec5094
commit 180d0b6980
2 changed files with 18 additions and 0 deletions
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14
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
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@@ -931,6 +931,10 @@ static const struct vop2_video_port_regs rk3588_vop_vp0_regs = {
.edpi_te_en = VOP_REG(RK3568_VP0_DUAL_CHANNEL_CTRL, 0x1, 28),
.edpi_wms_hold_en = VOP_REG(RK3568_VP0_DUAL_CHANNEL_CTRL, 0x1, 30),
.edpi_wms_fs = VOP_REG(RK3568_VP0_DUAL_CHANNEL_CTRL, 0x1, 31),
.cubic_lut_en = VOP_REG(RK3568_VP0_3D_LUT_CTRL, 0x1, 0),
.cubic_lut_update_en = VOP_REG(RK3568_VP0_3D_LUT_CTRL, 0x1, 2),
.cubic_lut_mst = VOP_REG(RK3568_VP0_3D_LUT_MST, 0xffffffff, 0),
};
/*
@@ -1017,6 +1021,10 @@ static const struct vop2_video_port_regs rk3588_vop_vp1_regs = {
.edpi_te_en = VOP_REG(RK3568_VP1_DUAL_CHANNEL_CTRL, 0x1, 28),
.edpi_wms_hold_en = VOP_REG(RK3568_VP1_DUAL_CHANNEL_CTRL, 0x1, 30),
.edpi_wms_fs = VOP_REG(RK3568_VP1_DUAL_CHANNEL_CTRL, 0x1, 31),
.cubic_lut_en = VOP_REG(RK3588_VP1_3D_LUT_CTRL, 0x1, 0),
.cubic_lut_update_en = VOP_REG(RK3588_VP1_3D_LUT_CTRL, 0x1, 2),
.cubic_lut_mst = VOP_REG(RK3588_VP1_3D_LUT_MST, 0xffffffff, 0),
};
static const struct vop2_video_port_regs rk3588_vop_vp2_regs = {
@@ -1069,6 +1077,10 @@ static const struct vop2_video_port_regs rk3588_vop_vp2_regs = {
.edpi_te_en = VOP_REG(RK3568_VP2_DUAL_CHANNEL_CTRL, 0x1, 28),
.edpi_wms_hold_en = VOP_REG(RK3568_VP2_DUAL_CHANNEL_CTRL, 0x1, 30),
.edpi_wms_fs = VOP_REG(RK3568_VP2_DUAL_CHANNEL_CTRL, 0x1, 31),
.cubic_lut_en = VOP_REG(RK3588_VP2_3D_LUT_CTRL, 0x1, 0),
.cubic_lut_update_en = VOP_REG(RK3588_VP2_3D_LUT_CTRL, 0x1, 2),
.cubic_lut_mst = VOP_REG(RK3588_VP2_3D_LUT_MST, 0xffffffff, 0),
};
static const struct vop2_video_port_regs rk3588_vop_vp3_regs = {
@@ -1145,6 +1157,7 @@ static const struct vop2_video_port_data rk3588_vop_video_ports[] = {
.soc_id = { 0x3588, 0x3588 },
.feature = VOP_FEATURE_OUTPUT_10BIT | VOP_FEATURE_ALPHA_SCALE | VOP_FEATURE_HDR10,
.gamma_lut_len = 1024,
.cubic_lut_len = 729, /* 9x9x9 */
.dclk_max = 600000000,
.max_output = { 4096, 2304 },
.pre_scan_max_dly = { 76, 65, 53, 54 },
@@ -1158,6 +1171,7 @@ static const struct vop2_video_port_data rk3588_vop_video_ports[] = {
.soc_id = { 0x3588, 0x3588 },
.feature = VOP_FEATURE_OUTPUT_10BIT | VOP_FEATURE_ALPHA_SCALE,
.gamma_lut_len = 1024,
.cubic_lut_len = 4913, /* 17x17x17 */
.dclk_max = 600000000,
.max_output = { 4096, 2304 },
.pre_scan_max_dly = { 52, 52, 52, 52 },

4
drivers/gpu/drm/rockchip/rockchip_vop_reg.h
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@@ -1135,6 +1135,8 @@
#define RK3568_VP1_DUAL_CHANNEL_CTRL 0xD04
#define RK3568_VP1_COLOR_BAR_CTRL 0xD08
#define RK3568_VP1_CLK_CTRL 0xD0C
#define RK3588_VP1_3D_LUT_CTRL 0xD10
#define RK3588_VP1_3D_LUT_MST 0xD20
#define RK3568_VP1_DSP_BG 0xD2C
#define RK3568_VP1_PRE_SCAN_HTIMING 0xD30
#define RK3568_VP1_POST_DSP_HACT_INFO 0xD34
@@ -1159,6 +1161,8 @@
#define RK3568_VP2_DUAL_CHANNEL_CTRL 0xE04
#define RK3568_VP2_COLOR_BAR_CTRL 0xE08
#define RK3568_VP2_CLK_CTRL 0xE0C
#define RK3588_VP2_3D_LUT_CTRL 0xE10
#define RK3588_VP2_3D_LUT_MST 0xE20
#define RK3568_VP2_DSP_BG 0xE2C
#define RK3568_VP2_PRE_SCAN_HTIMING 0xE30
#define RK3568_VP2_POST_DSP_HACT_INFO 0xE34