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ARM: dts: rockchip: rk3288: fix base address for i2s to 0xff8b0000

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This patch fixes the error base address for the i2s controller from
0xff88b0000 to 0xff8b0000.

Also order the i2s node by mapping address.

Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: I613eaf64ee010c41208f1c8169e55efbf39fd34c
This commit is contained in:
Jianqun Xu
2022-11-17 15:12:17 +08:00
parent 4ba9bb2228
commit 1f38917aeb
1 changed files with 15 additions and 15 deletions
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30
arch/arm/boot/dts/rk3288.dtsi
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@@ -1034,21 +1034,6 @@
status = "disabled";
};
spdif: sound@ff88b0000 {
compatible = "rockchip,rk3288-spdif", "rockchip,rk3066-spdif";
reg = <0x0 0xff8b0000 0x0 0x10000>;
#sound-dai-cells = <0>;
clocks = <&cru SCLK_SPDIF8CH>, <&cru HCLK_SPDIF8CH>;
clock-names = "mclk", "hclk";
dmas = <&dmac_bus_s 3>;
dma-names = "tx";
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&spdif_tx>;
rockchip,grf = <&grf>;
status = "disabled";
};
i2s: i2s@ff890000 {
compatible = "rockchip,rk3288-i2s", "rockchip,rk3066-i2s";
reg = <0x0 0xff890000 0x0 0x10000>;
@@ -1079,6 +1064,21 @@
status = "okay";
};
spdif: sound@ff8b0000 {
compatible = "rockchip,rk3288-spdif", "rockchip,rk3066-spdif";
reg = <0x0 0xff8b0000 0x0 0x10000>;
#sound-dai-cells = <0>;
clocks = <&cru SCLK_SPDIF8CH>, <&cru HCLK_SPDIF8CH>;
clock-names = "mclk", "hclk";
dmas = <&dmac_bus_s 3>;
dma-names = "tx";
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&spdif_tx>;
rockchip,grf = <&grf>;
status = "disabled";
};
iep_mmu: iommu@ff900800 {
compatible = "rockchip,iommu";
reg = <0x0 0xff900800 0x0 0x40>;