shinys000114/linux
1
0
Fork 0
mirror of https://github.com/hardkernel/linux.git synced 2026-06-07 03:15:31 +09:00
Code Issues Packages Projects Releases Wiki Activity

arm64: dts: qcom: sm6115: declare VLS CLAMP register for USB3 PHY

Browse Source 
[ Upstream commit 95d739ed962c9aaa17d77b739606dbdf31879f6e ]

The USB3 PHY on the SM6115 platform doesn't have built-in
PCS_MISC_CLAMP_ENABLE register. Instead clamping is handled separately
via the register in the TCSR space. Declare corresponding register.

Fixes: 9dd5f6dba7 ("arm64: dts: qcom: sm6115: Add USB SS qmp phy node")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240117-usbc-phy-vls-clamp-v2-6-a950c223f10f@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Dmitry Baryshkov
2024-01-17 16:04:27 +02:00
committed by Sasha Levin
parent a535c7198b
commit 24648972fe
1 changed files with 7 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

7
arch/arm64/boot/dts/qcom/sm6115.dtsi
View File

@@ -591,6 +591,11 @@
#hwlock-cells = <1>;
};
tcsr_regs: syscon@3c0000 {
compatible = "qcom,sm6115-tcsr", "syscon";
reg = <0x0 0x003c0000 0x0 0x40000>;
};
tlmm: pinctrl@500000 {
compatible = "qcom,sm6115-tlmm";
reg = <0x0 0x00500000 0x0 0x400000>,
@@ -856,6 +861,8 @@
#phy-cells = <0>;
qcom,tcsr-reg = <&tcsr_regs 0xb244>;
status = "disabled";
};