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drm/rockchip: dsi2: set escape clk 10MHz default

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The Escape clock ranges from 1MHz to 20MHz.

Change-Id: I89f8118a4c194cc18f2728968564676e60e4e629
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
This commit is contained in:
Guochun Huang
2021-12-24 01:56:35 +00:00
committed by Tao Huang
parent 10c1dd7dfd
commit 28eb6929be
1 changed files with 2 additions and 2 deletions
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4
drivers/gpu/drm/rockchip/dw-mipi-dsi2-rockchip.c
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@@ -547,9 +547,9 @@ static void dw_mipi_dsi2_phy_clk_mode_cfg(struct dw_mipi_dsi2 *dsi2)
*/
val |= NON_CONTINUOUS_CLK;
/* The maximum value of the escape clock frequency is 20MHz */
/* The Escape clock ranges from 1MHz to 20MHz. */
sys_clk = clk_get_rate(dsi2->sys_clk) / USEC_PER_SEC;
esc_clk_div = DIV_ROUND_UP(sys_clk, 20 * 2);
esc_clk_div = DIV_ROUND_UP(sys_clk, 10 * 2);
val |= PHY_LPTX_CLK_DIV(esc_clk_div);
regmap_write(dsi2->regmap, DSI2_PHY_CLK_CFG, val);